Integrated power semiconductor module

By integrating the rectifier and inverter regions on the same substrate and using encapsulated gel packaging, the problems of low integration and high power loss in existing power modules are solved, realizing a power semiconductor module with high integration, low cost and high reliability.

CN223798707UActive Publication Date: 2026-01-13CHONGQING CLOUDCHILD TECH CO LTD
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Patent Information

Application Number
CN202423323434.3
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-12-31
Publication Date
2026-01-13
Estimated Expiration
2034-12-31

AI Technical Summary

Technical Problem

Existing power modules have low integration, high power loss, high cost, low device reliability, are susceptible to EMC interference, and have low safety.

Method used

The rectifier and inverter regions are integrated on the same substrate and encapsulated into a whole using encapsulating colloid. A three-phase full-bridge circuit is used to connect the power chip, a temperature detection device is set up, and insulating colloid is used for encapsulation.

Benefits of technology

It improves integration, reduces power loss and cost, enhances the electrical insulation performance and reliability of devices, reduces EMC interference, and improves safety.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to the technical field of semiconductors, in particular to an integrated power semiconductor module. The integrated power semiconductor module comprises a substrate, a first type of power chip, a second type of power chip, a first power pin, a second power pin, a third power pin and a packaging colloid. The first type power chip, the second type power chip, the first power pin, the second power pin and the third power pin are all arranged on the substrate; the first type power chips and the second type power chips are connected with first power pins, second power pins and third power pins, the plurality of first type power chips are connected to form a rectification area, and the plurality of second type power chips are connected to form an inversion area; the substrate, the rectification area and the inversion area are packaged through packaging colloid. According to the utility model, the rectifier module and the inverter module are packaged in the same module through the packaging colloid, the integration degree is high, the function loss is small, the cost is low, the electrical insulation performance of the device is excellent, and the power loss is small.
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Description

Technical Field

[0001] This utility model relates to the field of semiconductor technology, and more specifically, to an integrated power semiconductor module. Background Technology

[0002] Power rectifier modules, as a type of power semiconductor electronic device, are mainly used in various frequency converters, high-frequency inverter welding machines, high-power switching power supplies, high-frequency induction heating power supplies, and other equipment. They mainly perform the rectification function of converting AC power in the circuit system into DC power. Power inverter modules, as a type of electronic power controller, are mainly used in new energy motor drives, compressors, oil pumps / water pump drive control, etc. They mainly perform the inverter function of converting DC power into AC power for driving.

[0003] Existing power modules have the following shortcomings:

[0004] Primarily designed for single-function power inversion or rectification, these circuits have low integration, typically employing a discrete approach to separate rectification and inversion functions. This results in power loss during module operation, high cost, and poor energy efficiency. While compact in structure, they are highly susceptible to EMC interference, leading to lower component reliability. Internal chips are always-on, making it difficult to control them according to external AC current levels. Excessive current or frequency can easily cause module breakdown and damage, resulting in low safety. In new energy power circuits, power rectification and inversion are usually two separate systems, represented by two functionally different modules or several power transistors arranged in a specific electrical topology on a PCB, resulting in long electrical lines and significant power loss. Utility Model Content

[0005] The purpose of this invention is to provide an integrated power semiconductor module that can solve the above-mentioned technical problems.

[0006] The embodiments of this utility model can be implemented as follows:

[0007] This utility model provides an integrated power semiconductor module, including a substrate, a plurality of first type power chips, a plurality of second type power chips, a plurality of first power pins, a plurality of second power pins, a plurality of third power pins, and an encapsulating colloid;

[0008] The first type of power chip, the second type of power chip, the first power pin, the second power pin, and the third power pin are all disposed on the substrate;

[0009] The first type of power chip is connected to the first power pin and the third power pin, and a plurality of the first type of power chips are connected to form a rectification area;

[0010] The second type of power chip is connected to the second power pin and the third power pin, and several second type of power chips are connected to form an inverter area;

[0011] The substrate, the rectifier region, and the inverter region are encapsulated by the encapsulating colloid to form a whole.

[0012] In an optional embodiment, the input terminal of the rectifier region and the output terminal of the inverter region are on the same side of the substrate.

[0013] In an optional implementation, a temperature detection device is connected to the rectifier section.

[0014] In an optional embodiment, the temperature detection device is a thermistor.

[0015] In an optional embodiment, the encapsulating colloid is an insulating colloid.

[0016] In an optional embodiment, the insulating colloid is made of silicone gel or epoxy resin.

[0017] In an optional embodiment, the thickness of the encapsulating colloid is less than the height of the first power pin or the second power pin.

[0018] In an optional embodiment, the thickness range of the encapsulating colloid is:

[0019] 0.5h < H < 0.8h;

[0020] Wherein, H is the thickness of the encapsulating colloid, and h is the height of the first power pin or the second power pin.

[0021] In an optional implementation, the first power pin and the second power pin are one of the following: a "Z"-shaped gull-wing foot, a pin-shaped pin, an "S"-shaped surface mount pin, or a tile-shaped pin.

[0022] In an optional implementation, the first type of power chip is connected to the first power pin and the third power pin via a bonding wire.

[0023] The second type of power chip is connected to the second power pin and the third power pin via bonding wires.

[0024] The beneficial effects of the integrated power semiconductor module provided in this embodiment of the present invention include:

[0025] By encapsulating the rectifier and inverter modules in the same module with encapsulating colloid, the integration is high, the power loss is low, the cost is low, and the electrical insulation performance of the device is excellent, which is conducive to energy saving and emission reduction. After realizing alternating current application, rectification can be performed directly nearby, the electrical circuit is significantly reduced, and the power loss is small. Attached Figure Description

[0026] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this utility model and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 A front view of an integrated power semiconductor module provided in an embodiment of this utility model;

[0028] Figure 2 A three-dimensional structural schematic diagram of an integrated power semiconductor module provided for an embodiment of this utility model;

[0029] Figure 3 A schematic diagram of the rectifier region and inverter region of the integrated power semiconductor module before packaging, provided for an embodiment of this utility model;

[0030] Figure 4 A schematic diagram of the rectifier region of the integrated power semiconductor module before packaging, provided for an embodiment of this utility model;

[0031] Figure 5 This is a three-dimensional structural diagram of the integrated power semiconductor module before it is packaged, provided in an embodiment of the present invention.

[0032] Figure 6 Arrangement diagram of the first type of power chip and the second type of power chip for the integrated power semiconductor module provided in the embodiments of this utility model;

[0033] Figure 7 An arrangement diagram of a first type of power chip and a second type of power chip for another integrated power semiconductor module provided in an embodiment of the present utility model;

[0034] Figure 8 The diagram shows the arrangement of the first type of power chip and the second type of power chip in the third type of integrated power semiconductor module provided in this embodiment of the present invention.

[0035] Icons: 1-Encapsulation colloid; 2-Substrate; 3-Rectification area; 301-First rectification area; 302-Second rectification area; 4-Inverter area; 5-First type power chip; 6-Second type power chip; 7-Thermistor; 8-First power pin; 9-Second power pin; 10-Third power pin; 1001-Control pin; 1002-Sampling pin; 11-Bonding wire. Detailed Implementation

[0036] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. The components of the embodiments of this utility model described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0037] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0038] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0039] In the description of this utility model, it should be noted that if terms such as "upper," "lower," "inner," or "outer" are used to indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the utility model product is usually placed during use, they are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model.

[0040] Furthermore, the terms "first" and "second" are used only to distinguish descriptions and should not be interpreted as indicating or implying relative importance.

[0041] It should be noted that, where there is no conflict, the features in the embodiments of this utility model can be combined with each other.

[0042] This utility model provides an integrated power semiconductor module, such as Figures 1-8As shown, the system includes a substrate 2, a plurality of first-type power chips 5, a plurality of second-type power chips 6, a plurality of first-type power pins 8, a plurality of second-type power pins 9, a plurality of third-type power pins 10, and an encapsulating colloid 1. The first-type power chips 5, the second-type power chips 6, the first-type power pins 8, and the second-type power pins 9 are all disposed on the substrate 2. The first-type power chips 5 are connected to the first-type power pins 8 and the second-type power pins 9, and a plurality of the first-type power chips 5 are connected to form a rectifier region 3. The second-type power chips 6 are connected to the first-type power pins 8 and the second-type power pins 9, and a plurality of the second-type power chips 6 are connected to form an inverter region 4. The substrate 2, the rectifier region 3, and the inverter region 4 are encapsulated by the encapsulating colloid 1 to form a whole.

[0043] Specifically, in this embodiment, the encapsulating colloid 1 is encapsulated on a power semiconductor substrate. Preferably, the substrate has a metal layer on both the side facing and the side away from the encapsulating colloid 1, with an electrical insulating layer between the two metal layers. For example, it can be a substrate fully sintered and covered with high-purity copper, the thickness of which can be selected according to different application requirements. That is, the middle layer substrate supports the entire copper-clad laminate and is made of ceramic materials such as alumina (AlO) and aluminum nitride (AlN) with high insulation strength, high thermal conductivity, high temperature resistance, and corrosion resistance. The top layer is mainly a copper foil layer, the thickness of which can be selected according to different application requirements, serving as a heat dissipation substrate. Alternatively, other ceramic substrates with electrical transmission and insulation / heat dissipation properties can be selected, such as thin-film ceramic substrates (TFC), thick-film printed ceramic substrates (TPC), direct-bonded copper ceramic substrates (DBC), active metal brazing ceramic substrates (AMB), direct-plated copper ceramic substrates (DPC), and laser-activated metal-ceramic substrates (LAM). In this embodiment, the power module substrate is preferably a DBC direct-bonded copper ceramic substrate, which has lower cost, better performance, and a simpler manufacturing process.

[0044] In this embodiment, a third power pin 10 is also connected to the first type of power chip 5 and the second type of power chip 6. Specifically, in the inverter region 4, the third power pin 10 includes a gate control pin 1001 and an emitter sampling pin 1002. The gate control pin 1001 is used to receive external control signals to control the switching of the first type of power chip 5. When the current is too large or the frequency is too high, the power module can adjust the conduction frequency in time to improve safety. The emitter sampling pin 1002 is used to sample the current of the first type of power chip 5 and the second type of power chip 6, and is used to feed back to the external application terminal and as a reference for the gate control pin 1001 to control the first type of power chip 5 and the second type of power chip 6 to turn on or off.

[0045] In this embodiment, the third power pin 10 in the rectifier region 3 may only include the gate control pin 1001, or it may include both the gate control pin 1001 and the emitter sampling pin 1002, as in the inverter region 4.

[0046] Specifically, in this embodiment, the integrated power semiconductor module includes two functional regions: a rectifier region 3 and an inverter region 4, both disposed on a metal layer on the substrate 2 facing the encapsulant 1. For example, in this embodiment, the first power pin 8, the second power pin 9, the third power pin 10, and several second-type power chips 6 of the inverter region are connected according to the three-phase full-bridge power circuit to form the power region; the first power pin 8, the second power pin 9, the third power pin 10, and several first-type power chips 5 of the rectifier region are connected according to the three-phase full-bridge rectifier circuit to form the rectifier region.

[0047] Specifically, this utility model uses a three-phase full-bridge power circuit for inversion and rectification as an example, but it is not limited to this type of power circuit. It can also be a module structure of other typical circuits such as H-bridge, half-bridge, etc., and is not specifically limited here. That is, the rectification and inversion areas of the integrated power module described in this embodiment can be set according to application requirements. For example, the inversion area can also be set according to power circuits such as single-transistor, H-bridge, BUCK, BOOST, and chopper circuits, and the rectification area can be set according to rectifier circuits such as H-bridge rectifier circuits.

[0048] For example, in this embodiment, the rectifier region 3 is a three-phase alternating current input region and a DC power output region, and the inverter region 4 includes a DC power input region and a three-phase alternating output region.

[0049] Furthermore, the first type of power chip 5 is connected to each corresponding power pin via bonding wire 11 according to the three-phase rectifier circuit, or it can be connected via bonding metal strip; the second type of power chip 6 is connected to each corresponding power pin via bonding wire 11 according to the three-phase power circuit, or it can be connected via bonding metal strip.

[0050] In this embodiment, specifically, the first power pin 8 is a three-phase AC pin (U, V, W), and the second power pin 9 is a DC pin (P / P(-) / P(+)).

[0051] In this embodiment, the integrated power module, inverter zone 4 and rectifier zone 3 are described by way of example according to a three-phase full-bridge power circuit and a three-phase rectifier circuit. When the power module is working, DC power enters the inverter zone through the second power pin 9 and forms a reverse current through the second type of power chip 6 on the upper bridge of the inverter zone. Then, it is output to the external PCB circuit board application end through the U, V, and W three-phase AC pins of the first power pin 8. After the three-phase AC current is applied to the terminal, it enters the rectifier zone through the U, V, and W three-phase AC pins of the first power pin 8 of the rectifier zone 3. After the AC current is converted into DC current by the first type of power chip 5 of the rectifier zone 3, it returns to the external DC power supply or GND ground through the P(-) and P(+) pins of the second power pin 9.

[0052] For example, in order to reduce power loss of inverter current in external applications and reduce electrical transmission distance, the second power pins 9 of the inverter region 4 and the rectifier region 3 are located on the same side of the substrate.

[0053] It should be noted that the rectifier region 3 and inverter region 4 of the integrated power module described in this embodiment can be used for the same external application or for separate applications. For example, the inverter current is used for driving a three-phase motor on an external PCB board, and the rectifier region is used for alternating rectification of an electronic water pump. In this case, the second power pins 9 of the inverter region 4 and the rectifier region 3 can be configured according to actual application requirements and may not be located on the same side of the substrate, thus improving the diversity and compatibility of the power module's application terminals.

[0054] Specifically, in this embodiment, the first type of power chip 5 and the second type of power chip 6 are preferably transistors, such as MOSFET, IGBT, SiC, GAN, etc.

[0055] It should be noted that when the first type of power chip 5 or the second type of power chip 6 is selected as an IGBT, an FRD power auxiliary chip needs to be connected in parallel to reduce the risk of the IGBT power chip being broken down by the freewheeling current.

[0056] In this embodiment, for example, the rectifier region 3 is preferably provided with a SiC MOSFET, and the inverter region 4 is preferably provided with an IGBT power chip.

[0057] Furthermore, the inverter region 4 includes an upper bridge region and a lower bridge region. The upper bridge region includes three sets of insulated-gate bipolar transistors (IGBTs) and fast recovery diodes (FRDs). The IGBTs and FRDs are connected in parallel. The G and E pins of the upper bridge are connected to the gate and emitter of the corresponding IGBTs, respectively. The E pin is a sampling pin used in conjunction with an external current sensing resistor to sample the current flowing through the IGBT, thereby controlling the corresponding IGBT switch and improving module reliability. The P pin is a power input pin. DC power enters the module from the external power supply through the P pin and connects to the collector of the upper bridge power IGBT. After being converted into electrical energy by the IGBT, the AC current flows through the lower bridge three-phase power region and then out of the module through the U, V, and W three-phase AC pins for external applications, such as driving motors, electronic water pumps / oil pumps, etc.

[0058] In traditional circuit design, after the above process is completed, the inverter AC power is converted into DC power and returned to the power source or GND by several single tubes or rectifier modules set on the circuit board. This results in a long power electrical transmission path, significant power loss during power transmission, high cost of multi-device functional cooperation, large stray inductance between power devices, severe EMC electromagnetic interference, low overall performance, and low reliability.

[0059] The integrated power semiconductor module provided by this utility model integrates power inverter and power rectification functions. The rectification area 3 includes a three-phase AC input area. On one hand, the three-phase AC power enters through the U, V, and W three-phase AC pins of the first power pin 8, and then passes through the MOSFET power chips in the corresponding U / V / W three-phase AC input areas of the first rectification area 301 to form DC power. This DC power then flows back to the positive terminal of the external power supply or GND through the P(+) pin via the bonding wire 11 and the "L"-shaped copper layer of the rectification area 3 plate. On the other hand, the three-phase AC power enters through the U, V, and W pins, and then passes through the bonding wire 11 and the MOSFET power chips in the second rectification area 302 to form DC power. This DC power then flows back to the negative terminal of the external power supply or GND through the P(-) pin. For example, as mentioned above, in the first rectification area 301, the third power pin 10 preferably only has a G-terminal control pin 1001 to save costs.

[0060] It is understood that adjusting the module layout is not limited to the method provided in this embodiment; other settings are also possible, such as... Figure 6 and Figure 7 The rectifier region 3 is set in the opposite direction, or as follows: Figure 8Different layouts can be made in the rectifier section 3 to reduce the inductance of the wires, which can be set according to the actual application.

[0061] In an optional embodiment, the input terminal of the rectifier region 3 and the output terminal of the inverter region 4 are on the same side of the substrate 2, further reducing the power transmission distance, reducing power loss, and saving energy.

[0062] In this plan Figure 6 As shown, to facilitate differentiation and improve the compatibility of the power module with external applications, the U / V / W three-phase output terminals of inverter zone 4 and the U / V / W three-phase input terminals of rectifier zone 3 can be arranged opposite each other. In practical applications, it is preferable that the U / V / W three-phase output terminals of inverter zone 4 and the U / V / W three-phase input terminals of rectifier zone 3 are arranged on the same side, such as... Figure 7 As shown, reducing electrical transmission distance further reduces power loss and improves electrical utilization.

[0063] In an optional implementation, the rectifier zone or inverter zone is equipped with a temperature detection device, which is exemplaryly located in the rectifier zone in this embodiment.

[0064] Specifically, to monitor the heat generation of the power module in real time and further control its operation, a temperature detection device is installed in the rectifier or inverter area to detect the real-time temperature of the rectifier or inverter area and the overall heat dissipation of the module. When the substrate temperature is too high and the power module is likely to burn out, the thermistor feeds the signal back to the relevant controller on the external PCB board through the temperature pin T. The controller then sends a corresponding signal to adjust the operation of the power module, thereby ensuring safety during use.

[0065] In an optional embodiment, the temperature detection device is a thermistor 7. In this embodiment, the temperature detection device is a thermistor 7, which is located at the edge of the rectifier region. It should be noted that in this embodiment, the temperature detection device is a thermistor 7, but it is not limited to thermistor 7; it can also be other devices capable of temperature detection.

[0066] In an optional embodiment, the encapsulating colloid 1 is an insulating colloid. In this embodiment, the encapsulating colloid 1 is an insulating colloid, which can ensure the safety and stability of the module during use.

[0067] Specifically, the insulating colloid is preferably silicone gel. It should be noted that the insulating colloid in this embodiment can also be a higher-cost epoxy resin, as long as it can achieve the encapsulation function and has insulating properties; no fixed limitation is made here.

[0068] In an optional embodiment, the thickness of the encapsulating colloid 1 is less than the height of the first power pin 8 or the second power pin 9. In this embodiment, all pins have the same height. In an optional embodiment, the thickness range of the encapsulating colloid 1 is:

[0069] 0.5h < H < 0.8h;

[0070] Where H is the thickness of the encapsulating colloid 1, and h is the height of any one of the pins.

[0071] Specifically, after encapsulating the integrated power semiconductor module with silicone gel, epoxy resin or other encapsulation resin materials, the thickness of the encapsulation colloid 1 must not exceed the height of the terminals and pins in the integrated power semiconductor module, that is, the terminals and pins need to be exposed to ensure connection performance and heat dissipation performance.

[0072] In this embodiment, the thickness of the encapsulating colloid 1 in the encapsulated module should not be too large in order to ensure the heat dissipation effect and connection performance of the internal power chip.

[0073] It is understandable that the above range represents the optimal range for encapsulating colloid 1, but it is not limited to the above range.

[0074] In an optional implementation, the first power pin 8, the second power pin 9, and the third power pin 10 are one of the following: "Z"-shaped gull-wing feet, pin-shaped pins, "S"-shaped surface mount pins, or tile-shaped pins. They can be configured according to actual application requirements to improve external application compatibility.

[0075] In this embodiment, the first power pin 8 and the second power pin 9 can be replaced according to the actual terminal application requirements.

[0076] Specifically, in this embodiment, the power module is used to drive a three-phase motor on an external PCB circuit board. The power pins preferably adopt "Z"-shaped gull-wing feet to improve the stability of the terminal application. Pin-shaped pins, "S"-shaped surface mount pins, tile-shaped pins, etc. can also be used, and the appropriate method can be selected according to the actual situation.

[0077] Specifically, this invention integrates inverter and rectifier into the same module, achieving high integration, low power loss, and promoting energy conservation and emission reduction. The power chips are configured according to a specific circuit, with reasonable electrical clearances, minimal EMC interference, and high device reliability. Each power chip is equipped with a gate control pin, allowing for switching control based on the external AC current. When the current is too high or the frequency is too high, the power module can adjust the conduction frequency in a timely manner, improving safety. After implementing alternating current applications, rectification can be directly achieved through the rectifier section 3 of this module, significantly reducing electrical circuitry and power loss. Integrating inverter and rectifier into a single unit and encapsulating it with silicone results in low cost and excellent electrical insulation performance of the power module.

[0078] The above description is only a specific embodiment of this utility model, but the protection scope of this utility model is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this utility model should be included within the protection scope of this utility model.

Claims

1. A power semiconductor module, characterized by, The package includes a substrate, a plurality of first type power chips, a plurality of second type power chips, a plurality of first power pins, a plurality of second power pins, a plurality of third power pins, and a package adhesive; The first type power chips, the second type power chips, the first power pins, the second power pins, and the third power pins are disposed on the substrate; The first type power chips are connected with the first power pins, the second power pins, and the third power pins, and a plurality of the first type power chips are connected to form a rectification area; The second type power chips are connected with the first power pins, the second power pins, and the third power pins, and a plurality of the second type power chips are connected to form an inverter area; The substrate, the rectification area, and the inverter area are packaged by the package adhesive to form a whole.

2. The integrated power semiconductor module according to claim 1, characterized in that The input end of the rectification area and the output end of the inverter area are on the same side of the substrate.

3. The integrated power semiconductor module according to claim 1, characterized in that The rectification area is provided with a temperature detection device.

4. The integrated power semiconductor module according to claim 3, characterized in that The temperature detection device is a thermistor.

5. The integrated power semiconductor module according to claim 1, characterized by The package adhesive is an insulating adhesive.

6. The integrated power semiconductor module according to claim 5, characterized in that The insulating adhesive is a silicone gel or an epoxy resin material.

7. The integrated power semiconductor module according to claim 1, characterized by The thickness of the package adhesive is less than the height of the first power pin or the second power pin.

8. The integrated power semiconductor module according to claim 7, characterized in that The thickness of the package adhesive ranges from: 0.5h < H < 0.8h; wherein H is the thickness of the package adhesive, and h is the height of the first power pin or the second power pin.

9. The integrated power semiconductor module according to any one of claims 1 to 8, characterized in that The first power pin and the second power pin are any one of a "Z" shaped gull wing pin, a pin-shaped pin, an "S" shaped patch pin, or a tile-shaped pin.

10. The integrated power semiconductor module according to claim 9, characterized by The first type power chip is connected with the first power pin, the second power pin, and the third power pin through a bonding wire. The second type power chip is connected with the first power pin, the second power pin, and the third power pin through a bonding wire.