Chip test fixture and chip test equipment

By integrating heat sinks and heating components into the chip test fixture and using multiple test positions in a circular layout, the problem of uneven temperature in batch chip aging tests is solved, achieving efficient and low-cost chip aging tests.

CN223827706UActive Publication Date: 2026-01-23STELIGHT INSTR CO LTD
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Patent Information

Application Number
CN202423169139.7
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-12-20
Publication Date
2026-01-23
Estimated Expiration
2034-12-20

AI Technical Summary

Technical Problem

Existing chip aging test fixtures cannot meet temperature consistency requirements during batch testing, and high-precision temperature control fixtures are costly and cumbersome to operate, making them unsuitable for efficient batch testing.

Method used

Design a chip test fixture including a heat sink assembly and a heating assembly, with test positions evenly distributed, integrating the heat source and heat sink, eliminating the external heat source assembly, and using multiple test positions in a circular layout to ensure temperature uniformity.

Benefits of technology

It improves the temperature uniformity of chip aging tests, simplifies the fixture structure, reduces costs, and enables efficient aging tests for batch chips.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model provides a chip test fixture and chip test equipment, and relates to the technical field of chip test. According to the utility model, the upper surface of the heat sink assembly of the first clamp is provided with a plurality of test positions which are circularly arranged, the distances between the plurality of test positions and the central position of the heat sink assembly are equal, and each test position is provided with at least one tested chip. The second clamp comprises a plurality of first probe assemblies, and each first probe assembly is in contact with the corresponding tested chip when the second clamp covers the first clamp, so that functional testing is performed on the tested chips. According to the technical scheme, the heat source is diffused to the peripheral side of the heat sink assembly during heating, and the distances between the plurality of test positions and the middle part of the heat sink assembly are equal, so that the tested chip at each test position is uniformly heated, the temperature uniformity of each chip during aging test is improved, and the influence of thermal resistance diffusion is eliminated.
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Description

TECHNICAL FIELD

[0001] The utility model relates to chip testing technical field, especially a kind of chip test fixture and chip testing equipment. BACKGROUND

[0002] In prior art, when chip is subjected to aging test, chip needs to be powered on first, and then heated to the temperature required by aging test by external heat source. Currently, there are two fixtures designed for aging test of chip on the market. One of them is usually designed as rectangle and can place multiple chips, and the multiple chips are placed on both sides of the fixture, and the chips are powered on for aging test after the fixture is heated. After the chips are powered on during aging test, the chips will also generate heat, and due to thermal resistance diffusion, the temperature of the chips in the middle of the fixture is usually higher than that of the chips on both sides of the fixture, which cannot meet the consistency of chip aging test temperature. The other fixture is designed as high-precision temperature control fixture, and only one chip is placed on the fixture, and each fixture is designed with independent heat source assembly, and the fixture is placed in aging test box for aging test, and the heating mode is usually by refrigeration sheet, heating sheet or heating rod. When batch chips are subjected to aging test, fixtures and matching heat source assemblies equivalent to the number of products need to be produced, which greatly increases the cost of chip aging test, and is not suitable for batch and efficient chip aging test, and is complicated to operate and wastes time and thermal cost. SUMMARY

[0003] An object of the utility model is to provide a chip test fixture to solve the technical problem that the consistency of chip test temperature cannot be met when multiple chips are subjected to batch test in prior art.

[0004] A further object of the utility model is to simplify the structure of chip test fixture.

[0005] In particular, the utility model provides a chip test fixture, which comprises:

[0006] The first fixture comprises a heat sink assembly and a heating assembly located at the bottom of the heat sink assembly, the upper surface of the heat sink assembly has a plurality of test sites arranged in a circular shape, the distance between each test site and the center position of the heat sink assembly is equal, and at least one measured chip is placed at each test site;

[0007] The second fixture comprises a plurality of first probe assemblies, each first probe assembly is arranged to contact the corresponding measured chip when the second fixture is closed with the first fixture, so as to perform functional test on the measured chip.

[0008] Optionally, the plurality of test sites are uniformly distributed along the circle.

[0009] Optionally, the plurality of test sites are distributed at the edge of the heat sink assembly.

[0010] Optionally, the heat sink assembly comprises:

[0011] a heat sink body in a circular shape;

[0012] a positioning member provided on the upper surface of the heat sink body and having a plurality of test sites.

[0013] Optionally, the top of the heat sink body has a protrusion in a circular shape.

[0014] The positioning member is in a ring shape and is sleeved on the outer periphery of the protrusion.

[0015] Optionally, the test sites are in a hole shape, and one of the chips under test is placed at each test site.

[0016] Optionally, the second clamp further comprises:

[0017] a first PCB board connected with a testing machine;

[0018] a probe base provided below the first PCB board, a plurality of first probe assemblies penetrating the probe base and one end of each first probe assembly being electrically connected with the first PCB board.

[0019] Optionally, the second clamp further comprises:

[0020] at least one second probe assembly, each second probe assembly penetrating the probe base and one end of each second probe assembly being electrically connected with the first PCB board and the other end being in contact with the heating assembly, so as to power on the heating assembly.

[0021] Optionally, the middle part of the heat sink body has an avoiding hole, and the heating assembly comprises:

[0022] a heating sheet in a circular shape;

[0023] a second PCB board above the heating sheet and connected with the heating sheet, the second PCB board being aligned with the avoiding hole or protruding into the avoiding hole to be in contact with the second probe assembly when the first clamp and the second clamp are closed, so as to power on the heating sheet.

[0024] In particular, the utility model also provides a chip testing device comprising the above chip testing clamp.

[0025] The upper surface of the heat sink assembly of the first clamp is provided with a plurality of test sites arranged in a circular shape, the distance between the plurality of test sites and the middle part of the heat sink assembly is equal, and at least one measured chip is placed at each test site. The second clamp comprises a plurality of first probe assemblies, each first probe assembly is in contact with the corresponding measured chip when the second clamp is combined with the first clamp, so that the measured chip is functionally tested. The above technical scheme diffuses the heat source to the peripheral side of the heat sink assembly during aging heating, and since the plurality of test sites are arranged to have equal distances from the central position of the heat sink assembly, the measured chips at each test site are uniformly heated, the temperature uniformity during aging test of each chip is improved, and the influence of thermal resistance diffusion is excluded.

[0026] Further, the first clamp comprises a heat sink assembly and a heating assembly located at the bottom of the heat sink assembly, the heating assembly and the heat sink assembly are integrated together, the external heat source is cancelled, and the aging heat source assembly does not need to be additionally designed, so that the structure of the chip test clamp is simplified.

[0027] The above and other objects, advantages and features of the present application will become more apparent from the following detailed description of some embodiments thereof, taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0028] Some specific embodiments of the present application will be described in detail below with reference to the accompanying drawings, which are exemplary but not limiting. The same reference signs in the drawings indicate the same or similar components or parts. Those skilled in the art should understand that these drawings are not necessarily drawn to scale. In the drawings:

[0029] Figure 1 is a schematic structural diagram of a chip test clamp according to an embodiment of the present application;

[0030] Figure 2 is a schematic structural diagram of a first clamp according to an embodiment of the present application;

[0031] Figure 3 is a schematic structural diagram of a second clamp according to an embodiment of the present application;

[0032] Figure 4 is a schematic exploded view of a chip test clamp according to an embodiment of the present application;

[0033] Figure 5 is a schematic sectional view of a chip test clamp according to an embodiment of the present application;

[0034] Figure 6 is a schematic structural diagram of a positioning member according to an embodiment of the present application.

[0035] Reference signs:

[0036] 100-chip test fixture, 200-chip under test, 10-first fixture, 20-second fixture, 11-heat sink assembly, 111-heat sink body, 112-positioning member, 113-test site, 114-protrusion, 115-avoidance hole, 116-recess, 117-third positioning hole, 12-heating assembly, 121-heating sheet, 122-second PCB board, 13-bottom plate, 21-cover plate, 22-first PCB board, 23-probe base, 24-first probe assembly, 25-second probe assembly, 211-through hole, 212-first positioning hole, 221-second positioning hole, 231-first positioning column, 232-second positioning column. DETAILED DESCRIPTION

[0037] The embodiments of the present application are described below in detail, examples of which are shown in the drawings, wherein the same or similar notations represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by reference to the drawings are exemplary, and are intended to explain the present application, and cannot be understood as a limitation of the present application.

[0038] In the description of the present application, it should be understood that the terms "upper", "lower", and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the devices or elements indicated must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation of the present application.

[0039] The terms "first", "second", etc. are only for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined with "first", "second" can explicitly or implicitly include at least one of the features, i.e. one or more of the features. In the description of the present application, the meaning of "a plurality of" is at least two, such as two, three, etc., unless otherwise specifically limited. When a certain feature "includes or contains" a certain or certain features, unless otherwise specifically described, it indicates that other features and can further include other features are not excluded.

[0040] Unless otherwise specifically defined and limited, the terms "connection", "installation", and the like should be broadly understood, for example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements, unless otherwise specifically limited. Those skilled in the art should be able to understand the specific meaning of the above terms in the present application according to the specific circumstances.

[0041] Unless otherwise defined, all terms (including technical and scientific terms) used in the description of the embodiments presented herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

[0042] Figure 1 is a schematic structural diagram of a chip test fixture 100 according to an embodiment of the present application, Figure 2 is a schematic structural diagram of a first fixture 10 according to an embodiment of the present application, Figure 3 is a schematic structural diagram of a second fixture 20 according to an embodiment of the present application, Figure 4 is a schematic exploded view of a chip test fixture 100 according to an embodiment of the present application, Figure 5 is a schematic sectional view of a chip test fixture 100 according to an embodiment of the present application. As Figures 1 to 5 shown, in one specific embodiment, the chip test fixture 100 includes a first fixture 10 and a second fixture 20. The first fixture 10 includes a heat sink assembly 11 and a heating assembly 12 located at the bottom of the heat sink assembly 11. The upper surface of the heat sink assembly 11 has a plurality of test sites 113 arranged in a circular pattern. The distance between each test site 113 and the center of the heat sink assembly 11 is equal. At least one chip under test 200 is placed at each test site 113. The second fixture 20 includes a plurality of first probe assemblies 24. Each first probe assembly 24 is configured to contact a corresponding chip under test 200 when the second fixture 20 is closed with the first fixture 10, thereby performing a functional test on the chip under test 200. Here, each first probe assembly 24 includes at least one test probe. The first fixture 10 can be understood as a lower fixture, and the second fixture 20 can be understood as an upper fixture. The second fixture 20 is closed from above the first fixture 10.

[0043] In this embodiment, the heat source spreads to the peripheral side of the heat sink assembly 11 during aging heating. Since the plurality of test sites 213 are arranged at equal distances from the center of the heat sink assembly 21, the chips under test 200 at each test site 113 are uniformly heated, improving the temperature uniformity of each chip under test 200 during aging testing and eliminating the influence of thermal resistance diffusion. In addition, the chip test fixture 100 of this embodiment can simultaneously age more chips under test 200 than a fixture that independently controls the temperature of a single chip for aging. The number of chips under test 200 that can be aged depends on the size of different chips under test 200. The smaller the size, the more chips under test 200 can be aged.

[0044] The first clamp 10 comprises a heat sink assembly 11 and a heating assembly 12 located at the bottom of the heat sink assembly 11, the heating assembly 12 and the heat sink assembly 11 are integrated together, the external heat source is cancelled, and an aging heat source assembly does not need to be additionally designed, so that the structure of the chip test clamp 100 is simplified.

[0045] In some embodiments, the plurality of first probe assemblies 24 are also arranged in a circle, and each first probe assembly 24 is arranged corresponding to one test site 113, so that each first probe assembly 24 is in contact with the measured chip 200 at the corresponding test site 113 when the first clamp 10 and the second clamp 20 are closed.

[0046] In some embodiments, the heat sink assembly 11 is circular, and the distances between the plurality of test sites 113 and the center of the heat sink assembly 11 are equal. In other embodiments, the heat sink assembly 11 can also be provided in other shapes, such as a square or a rectangle, at this time, the plurality of test sites 213 are still arranged in a circle on the surface of the heat sink assembly 21, and the center of the circle formed by the plurality of test sites 213 is arranged at the center of the heat sink assembly 21, so as to ensure that the measured chip 200 arranged at the plurality of test sites 213 is uniformly heated.

[0047] In some embodiments, the chip test clamp 100 is in a whole cylindrical shape, and the diameters of the first clamp 10 and the second clamp 20 are substantially the same.

[0048] In a preferred embodiment, the plurality of test sites 113 are uniformly distributed along a circle. It can be understood that the plurality of measured chips 200 are uniformly distributed along a circle. In other embodiments, the positions of the plurality of test sites 113 can also be designed according to requirements, as long as the distances between the plurality of test sites 113 and the center of the heat sink assembly 11 are equal.

[0049] In some embodiments, the plurality of test sites 113 are distributed at the edges of the heat sink assembly 11, as shown in Figure 2 In other embodiments, the plurality of test sites 113 can also be arranged near the center of the heat sink assembly 11, and the design is specific to requirements. The number of test sites 113 on the heat sink assembly 11 is determined according to the diameter of the heat sink assembly 11. The larger the diameter of the heat sink assembly 11, the more the number of test sites 113, and the smaller the diameter of the heat sink assembly 11, the less the number of test sites 113. The number of test sites 113 determines the number of measured chips 200.

[0050] In some embodiments, the heat sink assembly 11 comprises a heat sink body 111 and a positioning member 112, and the heat sink body 111 is circular. The positioning member 112 is arranged on the upper surface of the heat sink body 111 and has a plurality of test sites 113. It can be understood that the chip under test 200 is positioned by the positioning member 112, and the chip under test 200 is placed on the heat sink body 111, and the heat sink body 111 is used to transfer the heat of the heating assembly 12 to the chip under test 200.

[0051] Figure 6 FIG. 1 is a schematic structural view of the positioning member 112 according to an embodiment of the present application. As shown in Figure 6 Figure 2 In some embodiments, the top of the heat sink body 111 has a protruding part 114 which is circular. The positioning member 112 is annular and is sleeved on the outer periphery of the protruding part 114. Here, the positioning member 112 is a steel sheet, which is equivalent to that the positioning member 112 is sleeved on the heat sink body 111.

[0052] Referring to Figure 6 In some embodiments, the test site 113 is a hole, and one chip under test 200 is placed at each test site 113. When the chip under test 200 is subjected to aging test, the chip under test 200 is placed in the corresponding test site 113 of the positioning member 112. Here, the test site 113 is overall square-shaped and has a size matching that of the chip under test 200. The opposite sides of the test site 113 are provided with semicircular holes, so that the chip under test 200 can be conveniently taken. This embodiment can avoid displacement of the chip under test 200 by designing the hole-shaped test site 113, and can play a positioning role.

[0053] In some embodiments, the second clamp 20 further comprises a first PCB board 22 connected with a test machine and a probe seat 23. The probe seat 23 is arranged below the first PCB board 22, a plurality of first probe assemblies 24 penetrate through the probe seat 23 and are electrically connected with the first PCB board 22 at one end. Here, the first PCB board 22 is circular, and the probe seat 23 is also circular. In other embodiments, the shape of the first PCB board 22 and the shape of the probe seat 23 can also be designed according to specific needs.

[0054] In some embodiments, the second clamp 20 further comprises a cover plate 22 arranged on the top of the first PCB board 22, and the cover plate 22 is provided with a through hole 211 in the middle. The top of the first PCB board 22 is provided with a plurality of first PADs arranged in a rectangular array, and the plurality of first PADs are aligned with the through hole 211 to be connected with an external test machine for power supply.

[0055] ​In some embodiments, the bottom of the first PCB board 22 is provided with a plurality of second PADs. When the first clamp 20 and the second clamp 20 are closed, one end of the first probe assembly 24 can be attached to the power-on PAD of the corresponding chip under test 200, and the other end can be attached to the corresponding second PAD at the bottom of the first PCB board 22, thereby realizing the electrical connection between the first PCB board 22 and the chip under test 200.

[0056] In a preferred embodiment, the cover plate 21 has at least one first positioning hole 212, the first PCB board 22 has at least one second positioning hole 221, and the top of the probe holder 23 has at least one first positioning post 231. The number of first positioning holes 212 is the same as the number of second positioning holes 221 and first positioning posts 231, and they are aligned one-to-one. The first positioning posts 231 pass through the corresponding second positioning holes 221 and first positioning holes 212 in sequence, thereby achieving the positioning of the cover plate 21, the first PCB board 22, and the probe holder 23. In this embodiment, the number of first positioning holes 212, second positioning holes 221, and first positioning posts 231 are all two. In other embodiments, the number of first positioning holes 212, second positioning holes 221, and first positioning posts 231 can also be determined according to specific design requirements, for example, three or four can be provided.

[0057] In some embodiments, the heat sink body 111 is provided with at least one third positioning hole 117, and the bottom of the probe holder 23 is provided with at least one second positioning post 232, the number of second positioning posts 232 being the same as the number of third positioning holes 117. When the first clamp 10 and the second clamp 20 are closed, the second positioning post 232 can pass through the corresponding third positioning hole 117, thereby realizing the positioning of the first clamp 10 and the second clamp 20, thus ensuring that the second probe assembly 25 of the probe holder 23 can be accurately attached to the power-on PAD of the chip under test 200, thereby improving the stability of chip testing.

[0058] In some embodiments, the heat sink body 111 is provided with four third positioning holes 117, and the bottom of the probe holder 23 is provided with four second positioning posts 232. The four third positioning holes 117 and the four second positioning posts 232 are arranged in a square shape, and all four third positioning holes 117 pass through the protrusion 114 of the heat sink body 111. In other embodiments, the number of third positioning holes 117 and second positioning posts 232 can be determined according to specific design requirements.

[0059] This embodiment, through the design of the first positioning hole 212, the second positioning hole 221 and the first positioning post 231, can ensure that the first probe assembly 24 on the probe holder 23 can be accurately fixed on the second PAD corresponding to the first PCB board 22.

[0060] In some embodiments, the second clamp 20 further includes at least one second probe assembly 25, each second probe assembly 25 penetrating the probe holder 23, with one end electrically connected to the first PCB board 22 and the other end in contact with the heating assembly 12, thereby energizing the heating assembly 12. Here, one end of the second probe assembly 25 contacts the second PAD at the bottom of the first PCB board 22.

[0061] This embodiment integrates the heating component 12 and the fixture together. The second probe component 25 on the second fixture 20 is electrically connected to the heating component 12, thereby energizing the heating component 12 when the first fixture 10 and the second fixture 20 are closed. In other words, the heating component 12 and the chip under test 200 can be energized when the first fixture 10 and the second fixture 20 are closed. Furthermore, the design of the first positioning hole 212, the second positioning hole 221, and the first positioning post 231 in this embodiment also ensures that the second probe component 25 on the probe holder 23 can be accurately positioned on the corresponding second PAD on the first PCB board 22.

[0062] In some embodiments, the heat sink body 111 has a clearance hole 115 in the middle, and the heating assembly 21 includes a heating element 121 and a second PCB board 122. The heating element 121 is circular. The second PCB board 122 is located above the heating element 121 and connected to it. The second PCB board 122 is aligned with or protrudes into the clearance hole 115 so as to contact the second probe assembly 25 when the first clamp 10 and the second clamp 20 are closed, thereby energizing the heating element 121. It can be understood that the second probe assembly 25 is in contact with the second PCB board 122, and the upper surface of the second PCB board 122 has at least one third PAD. Each second probe assembly 25 is attached to a third PAD. Here, each second probe assembly 25 has at least one test probe.

[0063] See Figure 5 In some embodiments, the heat sink body 111 has a recess 116 at its bottom. The heating element 121 is located in the recess 116. The first clamp 10 also includes a base plate 13, which is also located in the recess 116 and below the heating element 121.

[0064] The working principle of the chip test fixture 100 in this embodiment is as follows: When the chip under test 200 is subjected to aging test, the chip under test 200 is first placed in the test position 113 corresponding to the positioning member 112. The second fixture 20 is aligned and closed with the first fixture 10 by the second positioning post 232, ensuring that the lower end of the first probe assembly 24 is accurately attached to the power-on PAD corresponding to the chip under test 200, and the upper end of the first probe assembly 24 is attached to the second PAD on the first PCB board 22. The second probe assembly 25 on the lower surface of the first PCB board 22 is attached to the third PAD on the second PCB board 122 to power the heating element 121. The first PAD in the middle rectangular array on the upper surface of the first PCB board 22 is connected to an external tester for power supply.

[0065] This embodiment also provides a chip testing device, which includes the chip testing fixture 100 described above. Details regarding the chip testing fixture 100 will not be provided here.

[0066] In this embodiment, when the chip under test 200 undergoes aging testing, the heat source diffuses outwards. Since the distance between the chip under test 200 and the center of the heat source is uniform, the temperature uniformity of each chip under test 200 during aging testing can be improved, eliminating the influence of thermal resistance diffusion. Furthermore, since each chip under test 200 has chips under test 200 on both sides, the influence of the heat generated by the two chips under test 200 on each chip under test 200 can be considered highly uniform.

[0067] This embodiment aims to solve the technical problem of poor temperature uniformity in fixtures that can simultaneously perform aging tests on multiple chips under test 200, or the problem of cumbersome operation and wasted time and manpower when a single chip under test 200 corresponds to a single fixture. It can achieve simultaneous aging tests on a batch of chips under test 200, while also being simple to operate and saving time and manpower costs.

[0068] Therefore, those skilled in the art should recognize that although many exemplary embodiments of the present invention have been shown and described in detail herein, many other variations or modifications conforming to the principles of the present invention can be directly determined or derived from the disclosure of the present invention without departing from the spirit and scope of the present invention. Therefore, the scope of the present invention should be understood and recognized as covering all such other variations or modifications.

Claims

1. A chip testing fixture, characterized in that, include: A first fixture includes a heat sink assembly and a heating assembly located at the bottom of the heat sink assembly. The upper surface of the heat sink assembly has a plurality of test positions arranged in a circle. The distance between the plurality of test positions and the center position of the heat sink assembly is equal. At least one chip under test is placed at each test position. The second fixture includes a plurality of first probe assemblies, each of which is configured to contact the corresponding chip under test when the second fixture is closed with the first fixture, thereby performing functional testing on the chip under test.

2. The chip testing fixture according to claim 1, characterized in that, The multiple test positions are evenly distributed along a circle.

3. The chip testing fixture according to claim 1, characterized in that, Multiple test positions are distributed at the edge of the heat sink assembly.

4. The chip testing fixture according to claim 1, characterized in that, The heat sink assembly includes: The heat sink body is circular. A positioning element is disposed on the upper surface of the heat sink body and has a plurality of test positions.

5. The chip testing fixture according to claim 4, characterized in that, The top of the heat sink body has a circular protrusion; The positioning element is ring-shaped and is fitted around the outer periphery of the protrusion.

6. The chip testing fixture according to claim 4, characterized in that, The test position is in the shape of a hole, and one chip under test is placed at each test position.

7. The chip testing fixture according to claim 4, characterized in that, The second clamp also includes: The first PCB board is connected to the testing machine. A probe holder is disposed below the first PCB board, and multiple first probe assemblies pass through the probe holder, with one end electrically connected to the first PCB board.

8. The chip testing fixture according to claim 7, characterized in that, The second clamp also includes: At least one second probe assembly, each second probe assembly passing through the probe holder, with one end electrically connected to the first PCB board and the other end in contact with the heating assembly, thereby energizing the heating assembly.

9. The chip testing fixture according to claim 8, characterized in that, The heat sink body has a clearance hole in the middle, and the heating assembly includes: The heating element is round. The second PCB board is located above the heating element and connected to the heating element. The second PCB board is aligned with or protrudes into the clearance hole so as to contact the second probe assembly when the first clamp and the second clamp are closed, thereby energizing the heating element.

10. A chip testing device, characterized in that, Includes the chip test fixture as described in any one of claims 1-9.