Cascade MOSFET load adjusting circuit

Abstract

The utility model discloses a cascade MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) load regulation circuit, which comprises a plurality of cascade MOSFETs and is used for processing large current. The MOSFETs are connected in series or in parallel to improve the current output capability of the circuit, and each MOSFET is connected in series with a small resistor for detecting the voltage flowing through the MOSFET. Small resistors are used as sampling resistors and are used for detecting the current of each MOSFET, an analog-to-digital converter of the microcontroller performs data sampling to obtain the voltage value of each MOSFET, so that the information of the current flowing through each MOSFET is indirectly obtained, and a voltage detection signal is fed back to the MCU. The MCU dynamically adjusts the output size of the digital-to-analog converter according to the feedback signals, controls the conduction condition of one MOSFET and further controls the grid voltage of the other MOSFET, so that the conduction degree of Q1 is adjusted, and by constructing a closed-loop control system comprising a feedback circuit, load change can be automatically adjusted, the output current of each cascaded MOSFET can be balanced, and the environmental influence can be effectively dealt with.

Description

Technical Field

[0001] This application relates to the field of circuit electronics technology, and in particular to a cascaded MOSFET load regulation circuit. Background Technology

[0002] In electronic circuits, the metal-oxide-semiconductor field-effect transistor (MOSFET) is a crucial semiconductor device, playing a vital role in switching and amplification circuits. MOSFETs are widely used in various electrical products due to their ability to handle high power, especially in applications requiring high-power drive. In these applications, the current drawn by a MOSFET can reach tens of amperes.

[0003] However, to increase output current, it is sometimes necessary to use multiple MOSFETs in series. This cascaded configuration can be affected by a number of factors, including:

[0004] Differences in Rds (drain-source resistance) of MOSFETs: Differences in internal resistance between different MOSFETs may lead to uneven current distribution.

[0005] PCB traces: The trace design on a printed circuit board (PCB) also affects the distribution of current.

[0006] Temperature changes: Increases or decreases in temperature can affect the performance of MOSFETs and may lead to changes in current distribution.

[0007] Device aging: Over time, the performance of MOSFETs may degrade, which can also affect current balance.

[0008] Due to these factors, current imbalances may occur in cascaded MOSFETs, causing some MOSFETs to handle excessive current and generate excessive heat. If the heat exceeds the MOSFET's maximum power dissipation, it may damage the MOSFET, thereby affecting the stability and reliability of the entire device.

[0009] Therefore, improving the circuitry of cascaded MOSFETs to ensure balanced current distribution is of significant practical importance for enhancing device stability and extending MOSFET lifespan. Summary of the Invention

[0010] This application provides a cascaded MOSFET load regulation circuit that ensures balanced current distribution, improves device stability, and extends the lifespan of the MOSFET.

[0011] In view of this, the first aspect of this application provides a cascaded MOSFET load regulation circuit, the circuit comprising:

[0012] MOSFET cascade structure, negative feedback circuit and data sampling circuit;

[0013] The MOSFET cascade structure comprises several cascaded MOSFETs;

[0014] The negative feedback circuit includes a sampling resistor connected in series with each of the MOSFETs;

[0015] The data sampling circuit includes an analog-to-digital converter (ADC), a microcontroller, and a digital-to-analog converter (DAC). The microcontroller is connected to both the ADC and the DAC. The ADC is connected to each of the sampling resistors, and the DAC is connected to each of the MOSFETs.

[0016] Optionally, the MOSFET cascade structure specifically includes:

[0017] Several sets of input cascaded MOSFET unit circuits and corresponding several sets of output cascaded MOSFET unit circuits;

[0018] The input cascaded MOSFET unit circuit includes:

[0019] Input stage MOSFET (Q2), protection resistor (R3), and Zener diode (D2);

[0020] The protection resistor (R3) is connected between the gate of the input stage MOSFET (Q2) and ground. The source of the input stage MOSFET (Q2) is grounded, and the drain of the input stage MOSFET (Q2) is connected to the microcontroller through the negative feedback circuit.

[0021] The output cascaded MOSFET unit circuit includes:

[0022] Output stage MOSFET (Q1) and current-limiting resistor (R2);

[0023] The gate of the output stage MOSFET (Q1) is connected to the microcontroller, the source of the output stage MOSFET (Q1) is grounded, and the drain of the output stage MOSFET (Q1) is connected to the gate of the input stage MOSFET (Q2).

[0024] Optionally, several sets of input cascaded MOSFET unit circuits and corresponding sets of output cascaded MOSFET unit circuits are connected by a protection diode (D1).

[0025] Optionally, it also includes: a compensation network;

[0026] The compensation network specifically includes:

[0027] A first capacitor connected in parallel with the drain and source of each of the MOSFETs;

[0028] And a second capacitor connected in parallel with each of the aforementioned sampling resistors.

[0029] As can be seen from the above technical solutions, the embodiments of this application have the following advantages:

[0030] This application provides a cascaded MOSFET load regulation circuit, which includes multiple cascaded MOSFETs for handling large currents. These MOSFETs are connected in series or parallel to improve the circuit's output current capability. A small resistor is connected in series with each MOSFET to detect the voltage flowing through it. These small resistors serve as sampling resistors to detect the current of each MOSFET. The analog-to-digital converter (ADC) of the microcontroller performs data sampling to obtain the voltage value on each MOSFET, thereby indirectly obtaining the current information flowing through each MOSFET. The voltage detection signal is fed back to the MCU. Based on these feedback signals, the MCU dynamically adjusts the output of the ADC, controls the conduction of one MOSFET, and then controls the gate voltage of another MOSFET, thereby adjusting the conduction level of Q1. By constructing a closed-loop control system including feedback circuitry, the circuit can automatically adjust for load changes, balance the output current of each cascaded MOSFET, and effectively cope with environmental influences. Attached Figure Description

[0031] Figure 1 This is a circuit diagram of a cascaded MOSFET load adjustment circuit according to this application. Detailed Implementation

[0032] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present application.

[0033] This application designs a cascaded MOSFET load adjustment circuit, which ensures balanced current distribution, improves device stability, and extends the lifespan of the MOSFET.

[0034] For easier understanding, please refer to Figure 1 , Figure 1 This is a circuit structure diagram of a cascaded MOSFET load adjustment circuit according to an embodiment of this application, as shown below. Figure 1 As shown, specifically:

[0035] MOSFET cascade structure, negative feedback circuit and data sampling circuit;

[0036] A MOSFET cascade structure consists of several cascaded MOSFETs;

[0037] The negative feedback circuit includes sampling resistors connected in series with each MOSFET;

[0038] The data sampling circuit includes an analog-to-digital converter (ADC), a microcontroller, and a digital-to-analog converter (DAC). The microcontroller is connected to both the ADC and the DAC. The ADC is connected to each sampling resistor, and the DAC is connected to each MOSFET.

[0039] Furthermore, the MOSFET cascade structure specifically includes:

[0040] Several sets of input cascaded MOSFET unit circuits and corresponding several sets of output cascaded MOSFET unit circuits;

[0041] The input cascaded MOSFET unit circuit includes:

[0042] Input stage MOSFET Q2, protection resistor R3, and Zener diode D2;

[0043] A protective resistor R3 is connected between the gate of the input stage MOSFET Q2 and ground. The source of the input stage MOSFET Q2 is grounded, and the drain of the input stage MOSFET Q2 is connected to the microcontroller through a negative feedback circuit.

[0044] The output cascaded MOSFET unit circuit includes:

[0045] Output stage MOSFET Q1 and current-limiting resistor R2;

[0046] The gate of the output stage MOSFET Q1 is connected to the microcontroller, the source of the output stage MOSFET Q1 is grounded, and the drain of the output stage MOSFET Q1 is connected to the gate of the input stage MOSFET Q2.

[0047] It should be noted that Q2 (AOD418BA): as the input stage MOSFET, is used to control the initial distribution of current.

[0048] R3 (1KΩ): Connected between the gate of Q2 and ground, it is used to pull down the gate voltage and ensure that the MOSFET is turned off when there is no input signal.

[0049] R1 (0.01Ω): As a current sensing resistor, it is connected in series in the circuit to detect the current flowing through Q1.

[0050] ADC-IN1: Analog input terminal, used to input the voltage signal on R1 to the ADC for conversion.

[0051] Q1 (AOD4184A): MOSFET used for output control, controlling the switching of LEDs.

[0052] D2(SMBJ28CA): Zener diode, used to protect the gate of Q1 from excessive voltage.

[0053] LED-OUT: The output terminal of the LED, which controls the LED's on / off state via Q1.

[0054] R2 (20KΩ): Current-limiting resistor, used to limit the current flowing through the LED and protect the LED from damage by excessive current.

[0055] Furthermore, several sets of input cascaded MOSFET unit circuits and corresponding sets of output cascaded MOSFET unit circuits are connected by a protection diode D1.

[0056] D1: At the LED-OUT terminal, used to protect the circuit from reverse current.

[0057] Furthermore, it also includes: a compensation network;

[0058] The compensation network specifically includes:

[0059] The first capacitor connected in parallel with the drain and source of each MOSFET;

[0060] And a second capacitor connected in parallel with each sampling resistor.

[0061] Circuit connection method:

[0062] The input signal controls the gate of Q2 to turn it on or off, thereby controlling the gate voltage of Q1.

[0063] When Q2 is turned on, the gate voltage of Q1 increases, Q1 turns on, and current flows to ground through R1 and Q1, while simultaneously lighting up the LED through LED-OUT.

[0064] R1 serves as the current sensing resistor, and the voltage drop across it is input to the ADC via ADC-IN1 for current sensing.

[0065] D2 is used to protect the gate of Q1 from voltage spikes.

[0066] R2 is used to limit the current flowing through the LED and protect the LED.

[0067] D1 is used to protect the circuit and prevent reverse current at the LED-OUT terminal from damaging the circuit.

[0068] This circuit controls the LED's switching by controlling the gate voltage of Q1 through Q2, and monitors the circuit by detecting the current through R1. Meanwhile, D1 and D2 provide necessary protection.

[0069] This application provides a cascaded MOSFET load regulation circuit, which includes multiple cascaded MOSFETs for handling large currents. These MOSFETs are connected in series or parallel to improve the circuit's output current capability. A small resistor is connected in series with each MOSFET to detect the voltage flowing through it. These small resistors serve as sampling resistors to detect the current of each MOSFET. The microcontroller's analog-to-digital converter (ADC) performs data sampling to obtain the voltage value of each MOSFET, thereby indirectly obtaining the current information flowing through each MOSFET. The voltage detection signal is fed back to the MCU. Based on these feedback signals, the MCU dynamically adjusts the output of the ADC, controls the conduction of one MOSFET, and then controls the gate voltage of another MOSFET, thereby adjusting the conduction level of Q1. By constructing a closed-loop control system including a feedback circuit, it can automatically adjust load changes, balance the output current of each cascaded MOSFET, and effectively cope with environmental influences.

[0070] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0071] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0072] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0073] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection between apparatuses or units through some interfaces, and may be electrical, mechanical, or other forms.

[0074] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0075] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0076] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes: USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, optical disks, and other media capable of storing program code.

[0077] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A cascaded MOSFET load regulation circuit, characterized in that, include: MOSFET cascade structure, negative feedback circuit and data sampling circuit; The MOSFET cascade structure comprises several cascaded MOSFETs; The negative feedback circuit includes a sampling resistor connected in series with each of the MOSFETs; The data sampling circuit includes an analog-to-digital converter (ADC), a microcontroller, and a digital-to-analog converter (DAC). The microcontroller is connected to both the ADC and the DAC. The ADC is connected to each of the sampling resistors, and the DAC is connected to each of the MOSFETs.

2. The cascaded MOSFET load adjustment circuit according to claim 1, characterized in that, The MOSFET cascade structure specifically includes: Several sets of input cascaded MOSFET unit circuits and corresponding several sets of output cascaded MOSFET unit circuits; The input cascaded MOSFET unit circuit includes: Input stage MOSFET (Q2), protection resistor (R3), and Zener diode (D2); The protection resistor (R3) is connected between the gate of the input stage MOSFET (Q2) and ground. The source of the input stage MOSFET (Q2) is grounded, and the drain of the input stage MOSFET (Q2) is connected to the microcontroller through the negative feedback circuit. The output cascaded MOSFET unit circuit includes: Output stage MOSFET (Q1) and current-limiting resistor (R2); The gate of the output stage MOSFET (Q1) is connected to the microcontroller, the source of the output stage MOSFET (Q1) is grounded, and the drain of the output stage MOSFET (Q1) is connected to the gate of the input stage MOSFET (Q2).

3. The cascaded MOSFET load adjustment circuit according to claim 2, characterized in that, Several sets of input cascaded MOSFET unit circuits and corresponding sets of output cascaded MOSFET unit circuits are connected by a protection diode (D1).

4. The cascaded MOSFET load adjustment circuit according to claim 1, characterized in that, Also includes: Compensation network; The compensation network specifically includes: A first capacitor connected in parallel with the drain and source of each of the MOSFETs; And a second capacitor connected in parallel with each of the aforementioned sampling resistors.

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