Aging test circuit and system of capacitor

By designing a capacitor aging test circuit, the voltage and current of the capacitor are collected in real time, and the charging circuit of the problematic capacitor is detected and cut off. This solves the problems of low safety, low efficiency and high cost in existing capacitor aging tests, and realizes safe and efficient aging tests.

CN223857327UActive Publication Date: 2026-01-30SHENZHEN XINYICHANG TECH CO LTD
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Patent Information

Application Number
CN202423323352.9
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-12-31
Publication Date
2026-01-30
Estimated Expiration
2034-12-31

AI Technical Summary

Technical Problem

Existing capacitor aging test circuits have low safety, low testing efficiency, and high testing costs.

Method used

An aging test circuit for capacitors was designed, including a charge/discharge switching unit, a voltage acquisition unit, a current control unit, and a processing unit. By acquiring the actual voltage and current of the capacitor in real time, the circuit detects problematic capacitors and cuts off their charging circuit, thus achieving simultaneous charging and discharging at the same workstation.

Benefits of technology

It improves the safety and efficiency of aging tests, simplifies the circuit structure, and reduces testing costs.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model is suitable for the technical field of capacitors, and provides an aging test circuit and system for a capacitor, and the aging test circuit is internally provided with a charging and discharging switching unit, a voltage collection unit, a current control unit, a processing unit, a first test end and n second test ends. As the aging test can be simultaneously carried out on n capacitors to be tested at most, the aging test efficiency is improved. As the voltage acquisition unit can acquire the actual voltage at the two ends of each capacitor to be detected in the charging process in real time, the current control unit can acquire the actual current flowing through each capacitor to be detected in the charging process in real time, and the processing unit can detect a defective capacitor according to the actual voltage and the actual current. And the current control unit is controlled to cut off the charging loop of the defective capacitor, so that the safety of the aging test process is improved. The charging and discharging processes of the capacitor to be tested are completed through the charging and discharging switching unit, so that the circuit structure is simplified, and the testing cost is reduced.
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Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of capacitors, and particularly relates to an aging test circuit and system of a capacitor. BACKGROUND

[0002] The aging test process of an aluminum electrolytic capacitor is an important link in the production and manufacturing process of the aluminum electrolytic capacitor. The aging test process is to perform first-time charging and discharging on the manufactured aluminum electrolytic capacitor to simulate the temperature, voltage or current stress that the aluminum electrolytic capacitor is subjected to in the actual use process, so as to not only repair the damaged oxide film medium on the surface of the aluminum electrolytic capacitor, but also screen out defective products. However, the existing aging test circuit of the capacitor has low safety, low test efficiency and high test cost. CONTENT OF THE UTILITY MODEL

[0003] Therefore, the application provides an aging test circuit and system of a capacitor to solve the technical problem of low safety, low test efficiency and high test cost of the existing aging test circuit of the capacitor.

[0004] In a first aspect, an application embodiment provides an aging test circuit of a capacitor, which comprises a charging and discharging switching unit, a voltage acquisition unit, a current control unit, a processing unit, one first test end and n second test ends, n is an integer greater than 1.

[0005] The first test end is used to connect the positive poles of each capacitor to be tested, and each second test end is used to connect the negative pole of a different capacitor to be tested. The first test end and all the second test ends are connected with the charging and discharging switching unit.

[0006] The charging and discharging switching unit is connected with a programmable voltage source and an upper computer. When receiving a charging control signal from the upper computer, the charging and discharging switching unit charges each capacitor to be tested by a charging voltage provided by the programmable voltage source, and controls each capacitor to be tested to discharge when receiving a discharging control signal from the upper computer.

[0007] The voltage acquisition unit is connected with the first test end, all the second test ends and the processing unit. The voltage acquisition unit is used to acquire the actual voltage across each capacitor to be tested during charging, and sends the actual voltage to the processing unit.

[0008] The current control unit is connected with the charging and discharging switching unit and the processing unit. The current control unit is used to acquire the actual current flowing through each capacitor to be tested during charging, and sends the actual current to the processing unit.

[0009] The processing unit is configured to determine a problem capacitor in the to-be-tested capacitor according to the actual voltage and the actual current, and control the current control unit to cut off the charging loop of the problem capacitor.

[0010] In an optional implementation of the first aspect, the charge-discharge switching unit includes a first control switch, a second control switch, and n bidirectional conduction units; the n bidirectional conduction units are in one-to-one correspondence with the n second test terminals respectively;

[0011] The first conduction terminal of the first control switch is connected with the positive electrode of the programmable voltage source, the second conduction terminal of the first control switch is connected with the first conduction terminal of the second control switch at the first test terminal, the first terminal of each bidirectional conduction unit is connected with the corresponding second test terminal, the second terminals of all the bidirectional conduction units are connected with the second conduction terminal of the second control switch at the negative electrode of the programmable voltage source, the third terminal and the fourth terminal of each bidirectional conduction unit are connected with the current control unit, and the controlled terminal of the first control switch and the controlled terminal of the second control switch are connected with the host computer;

[0012] The first control switch, the second control switch, and each bidirectional conduction unit are configured to jointly control the on-off of the charge-discharge loop of each to-be-tested capacitor.

[0013] In an optional implementation of the first aspect, the voltage acquisition unit has one positive electrode voltage acquisition terminal, one positive electrode voltage output terminal, n negative electrode voltage acquisition terminals, and n negative electrode voltage output terminals; the n negative electrode voltage acquisition terminals and the n negative electrode voltage output terminals are in one-to-one correspondence with the n second test terminals respectively; the positive electrode voltage acquisition terminal of the voltage acquisition unit is connected with the first test terminal, each negative electrode voltage acquisition terminal of the voltage acquisition unit is connected with the corresponding second test terminal, and the positive electrode voltage output terminal of the voltage acquisition unit and all the negative electrode voltage output terminals are connected with the processing unit.

[0014] The voltage acquisition unit includes a positive electrode voltage acquisition unit and n negative electrode voltage acquisition units; the n negative electrode voltage acquisition units are in one-to-one correspondence with the n negative electrode voltage acquisition terminals and the n negative electrode voltage output terminals respectively.

[0015] The input terminal of the positive electrode voltage acquisition unit serves as the positive electrode voltage acquisition terminal of the voltage acquisition unit, and the output terminal of the positive electrode voltage acquisition unit serves as the positive electrode voltage output terminal of the voltage acquisition unit; the positive electrode voltage acquisition unit is configured to acquire the voltage of the positive electrode of each to-be-tested capacitor in the charging process, and send the voltage of the positive electrode to the processing unit.

[0016] The input end of each negative electrode voltage collection unit is a negative electrode voltage collection end of the corresponding voltage collection unit, and the output end of each negative electrode voltage collection unit is a negative electrode voltage output end of the corresponding voltage collection unit; the negative electrode voltage collection unit is configured to collect the voltage of the negative electrode of the corresponding capacitor under test during charging and send the voltage of the negative electrode to the processing unit.

[0017] In an optional implementation of the first aspect, the current control unit includes n current collection units and n constant current control units; the n current collection units and the n constant current control units each correspond to one of the n bidirectional conduction units;

[0018] Each current collection unit is connected to the fourth end of the corresponding bidirectional conduction unit and the first control end of the corresponding constant current control unit; the current collection unit is configured to collect the actual current flowing through the corresponding capacitor under test during charging and send the actual current to the processing unit through the corresponding constant current control unit;

[0019] The second control end of each constant current control unit is connected to the corresponding bidirectional conduction unit, and the controlled end of each constant current control unit is connected to the processing unit; the constant current control unit is configured to adjust the charging current of the corresponding capacitor under test under the control of the processing unit.

[0020] In an optional implementation of the first aspect, the processing unit includes a channel selection unit, a digital signal processor, and a serial-to-parallel conversion unit.

[0021] The channel selection unit includes n first input ends, n second input ends, and an output end; the n first input ends are respectively connected to the n negative electrode voltage output ends of the voltage collection units, the n second input ends are respectively connected to the n output ends of the current control units, and the output end of the channel selection unit is connected to the first input end of the digital signal processor; the channel selection unit is configured to acquire, through the n first input ends, the voltage of the negative electrode of each capacitor under test during charging, acquire, through the n second input ends, the actual current flowing through each capacitor under test during charging, and send, in a multiple-to-one manner, the voltage of the negative electrode of each capacitor under test and the actual current flowing through each capacitor under test to the digital signal processor during charging, respectively.

[0022] The second input end of the digital signal processor is connected with the positive voltage output end of the voltage collection unit, and the output end of the digital signal processor is connected with the input end of the series-parallel conversion unit; the digital signal processor is used for acquiring the voltage of the positive pole of each capacitor under test in the charging process through the second input end, and determining the problem capacitor in the capacitor under test according to the actual current flowing through each capacitor under test and the voltage of the positive pole and the voltage of the negative pole of each capacitor under test, and sending the charging interruption instruction for the problem capacitor to the series-parallel conversion unit;

[0023] The n output ends of the series-parallel conversion unit are connected with the current control unit, and the n output ends correspond to the n capacitors under test respectively; the series-parallel conversion unit is used for outputting the charging interruption signal to the current control unit through the output end corresponding to the problem capacitor, so that the current control unit cuts off the charging loop of the problem capacitor.

[0024] In an optional implementation of the first aspect, the positive voltage collection unit includes a first resistor and a second resistor; a first end of the first resistor serves as the positive voltage collection unit, a second end of the first resistor is connected with a first end of the second resistor and serves as an output end of the positive voltage collection unit, and a second end of the second resistor is grounded.

[0025] In an optional implementation of the first aspect, the negative voltage collection unit includes a third resistor and a fourth resistor; a first end of the third resistor serves as an input end of the negative voltage collection unit, a second end of the third resistor is connected with a first end of the fourth resistor and serves as an output end of the negative voltage collection unit, and a second end of the fourth resistor is grounded.

[0026] In an optional implementation of the first aspect, the current collection unit includes a fifth resistor; a first end of the fifth resistor is connected with a fourth end of the corresponding bidirectional conduction unit to the ground, and a second end of the fifth resistor is connected with the corresponding constant current control unit.

[0027] In an optional implementation of the first aspect, the constant current control unit includes a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, an operational amplifier, a first capacitor, a second capacitor, a third control switch and a fourth control switch.

[0028] The first end of the sixth resistor is connected to the first conduction end of the third control switch and the current collection diode, the second conduction end of the third control switch is connected to the third end of the corresponding bidirectional conduction unit, the second end of the sixth resistor is connected to the first end of the seventh resistor and serves as the output end of the constant current control unit, the second end of the seventh resistor is connected to the first end of the first capacitor and the negative input end of the operational amplifier, the second end of the first capacitor is connected to the first end of the eighth resistor and the output end of the operational amplifier, the second end of the eighth resistor, the first end of the second capacitor and the control end of the third control switch are connected to the first conduction end of the fourth control switch, the second end of the second capacitor is connected to the second conduction end of the fourth control switch and the ground, the control end of the fourth control switch serves as the control end of the constant current control unit, the first end of the ninth resistor serves as the reference voltage input end of the search constant current control unit, the reference voltage input end is connected to the processing unit, and the second end of the ninth resistor is connected to the positive input end of the operational amplifier.

[0029] In a second aspect, the embodiments of the present application provide a capacitor aging test system, comprising a host computer, a programmable voltage source and m capacitor aging test circuits according to any one of the optional implementation manners of the first aspect, wherein m is a positive integer.

[0030] The capacitor aging test circuit and system provided by the embodiments of the present application have the following beneficial effects:

[0031] The embodiments of the present application configure the charge-discharge switching unit, the voltage collection unit, the current control unit, the processing unit, the first test end and the n second test ends in each aging test circuit. Since the first test end and the n second test ends can be connected to at most n capacitors to be tested, the aging test circuit can simultaneously perform aging test on at most n capacitors to be tested, thereby improving the aging test efficiency of the capacitor. Since the voltage collection unit can collect the actual voltage between the two ends of each capacitor to be tested in real time, the current control unit can collect the actual current flowing through each capacitor to be tested in real time, and the processing unit can detect the problem capacitor in the capacitor to be tested according to the actual voltage and the actual current, and control the current control unit to timely cut off the charging circuit of the problem capacitor, the safety of the aging test process is improved. Since the charging process and the discharging process of the capacitor to be tested are completed by the charge-discharge switching unit, the same station charging and discharging of the capacitor in the aging test process is realized, thereby simplifying the circuit structure of the aging test circuit and reducing the test cost. BRIEF DESCRIPTION OF DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description only constitute some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained from these drawings without creative labor.

[0033] Figure 1 A structural schematic diagram of an aging test system of a capacitor provided by an embodiment of the present application;

[0034] Figure 2 A structural schematic diagram of an aging test circuit of a capacitor provided by an embodiment of the present application;

[0035] Figure 3 A structural schematic diagram of an aging test circuit of a capacitor provided by another embodiment of the present application;

[0036] Figure 4 A circuit structural schematic diagram of an aging test circuit of a capacitor provided by an embodiment of the present application. DETAILED DESCRIPTION

[0037] It should be noted that the terms used in the embodiments of the present application are only used to explain the specific embodiments of the present application, and are not intended to limit the present application. In the description of the embodiments of the present application, unless otherwise specified, "a plurality of" means two or more than two, "at least one", "one or more" means one, two or more than two. The terms "first", "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features limited by "first", "second" can explicitly or implicitly include one or more features.

[0038] In the present specification, the reference to "one embodiment" or "some embodiments" and the like means that the specific features, structures or characteristics described in connection with the embodiment are included in one or more embodiments of the present application. Therefore, the statements "in one embodiment", "in some embodiments", "in other some embodiments", "in other some embodiments" and the like appearing in different places in the present specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized. The terms "include", "contain", "have" and their variants mean "include but not limited to", unless otherwise specifically emphasized.

[0039] The aging test process of the aluminum electrolytic capacitor is an important link in the production process of the aluminum electrolytic capacitor. The aging test process is to charge and discharge the aluminum electrolytic capacitor for the first time to simulate the stress such as temperature, voltage or current that the aluminum electrolytic capacitor receives in the actual use process, so as to not only repair the damaged oxide film medium on the surface of the aluminum electrolytic capacitor, but also screen out defective products.

[0040] Specifically, when the aluminum electrolytic capacitor is charged for the first time, a lower voltage is usually used to slowly charge the aluminum electrolytic capacitor. During the charging process, as the amount of electricity stored in the aluminum electrolytic capacitor increases, the voltage across the aluminum electrolytic capacitor gradually rises to the maximum voltage that the aluminum electrolytic capacitor can withstand. In this process, the tiny defects on the oxide film medium on the surface of the aluminum electrolytic capacitor will reform a more solid oxide film under the action of the electric field, thereby repairing the oxide film medium. However, if there is a serious defect in the oxide film medium, the anode aluminum foil of the capacitor and the electrolyte will conduct through the serious defect during the charging process, thereby instantaneously short-circuiting the capacitor. In this way, the voltage across the capacitor will instantaneously decrease to the initial voltage, resulting in internal flashover or explosion of the capacitor and other phenomena, which poses a safety hazard.

[0041] Therefore, in order to improve the safety of the aging test process of the capacitor, improve the aging test efficiency of the capacitor, and reduce the aging test cost of the capacitor, the embodiments of the present application provide a capacitor aging test circuit and system. Figure 1 A structure diagram of a capacitor aging test system provided by the embodiments of the present application is shown in FIG. 1. The aging test system can be used to perform aging test on an aluminum electrolytic capacitor or other capacitors having a similar structure to the aluminum electrolytic capacitor. As shown in FIG. 1, the aging test system can include a host computer 10, a programmable voltage source 20, and m aging test circuits 30. m is a positive integer, and the specific value of m can be set according to actual needs, which is not particularly limited in the embodiments of the present application. Figure 1

[0042] Among them, the host computer 10 and the programmable voltage source 20 are in communication connection, and the host computer 10 and all the aging test circuits 30 are in communication connection. The communication connection can be wireless communication connection or wired communication connection. Exemplarily, the wireless communication connection can include wireless fidelity (WIFI) connection or Bluetooth connection, etc. The wired communication connection can include serial communication connection (for example, connection based on RS-485 or RS-422 serial communication interface, etc.) or parallel communication connection, etc. The communication connection mode is not particularly limited in the embodiments of the present application.

[0043] ​In practical applications, the host computer 10 can be an intelligent terminal device (for example, a mobile phone or a computer, etc.), a server, a programmable logic controller (PLC), or a microcontroller (for example, a single-chip microcomputer), etc. The specific type of the host computer 10 is not particularly limited in the embodiments of the present application.

[0044] The aging test circuit 30 is used for performing an aging test on a capacitor to be tested (for example, an aluminum electrolytic capacitor). Each aging test circuit 30 can simultaneously perform an aging test on at most n capacitors to be tested. n is an integer greater than 1, and the specific value of n can be set according to actual requirements. For example, n can be 64.

[0045] The programmable voltage source 20 is used for providing a preset charging voltage for each aging test circuit 30, and the size of the preset charging voltage can be controlled by the host computer 10.

[0046] The host computer 10 is used for controlling the charging and discharging timing of each aging test circuit 30.

[0047] Specifically, when it is necessary to charge the capacitor to be tested, the host computer 10 can send a charging control signal to the aging test circuit 30. After receiving the charging control signal, the aging test circuit 30 can charge each capacitor to be tested based on the preset charging voltage of the programmable voltage source 20. In addition, the aging test circuit 30 can also collect the actual voltage across each capacitor to be tested and the actual current flowing through each capacitor to be tested during the charging process, and detect whether there is a problem capacitor with unqualified quality in the capacitor to be tested based on the actual voltage and the actual current, and when it is detected that there is a problem capacitor in the capacitor to be tested, cut off the charging circuit of the problem capacitor to stop charging the problem capacitor.

[0048] After the charging is completed, when it is necessary to discharge the capacitor to be tested, the host computer 10 can send a discharging control signal to the aging test circuit 30. After receiving the discharging control signal, the aging test circuit 30 can control each capacitor to be tested to discharge, so as to restore the voltage across the capacitor to be tested to the initial state before charging, for subsequent use.

[0049] In addition, after the capacitor to be tested completes the aging test, the host computer 10 can obtain the aging test information (for example, the actual current across each capacitor to be tested during the charging process, the actual current flowing through each capacitor to be tested during the charging process, or the identification information of the problem capacitor, etc.) of each capacitor to be tested from each aging test circuit 30, so as to facilitate the test personnel to monitor the aging test process, or facilitate the test personnel to remove the problem capacitor from the capacitor to be tested, etc.

[0050] It can be seen from the above that, by configuring the host computer, the programmable voltage source and the m aging test circuits in the capacitor aging test system, the host computer controls the charging and discharging time of each aging test circuit and the charging voltage provided by the programmable voltage source, so that the intelligent control of the capacitor aging test process can be realized. Since each aging test circuit can simultaneously perform aging test on at most n capacitors to be tested, the entire aging test system can simultaneously perform aging test on at most m x n capacitors to be tested, thereby improving the aging test efficiency of the capacitor. Since the aging test circuit can monitor the actual voltage across each capacitor to be tested and the actual current flowing through each capacitor to be tested in real time during the charging process, and can cut off the charging circuit of the problematic capacitor in time when the problematic capacitor is detected based on the actual voltage and the actual current, the safety hazard is reduced, and the safety of the aging test process is improved. In addition, since the aging test circuit can not only charge each capacitor to be tested, but also discharge each capacitor to be tested directly after charging, i.e. the charging process and the discharging process involved in the capacitor aging test process are completed based on the same circuit, the circuit structure of the aging test circuit is simplified, and the aging test cost of the capacitor is reduced.

[0051] The structure and working principle of the aging test circuit provided by the embodiment of the application will be described below.

[0052] Figure 2 A structure diagram of an aging test circuit provided by the embodiment of the application is shown in FIG. 3. As shown in FIG. 3, the aging test circuit 30 can include a charging and discharging switching unit 301, a voltage acquisition unit 302, a current control unit 303, a processing unit 304, a data transmission unit 305, a first test end A and n second test ends B1-Bn. Figure 2

[0053] The first test end A can be used to connect the positive poles of each capacitor to be tested, and each second test end can be used to connect the negative pole of a different capacitor to be tested. For example, the first second test end B1 can be used to connect the negative pole of the first capacitor to be tested Cx1, the second second test end B2 can be used to connect the negative pole of the second capacitor to be tested Cx2, and so on, and the n th second test end Bn can be used to connect the negative pole of the n th capacitor to be tested Cxn.

[0054] ​The charge-discharge switching unit 301 is connected with the programmable voltage source 20 and the host computer 10. Specifically, the positive power supply end of the charge-discharge switching unit 301 is connected with the positive pole of the programmable voltage source 20, the negative power supply end of the charge-discharge switching unit 301 is connected with the negative pole of the programmable voltage source 20, and the controlled end of the charge-discharge switching unit 301 is connected with the host computer 10. Optionally, the charge-discharge switching unit 301 can be used to connect the first test end A to the positive pole of the programmable voltage source 20 and connect each second test end B1-Bn to the negative pole of the programmable voltage source 20 when receiving the charging control signal from the host computer 10, so as to charge each capacitor Cx1-Cxn to be tested by the preset charging voltage provided by the programmable voltage source 20. Optionally, the charge-discharge switching unit 301 can also be used to disconnect the first test end A from the positive pole of the programmable voltage source 20 and connect the first test end A to the negative pole of the programmable voltage source 20 when receiving the discharging control signal from the host computer 10, so as to discharge each capacitor Cx1-Cxn to be tested.

[0055] The voltage collection unit 302 is connected with the first test end A, all second test ends B1-Bn, and the processing unit 304. The voltage collection unit 302 can be used to collect the actual voltage across each capacitor Cx1-Cxn to be tested during the charging process and send the actual voltage across each capacitor Cx1-Cxn to be tested during the charging process to the processing unit 304.

[0056] The current control unit 303 is connected with the charge-discharge switching unit 301 and the processing unit 304. The current control unit 303 can be used to collect the actual current flowing through each capacitor Cx1-Cxn to be tested during the charging process and send the actual current flowing through each capacitor Cx1-Cxn to be tested during the charging process to the processing unit 304. The current control unit 303 can also be used to adjust the charging current of each capacitor Cx1-Cxn to be tested under the control of the processing unit 304.

[0057] The processing unit 304 is connected with the data transmission unit 305. The processing unit 304 can be used to detect whether there is a problem capacitor in the capacitors Cx1-Cxn to be tested according to the actual voltage across each capacitor Cx1-Cxn to be tested during the charging process and the actual current flowing through each capacitor Cx1-Cxn to be tested during the charging process, and control the current control unit 303 to adjust the charging current of the problem capacitor to 0, i.e., cut off the charging circuit of the problem capacitor, so as to stop charging the problem capacitor when detecting that there is a problem capacitor in the capacitors Cx1-Cxn to be tested.

[0058] In addition, the processing unit 304 can also be configured to send the aging test information of each capacitor to be tested Cx1~Cxn or the identification information of the problem capacitor to the host computer 10 through the data transmission unit 305 when receiving the problem capacitor information acquisition instruction from the host computer 10.

[0059] It can be understood that in actual application, the aging test circuit 30 can further include a power supply unit (not shown in the figure). The power supply unit can be configured to supply power for each unit in the aging test circuit 30, so as to ensure that each unit in the aging test circuit 30 can work normally.

[0060] As can be seen from the above, the embodiment of the present application is configured with the charge-discharge switching unit, the voltage acquisition unit, the current control unit, the processing unit, the first test terminal and the n second test terminals in each aging test circuit. Since the first test terminal and the n second test terminals can be connected with at most n capacitors to be tested, the aging test circuit can simultaneously perform aging test on at most n capacitors to be tested, thereby improving the aging test efficiency of the capacitors. Since the voltage acquisition unit can acquire the actual voltage across each capacitor to be tested in real time during the charging process, the current control unit can acquire the actual current flowing through each capacitor to be tested in real time during the charging process, and the processing unit can detect the problem capacitor in the capacitor to be tested according to the actual voltage and the actual current, and control the current control unit to timely cut off the charging circuit of the problem capacitor, the safety of the aging test process is improved. Since the charging process and the discharging process of the capacitor to be tested are both completed by the charge-discharge switching unit, the same station charging and discharging of the capacitor during the aging test process is realized, thereby simplifying the circuit structure of the aging test circuit and reducing the test cost.

[0061] Figure 3 A structural schematic diagram of an aging test circuit according to another embodiment of the present application is provided. As shown in Figure 3 In an optional embodiment, the charge-discharge switching unit 301 can include a first control switch 3011, a second control switch 3012 and n bidirectional conduction units 3013, and the n bidirectional conduction units correspond to the n second test terminals B1~Bn one by one.

[0062] The first conduction end of the first control switch 3011 is connected to the positive power supply end of the charge-discharge switching unit 301, the second conduction end of the first control switch 3011 and the first conduction end of the second control switch 3012 are connected to the first test end A, the first end of each bidirectional conduction unit 3013 is connected to the corresponding second test end Bn, the second ends of all bidirectional conduction units 3013 are connected to the second conduction end of the second control switch 3012 and serve as the negative power supply end of the charge-discharge switching unit 301, the third end and the fourth end of each bidirectional conduction unit 3013 are connected to the current control unit 303, and the controlled end of the first control switch 3011 and the controlled end of the second control switch 3012 are connected to the host computer 20 (not shown in the figure).

[0063] The first control switch 3011, the second control switch 3012, and the bidirectional conduction units 3013 can be used to jointly control the on-off of the charge-discharge circuits of the capacitors Cx1-Cxn.

[0064] Specifically, when it is necessary to charge the capacitors Cx1-Cxn, the host computer 10 can send a charge control signal to the charge-discharge switching unit 301. The charge control signal can include a first conduction signal for controlling the first control switch 3011 to be turned on and a first turn-off signal for controlling the second control switch 3012 to be turned off. The first control switch 3011 can be turned on upon receiving the first conduction signal to connect the first test end A to the positive electrode of the programmable voltage source 20. The second control switch 3012 can be turned off upon receiving the first turn-off signal to disconnect the first test end A from the negative electrode of the programmable voltage source 20. The bidirectional conduction units 3013 can connect the charge circuits of the corresponding capacitors Cx1-Cxn to allow the programmable voltage source 20 to charge the capacitors Cx1-Cxn based on the preset charge voltage when the first control switch 3011 is turned on and the second control switch 3012 is turned off.

[0065] When it is necessary to discharge the capacitors Cx1-Cxn, the host computer 10 can send a discharge control signal to the charge-discharge switching unit 301. The discharge control signal can include a second turn-off signal for controlling the first control switch 3011 to be turned off and a second conduction signal for controlling the second control switch 3012 to be turned on. The first control switch 3011 can be turned off upon receiving the second turn-off signal to disconnect the first test end A from the positive electrode of the programmable voltage source 20. The second control switch 3012 can be turned on upon receiving the second conduction signal to connect the first test end A to the negative electrode of the programmable voltage source 20. The bidirectional conduction units 3013 can connect the discharge circuits of the corresponding capacitors Cx1-Cxn to discharge the capacitors Cx1-Cxn when the first control switch 3011 is turned off and the second control switch 3012 is turned on.

[0066] like Figure 3 As shown, in an optional embodiment, the voltage acquisition unit 302 may have one positive voltage acquisition terminal, one positive voltage output terminal, n negative voltage acquisition terminals, and n negative voltage output terminals. The n negative voltage acquisition terminals correspond one-to-one with the n second test terminals B1~Bn, and the n negative voltage output terminals correspond one-to-one with the n negative voltage acquisition terminals. The positive voltage acquisition terminal of the voltage acquisition unit 302 is connected to the first test terminal A, each negative voltage acquisition terminal of the voltage acquisition unit 302 is connected to its corresponding second test terminal, and the positive voltage output terminal and all negative voltage output terminals of the voltage acquisition unit 302 are connected to the processing unit 304.

[0067] The voltage acquisition unit 302 may include a positive voltage acquisition unit 3021 and n negative voltage acquisition units 3022, with each of the n negative voltage acquisition units 3022 corresponding to a negative voltage acquisition terminal and a negative voltage output terminal.

[0068] Specifically, the input terminal of the positive voltage acquisition unit 3021 serves as the positive voltage acquisition terminal of the voltage acquisition unit 301, and the output terminal of the positive voltage acquisition unit 3021 serves as the positive voltage output terminal of the voltage acquisition unit 301. The positive voltage acquisition unit 3021 can be used to acquire the voltage of the positive terminals of n capacitors Cx1 to Cxn during the charging process, and send the voltage of the positive terminals of the n capacitors Cx1 to Cxn during the charging process to the processing unit 304.

[0069] The input terminal of each negative voltage acquisition unit 3022 can serve as the negative voltage acquisition terminal of the corresponding voltage acquisition unit 301, and the output terminal of each negative voltage acquisition unit 3022 can serve as the negative voltage output terminal of the corresponding voltage acquisition unit 301. The negative voltage acquisition unit 3022 can be used to acquire the voltage of the negative terminal of the corresponding capacitor under test during the charging process, and send the voltage of the negative terminal of the corresponding capacitor under test during the charging process to the processing unit 304.

[0070] like Figure 3 As shown, in an optional embodiment, the current control unit 303 may include n current acquisition units 3031 and n constant current control units 3032, each of which corresponds to one of the n bidirectional conduction units 3013.

[0071] Each current acquisition unit 3031 is connected to the fourth terminal of the corresponding bidirectional conduction unit 3013 and the first control terminal of the corresponding constant current control unit 3032. The current acquisition unit 3031 is used to acquire the actual current flowing through the corresponding capacitor under test during the charging process, and sends the actual current flowing through the corresponding capacitor under test during the charging process to the processing unit 304 through the corresponding constant current control unit 3032.

[0072] Each constant current control unit 3032 has its second control terminal connected to the third terminal of its corresponding bidirectional conduction unit 3013. Both the output terminal and the controlled terminal of each constant current control unit 3032 are connected to the processing unit 304. The constant current control unit 3032 is used to output the actual current flowing through the corresponding capacitor under test during charging to the processing unit 304 via its output terminal. The constant current control unit 3032 is also used to adjust the charging current of the corresponding capacitor under test under the control of the processing unit 304.

[0073] like Figure 3 As shown, in an optional embodiment, the processing unit 304 may include a channel selection unit 3041, a digital signal processor 3042, and a serial-to-parallel conversion unit 3043.

[0074] The channel selection unit 3041 includes n first input terminals, n second input terminals, and one output terminal. The n first input terminals of the channel selection unit 3041 are respectively connected to the n negative voltage output terminals of the voltage acquisition unit 302. The n second input terminals of the channel selection unit 3041 are respectively connected to the output terminals of the n constant current control units 3032. The output terminal of the channel selection unit 3041 is connected to the first input terminal of the digital signal processor 3042. The channel selection unit 3041 can acquire the negative voltage of each capacitor Cx1 to Cxn during charging through the n first input terminals, and can acquire the actual current flowing through each capacitor Cx1 to Cxn during charging through the n second input terminals. Furthermore, it can send the negative voltage of each capacitor Cx1 to Cxn and the actual current flowing through each capacitor Cx1 to Cxn during charging to the digital signal processor 3042 in a multiple-choice manner.

[0075] The second input terminal of the digital signal processor 3042 is connected to the output terminal of the positive voltage acquisition unit 3021, and the output terminal of the digital signal processor 3042 is connected to the input terminal of the serial-to-parallel conversion unit 3043. The digital signal processor 3042 can acquire the voltage at the positive terminal of each capacitor under test (Cx1-Cxn) during the charging process through its second input terminal. Furthermore, the digital signal processor 3042 can identify the problematic capacitor among the capacitors under test (Cx1-Cxn) based on the actual current flowing through each capacitor under test (Cx1-Cxn) during charging, as well as the voltages at the positive and negative terminals of each capacitor under test (Cx1-Cxn), and send a charging interruption command to the serial-to-parallel conversion unit 3043 for the problematic capacitor. The charging interruption command is used to instruct the current control unit 303 to disconnect the charging circuit of the problematic capacitor.

[0076] The serial-to-parallel conversion unit 3043 may include n output terminals, each corresponding one-to-one with one of the n constant current control units 3032. Specifically, each output terminal of the serial-to-parallel conversion unit 3043 can be connected to the controlled terminal of the corresponding constant current control unit 3032. When receiving a charging interruption command for a problematic capacitor, the serial-to-parallel conversion unit 3043 can output a corresponding charging interruption signal to the corresponding constant current control unit 3032 through the output terminal corresponding to the problematic capacitor. This causes the corresponding constant current control unit 3032 to adjust the charging current of the problematic capacitor to 0, thereby cutting off the charging circuit of the problematic capacitor and stopping the charging of the problematic capacitor.

[0077] Figure 4 This is a schematic diagram of the circuit structure of an aging test circuit for a capacitor provided in an embodiment of this application. Figure 4 As shown, in a specific embodiment, both the first control switch 3011 and the second control switch 3012 can be semiconductor switches or other types of switches. This application does not limit the specific types of the first control switch 3011 and the second control switch 3012. Exemplarily, a semiconductor switch can include a transistor, a triac, or a silicon controlled rectifier (SCR). The transistor can include a metal-oxide-semiconductor field-effect transistor (MOSFET) or an insulated-gate bipolar transistor (IGBT).

[0078] Exemplarily, taking the first control switch 3011 as a first NMOS tube (i.e. N-type MOSFET) Q1 as an example, the drain of the first NMOS tube Q1 is the first conduction end of the first control switch 3011, the source of the first NMOS tube Q1 is the second conduction end of the first control switch 3011, and the gate of the first NMOS tube Q1 is the controlled end of the first control switch 3011.

[0079] Exemplarily, taking the second control switch 3012 as a second NMOS tube Q2 as an example, the drain of the second NMOS tube Q2 is the first conduction end of the second control switch 3012, the source of the second NMOS tube Q2 is the second conduction end of the second control switch 3012, and the gate of the second NMOS tube Q2 is the controlled end of the second control switch 3012.

[0080] In the case that the first control switch 3011 is a first NMOS tube and the second control switch 3012 is a second NMOS tube Q2, the first conduction signal in the above charging control signal can be a high-level signal, and the first turn-off signal can be a low-level signal. The second turn-off signal in the above discharging control signal can be a low-level signal, and the second conduction signal can be a high-level signal.

[0081] As shown in Figure 4 In one specific embodiment, the bidirectional conduction unit 3013 can be a bridge structure. For example, the bidirectional conduction unit 3013 can include a first diode D1, a second diode D2, a third diode D3, and a fourth diode D4. Among them, the cathode of the first diode D1 and the anode of the third diode D3 are commonly connected and serve as the first end of the bidirectional conduction unit 3013, the cathode of the second diode D2 and the anode of the fourth diode D4 are commonly connected and serve as the second end of the bidirectional conduction unit 3013, the cathode of the third diode D3 and the cathode of the fourth diode D4 are commonly connected and serve as the third end of the bidirectional conduction unit 3013, and the anode of the first diode D1 and the anode of the second diode D2 are commonly connected and serve as the fourth end of the bidirectional conduction unit 3013.

[0082] As shown in Figure 4 In one specific embodiment, the positive voltage acquisition unit 3021 can include a first resistor R2 and a second resistor R2. Among them, the first end of the first resistor R1 can serve as the input end of the positive voltage acquisition unit 3021, the second end of the first resistor R1 and the first end of the second resistor R2 are commonly connected and serve as the output end of the positive voltage acquisition unit 3021, and the second end of the second resistor R2 is grounded.

[0083] As shown in Figure 4As shown, in one specific embodiment, each negative electrode voltage collection unit 3022 can include a third resistor R3 and a fourth resistor R4. The first end of the third resistor R3 serves as the input end of the negative electrode voltage collection unit 3022, the second end of the third resistor R3 and the first end of the fourth resistor R4 are connected together and serve as the output end of the negative electrode voltage collection unit 3022, and the second end of the fourth resistor R4 is grounded.

[0084] As shown, in one specific embodiment, each negative electrode voltage collection unit 3022 can include a third resistor R3 and a fourth resistor R4. The first end of the third resistor R3 serves as the input end of the negative electrode voltage collection unit 3022, the second end of the third resistor R3 and the first end of the fourth resistor R4 are connected together and serve as the output end of the negative electrode voltage collection unit 3022, and the second end of the fourth resistor R4 is grounded. Figure 4 As shown, in one specific embodiment, each current collection unit 3031 can include a fifth resistor R5. The first end of the fifth resistor R5 is connected to the ground through the fourth end of the corresponding bidirectional conduction unit 3013, and the second end of the fifth resistor R5 is connected to the corresponding constant current control unit 3032.

[0085] Each constant current control unit 3032 can include a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, an operational amplifier UA1, a first capacitor C1, a second capacitor C2, a third control switch 30321, and a fourth control switch 30322.

[0086] The first end of the sixth resistor R6 and the first conduction end of the third control switch 30321 are connected together and serve as the first control end of the constant current control unit 3032, the second conduction end of the third control switch 30321 serves as the second control end of the constant current control unit 3032, the second end of the sixth resistor R6 and the first end of the seventh resistor R7 are connected together and serve as the output end of the constant current control unit 3032, the second end of the seventh resistor R7 and the first end of the first capacitor C1 are connected together and serve as the negative input end of the operational amplifier UA1, the second end of the first capacitor C1 and the first end of the eighth resistor R8 are connected together and serve as the output end of the operational amplifier UA1, the second end of the eighth resistor R8, the first end of the second capacitor C2, and the controlled end of the third control switch 30321 are connected together and serve as the first conduction end of the fourth control switch 30322, the second end of the second capacitor C2 and the second conduction end of the fourth control switch 30322 are connected together and serve as the ground, the controlled end of the fourth control switch 30322 serves as the controlled end of the constant current control unit 3032, the first end of the ninth resistor R9 serves as the reference voltage input end of the constant current control unit 3032, the reference voltage input end of the constant current control unit 3032 is connected to the digital signal processor 3042, and the second end of the ninth resistor R9 is connected to the positive input end of the operational amplifier UA1.

[0087] The seventh resistor R7, the first capacitor C1, the eighth resistor R8, the third control switch 30321, the second capacitor C2, the operational amplifier UA1, and the ninth resistor R9 constitute a cross current control circuit.

[0088] Specifically, the positive input terminal of the operational amplifier UA1 can be used as a reference voltage input terminal for receiving a reference voltage Vref from the digital signal processor 3042. Different voltage differences between the positive input terminal and the negative input terminal of the operational amplifier UA1 can cause the operational amplifier UA1 to output different level signals. For example, when the reference voltage Vref at the positive input terminal of the operational amplifier UA1 is greater than the voltage at the negative input terminal, the operational amplifier UA1 outputs a high-level signal; when the reference voltage Vref at the positive input terminal of the operational amplifier UA1 is less than the voltage at the negative input terminal, the operational amplifier UA1 outputs a low-level signal. The level signal output by the operational amplifier UA1 is subjected to low-pass filtering by the eighth resistor R8 and the second capacitor C2, and is then applied to the controlled terminal of the third control switch 30321. Based on this, the magnitude of the level signal output by the operational amplifier UA1 can be adjusted by adjusting the size of the reference voltage Vref, thereby adjusting the conduction degree of the third control switch 30321. By adjusting the conduction degree of the third control switch 30321, the charging current of the capacitor under test can be adjusted, so that not only the constant current charging of each capacitor under test can be achieved, but also the charging current of the problem capacitor can be adjusted to 0 when needed, so as to cut off the charging circuit of the problem capacitor. The size of the reference voltage Vref can be set according to actual needs, and the present application does not make special limitations thereto.

[0089] In actual applications, the third control switch 30321 and the fourth control switch 30322 can be semiconductor switches or other types of switches. The present application does not limit the specific types of the third control switch 30321 and the fourth control switch 30322.

[0090] Exemplarily, taking the third control switch 30321 as a third NMOS tube Q3 as an example, the source electrode of the third NMOS tube Q3 is the first conduction terminal of the third control switch 30321, the drain electrode of the third NMOS tube Q3 is the second conduction terminal of the third control switch 30321, and the gate electrode of the third NMOS tube Q3 is the controlled terminal of the third control switch 30321.

[0091] Exemplarily, taking the fourth control switch 30322 as a fourth NMOS tube Q4 as an example, the drain electrode of the fourth NMOS tube Q4 is the first conduction terminal of the fourth control switch 30322, the source electrode of the fourth NMOS tube Q4 is the second conduction terminal of the fourth control switch 30322, and the gate electrode of the fourth NMOS tube Q4 is the controlled terminal of the fourth control switch 30322.

[0092] In the case where the third control switch 30321 is a third NMOS tube Q3 and the fourth control switch 30322 is a fourth NMOS tube Q4, the above-mentioned charging interruption signal can be a high-level signal.

[0093] The working principle of the aging test system of the capacitor provided by the embodiment of the present application is described below.

[0094] As shown in Figures 1 to 4 When it is needed to perform the aging test on the to-be-tested capacitors, the positive poles of the to-be-tested capacitors are connected to the first test end A of the aging test circuit 30, and the negative poles of each to-be-tested capacitor are connected to one of the second test ends of the aging test circuit 30.

[0095] Before starting the aging test on the to-be-tested capacitors, the preset charging voltage and the preset charging current of the to-be-tested capacitors during the aging test can be set in the host computer 10.

[0096] When starting the aging test on the to-be-tested capacitors, the host computer 10 can control the programmable voltage source 20 to output the power supply signal with the voltage being the preset charging voltage to each aging test circuit 30. In addition, the host computer 10 can send the charging control signal to each aging test circuit 30 to control the first control switch 3011 to be turned on and the second control switch 3012 to be turned off. In the case that the first control switch 3011 is turned on and the second control switch 3012 is turned off, the positive pole of each to-be-tested capacitor Cx1-Cxn is connected to the positive pole of the programmable voltage source 30, and the negative pole of each to-be-tested capacitor is connected to the negative pole of the programmable voltage source 30 through the first end of the bidirectional conduction unit 3013, the third end of the bidirectional conduction unit 3013, the third control switch 30321, the fifth resistor R5, the fourth end of the bidirectional conduction unit 3013 and the second end of the bidirectional conduction unit 3013, so that the programmable voltage source 30 charges each to-be-tested capacitor Cx1-Cxn.

[0097] In the charging process, the voltage of the positive electrode of the capacitor to be measured Cx1-Cxn is sent into the digital signal processor 3042 after being divided by the first resistor R1 and the second resistor R2; the voltage of the negative electrode of the capacitor to be measured Cx1-Cxn is sent into the channel selection unit 3041 after being divided by the third resistor R3 and the fourth resistor R4; the actual current flowing through the capacitor to be measured generates a voltage drop on the fifth resistor R5, which is sent into the channel selection unit 3041 after being divided by the sixth resistor R6 and the seventh resistor R7, and is sent into the negative input terminal of the operational amplifier UA1 after passing through the sixth resistor R6 and the seventh resistor R7. The channel selection unit 3041 can adopt a one-to-many mode to sequentially transmit the received voltage of the negative electrode of each capacitor to be measured Cx1-Cxn and the actual current flowing through each capacitor to be measured Cx1-Cxn in the charging process to the digital signal processor 3042. The digital signal processor 3042 can calculate the actual voltage across each capacitor to be measured Cx1-Cxn in the charging process based on the voltage of the positive electrode and the voltage of the negative electrode of each capacitor to be measured Cx1-Cxn, and detect whether there is a problem capacitor in the capacitor to be measured Cx1-Cxn according to the actual voltage across each capacitor to be measured Cx1-Cxn in the charging process and the actual current flowing through each capacitor to be measured Cx1-Cxn. For example, when the actual voltage across a certain capacitor to be measured in the charging process suddenly drops to the initial value after slowly rising to a certain voltage value, it indicates that the capacitor to be measured may be instantaneously short-circuited, i.e., the capacitor to be measured is a problem capacitor.

[0098] In order to improve the safety of the aging test process of the capacitor, when the digital signal processor 3043 detects a problem capacitor, it can send a charging interruption instruction for the problem capacitor to the series-parallel conversion unit 3043, and the series-parallel conversion unit 3043 can output a charging interruption signal (such as a high-level signal) through the corresponding output terminal to control the fourth control switch 30322 to be turned off, so as to connect the controlled terminal of the third control switch 30321 to the ground to turn off the third control switch 30321, thereby cutting off the charging circuit of the problem capacitor and stopping charging the problem capacitor.

[0099] When the charging is completed, and the discharging of each capacitor Cx1-Cxn to be tested is needed, the host computer 10 can send a discharging control signal to each aging test circuit 30 to control the first control switch 3011 to be off and the second control switch 3012 to be on. When the first control switch 3011 is off and the second control switch 3012 is on, the connection between the positive electrode of each capacitor Cx1-Cxn to be tested and the positive electrode of the programmable voltage source 30 is disconnected, and the positive electrode of each capacitor Cx1-Cxn to be tested is connected to the negative electrode of each capacitor Cx1-Cxn to be tested through the second end of the bidirectional conduction unit 3013, the third end of the bidirectional conduction unit 3013, the third control switch 30321, the fifth resistor R5, the fourth end of the bidirectional conduction unit 3013, and the first end of the bidirectional conduction unit 3013, so as to discharge each capacitor Cx1-Cxn to be tested.

[0100] After the aging test is completed, when the tester wants to remove the problem capacitors from the capacitors Cx1-Cxn to be tested, the host computer 10 can obtain the identification information of the problem capacitors from the aging test circuit 30, and thus the efficient removal of the problem capacitors can be accurately realized.

[0101] As can be seen from the above, the aging test circuit for capacitors provided by the embodiments of the present application can batch test a plurality of capacitors to be tested, thereby improving the aging test efficiency of the capacitors. In addition, since the charging circuit of the problem capacitors can be disconnected in time when the problem capacitors are detected, the safety of the aging test can be improved. Since the charging and discharging during the aging test of the capacitors are realized by the same circuit, the circuit structure is simple, and the test cost is low.

[0102] Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the division of the above functional units is exemplified, and in actual application, the above functions can be completed by different functional units according to needs, that is, the structure of the aging test circuit is divided into different functional units to complete all or part of the above described functions. Each functional unit included in the aging test circuit can be integrated on one circuit board. In addition, the specific names of each functional unit are only for easy distinction, and do not limit the protection scope of the present application.

[0103] In the above embodiments, the description of each embodiment has its own emphasis, and the parts not described or recorded in detail in a certain embodiment can be referred to the related description of other embodiments.

[0104] The above-described embodiments are only used to illustrate the technical solutions of the present application, but not limit them; although the present application is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement to part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.

Claims

1. An aging test circuit for a capacitor, comprising: The device comprises a charge-discharge switching unit, a voltage acquisition unit, a current control unit, a processing unit, a first test terminal and n second test terminals, n being an integer greater than 1. The first test terminal is used for connecting the positive poles of each capacitor to be tested, each second test terminal is used for connecting the negative pole of a different capacitor to be tested, and the first test terminal and all the second test terminals are connected to the charge-discharge switching unit. The charge-discharge switching unit is connected to a programmable voltage source and an upper computer, and is used for charging each capacitor to be tested by a charging voltage provided by the programmable voltage source when receiving a charging control signal from the upper computer, and controlling each capacitor to be tested to discharge when receiving a discharging control signal from the upper computer. The voltage acquisition unit is connected to the first test terminal, all the second test terminals and the processing unit, and is used for acquiring actual voltages across each capacitor to be tested during charging and sending the actual voltages to the processing unit. The current control unit is connected to the charge-discharge switching unit and the processing unit. The current control unit is used for acquiring actual currents flowing through each capacitor to be tested during charging and sending the actual currents to the processing unit. The processing unit is used for determining a problem capacitor in the capacitors to be tested according to the actual voltages and the actual currents, and controlling the current control unit to cut off the charging circuit of the problem capacitor.

2. The capacitor burn-in test circuit of claim 1, wherein, The charge-discharge switching unit comprises a first control switch, a second control switch and n bidirectional conduction units, and the n bidirectional conduction units correspond to the n second test terminals one by one. The first conduction terminal of the first control switch is connected to the positive pole of the programmable voltage source, the second conduction terminal of the first control switch and the first conduction terminal of the second control switch are connected to the first test terminal, the first end of each bidirectional conduction unit is connected to the corresponding second test terminal, the second ends of all the bidirectional conduction units are connected to the second conduction terminal of the second control switch and the negative pole of the programmable voltage source, the third end and the fourth end of each bidirectional conduction unit are connected to the current control unit, and the controlled terminal of the first control switch and the controlled terminal of the second control switch are connected to the upper computer. The first control switch, the second control switch and each bidirectional conduction unit are used for jointly controlling the on-off of the charge-discharge circuit of each capacitor to be tested.

3. The capacitor burn-in circuit of claim 1, wherein, The voltage acquisition unit has a positive voltage acquisition end, a positive voltage output end, n negative voltage acquisition ends and n negative voltage output ends, the n negative voltage acquisition ends and the n negative voltage output ends are respectively one-to-one corresponding to the n second test ends; the positive voltage acquisition end of the voltage acquisition unit is connected with the first test end, each negative voltage acquisition end of the voltage acquisition unit is connected with the corresponding second test end, and the positive voltage output end and all the negative voltage output ends of the voltage acquisition unit are connected with the processing unit; The voltage acquisition unit includes a positive voltage acquisition unit and n negative voltage acquisition units, and the n negative voltage acquisition units are respectively one-to-one corresponding to the n negative voltage acquisition ends and the n negative voltage output ends; The input end of the positive voltage acquisition unit serves as the positive voltage acquisition end of the voltage acquisition unit, and the output end of the positive voltage acquisition unit serves as the positive voltage output end of the voltage acquisition unit; the positive voltage acquisition unit is used for acquiring the voltage of the positive electrode of each capacitor to be tested in the charging process and sending the voltage of the positive electrode to the processing unit; The input end of each negative voltage acquisition unit serves as the negative voltage acquisition end of the corresponding voltage acquisition unit, and the output end of each negative voltage acquisition unit serves as the negative voltage output end of the corresponding voltage acquisition unit; the negative voltage acquisition unit is used for acquiring the voltage of the negative electrode of the corresponding capacitor to be tested in the charging process and sending the voltage of the negative electrode to the processing unit.

4. The capacitor burn-in test circuit of claim 2, wherein, The current control unit includes n current acquisition units and n constant current control units; the n current acquisition units and the n constant current control units are respectively one-to-one corresponding to the n bidirectional conduction units; Each current acquisition unit is connected with the fourth end of the corresponding bidirectional conduction unit and the first control end of the corresponding constant current control unit; the current acquisition unit is used for acquiring the actual current flowing through the corresponding capacitor to be tested in the charging process and sending the actual current to the processing unit through the corresponding constant current control unit; The second control end of each constant current control unit is connected with the corresponding bidirectional conduction unit, and the controlled end of each constant current control unit is connected with the processing unit; the constant current control unit is used for adjusting the charging current of the corresponding capacitor to be tested under the control of the processing unit.

5. The capacitor burn-in circuit of any one of claims 1-4, wherein, The processing unit includes a channel selection unit, a digital signal processor and a serial-parallel conversion unit; The channel selection unit includes n first input ends, n second input ends and an output end; the n first input ends are respectively connected with the n negative voltage output ends of the voltage acquisition unit, the n second input ends are respectively connected with the n output ends of the current control unit, and the output end of the channel selection unit is connected with the first input end of the digital signal processor; The channel selection unit is configured to acquire the voltage of the negative electrode of each of the capacitors under test during the charging process through the n first input ends, acquire the actual current flowing through each of the capacitors under test during the charging process through the n second input ends, and send the voltage of the negative electrode of each of the capacitors under test and the actual current flowing through each of the capacitors under test to the digital signal processor in a one-to-many manner during the charging process; The second input end of the digital signal processor is connected with the positive electrode voltage output end of the voltage acquisition unit, and the output end of the digital signal processor is connected with the input end of the serial-parallel conversion unit; The digital signal processor is configured to acquire the voltage of the positive electrode of each of the capacitors under test through the second input end, and determine the problem capacitor in the capacitors under test according to the actual current flowing through each of the capacitors under test, and the voltage of the positive electrode and the voltage of the negative electrode of each of the capacitors under test during the charging process, and send the charging interruption instruction for the problem capacitor to the serial-parallel conversion unit; The n output ends of the serial-parallel conversion unit are connected with the current control unit, and the n output ends are one-to-one corresponding to the n capacitors under test; the serial-parallel conversion unit is configured to output the charging interruption signal to the current control unit through the output end corresponding to the problem capacitor, so that the current control unit cuts off the charging loop of the problem capacitor.

6. The capacitor burn-in test circuit of claim 3, wherein, The positive electrode voltage acquisition unit comprises a first resistor and a second resistor; the first end of the first resistor is connected with the second end of the second resistor as the output end of the positive electrode voltage acquisition unit; and the second end of the second resistor is grounded.

7. The capacitor burn-in circuit of claim 3, wherein, The negative electrode voltage acquisition unit comprises a third resistor and a fourth resistor; the first end of the third resistor is connected with the second end of the fourth resistor as the output end of the negative electrode voltage acquisition unit; and the second end of the fourth resistor is grounded.

8. The capacitor burn-in test circuit of claim 4, wherein, The current acquisition unit comprises a fifth resistor; the first end of the fifth resistor is connected with the fourth end of the corresponding bidirectional conduction unit to the ground; and the second end of the fifth resistor is connected with the corresponding constant current control unit.

9. The capacitor burn-in circuit of claim 4, wherein, The constant current control unit comprises a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, an operational amplifier, a first capacitor, a second capacitor, a third control switch and a fourth control switch; The constant current control unit comprises a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, an operational amplifier, a first capacitor, a second capacitor, a third control switch and a fourth control switch; The first end of the sixth resistor is connected to the first conducting end of the third control switch and the current collection diode, the second conducting end of the third control switch is connected to the third end of the corresponding bidirectional conducting unit, the second end of the sixth resistor is connected to the first end of the seventh resistor and serves as the output end of the constant current control unit, the second end of the seventh resistor is connected to the first end of the first capacitor and the negative input end of the operational amplifier, the second end of the first capacitor is connected to the first end of the eighth resistor and the output end of the operational amplifier, the second end of the eighth resistor, the first end of the second capacitor and the controlled end of the third control switch are connected to the first conducting end of the fourth control switch, the second end of the second capacitor is connected to the second conducting end of the fourth control switch and the ground, the controlled end of the fourth control switch serves as the controlled end of the constant current control unit, the first end of the ninth resistor serves as the reference voltage input end of the search constant current control unit, the reference voltage input end is connected to the processing unit, and the second end of the ninth resistor is connected to the positive input end of the operational amplifier.

10. An aging test system for capacitors, characterized by, The aging test circuit comprises an upper computer, a programmable voltage source and m capacitors according to any one of claims 1-9, wherein m is a positive integer.