Sensing chip packaging test structure and application circuit device
By directly mounting the sensor chip COB module onto the application test board, the packaging process is omitted, which solves the problems of long testing cycles and high costs after the sensor chip is fabricated, and realizes fast and low-cost chip characteristic testing.
Patent Information
- Application Number
- CN202520201296.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-08
- Publication Date
- 2026-01-30
- Estimated Expiration
- 2035-02-08
AI Technical Summary
Existing technologies suffer from long cycles and high costs in detecting chip characteristics after the sensor chip is fabricated.
The sensor chip COB module is directly mounted on the application test board, eliminating the chip packaging process. Combined with the protection of the packaging layer, it enables rapid packaging and complete testing within the range of -65°C to +150°C.
It enables rapid and low-cost chip characteristic testing, meeting the requirements of design and application.
Smart Images
Figure CN223857350U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model belongs to chip test technical field, concretely relates to a kind of sensing chip package test structure and application circuit device. BACKGROUND
[0002] At present, whether sensing chip design end or application test end faces a problem, that is, how to test the function of chip as soon as possible after chip flow out, so that the characteristics of chip can be tested as soon as possible or the possible problems of chip can be found.
[0003] In prior art, the commonly used method is to carry out fast blind package when wafer comes out or to carry out fast package after wafer CP test, and then to carry out complete chip characteristic test using designed application circuit board, but the disadvantage of this method is that the whole process takes a lot of time, and the cost is also very high. UTILITY MODEL CONTENT
[0004] The utility model aims at providing a kind of sensing chip package test structure and application circuit device, to solve the problem of long detection chip characteristic period and high cost after sensing chip flow out.
[0005] Therefore, the utility model provides a kind of sensing chip package test structure, including sensing chip COB module, application test board, the sensing chip COB module is fixedly installed on the application test board.
[0006] Preferably, the sensing chip COB module includes sensing chip, and the sensing chip has a plurality of IO Pad.
[0007] Preferably, the application test board is provided with position frame.
[0008] Preferably, the size of the position frame matches the sensing chip COB module.
[0009] Preferably, the application test board is provided with a plurality of connection points.
[0010] Preferably, the connection point is connected with the IO Pad through circuit.
[0011] Preferably, the application test board is provided with packaging layer.
[0012] A kind of sensing chip application circuit device is also provided, including the sensing chip package test structure, and the sensing chip package test structure is connected with chip power supply, peripheral component and sensor device.
[0013] Preferably, the sensing chip package test structure is also connected with temperature sensor.
[0014] Preferably, the sensor chip packaging test structure is further connected with a calibration board interface.
[0015] Advantages:
[0016] 1. The utility model provides a kind of sensor chip packaging test structure and application circuit device, and sensor chip is directly combined with the circuit of test application board by sensor chip COB module, without spending a lot of time and cost to do chip rapid packaging, and can be in the range of-65C to +150C Chip characteristic complete test is carried out, meet the requirement of design end and application end. BRIEF DESCRIPTION OF DRAWINGS
[0017] In order to more clearly illustrate the technical scheme in the embodiments of the utility model or the prior art, the drawings needed to be used in the embodiment or the prior art description will be briefly introduced below, and obviously, the drawings in the following description are only some embodiments of the present application, and those skilled in the art can obtain other drawings according to these drawings without creating labor.
[0018] Figure 1 For the structure diagram of embodiment 1 of a kind of sensor chip packaging test structure provided by the utility model.
[0019] Figure 2 For the structure diagram of sensor chip COB module of embodiment 1 of a kind of sensor chip packaging test structure provided by the utility model.
[0020] Figure 3 For the structure diagram of application test board of embodiment 1 of a kind of sensor chip packaging test structure provided by the utility model.
[0021] Figure 4 For the structure diagram of embodiment 1 of a kind of sensor chip application circuit device provided by the utility model.
[0022] In the drawing, 1-sensor chip COB module, 11-sensor chip, 12-IO Pad, 2-application test board, 21-position frame, 22-connection point, 3-sensor chip packaging test structure, 4-chip power supply, 5-peripheral component, 6-sensor device, 7-temperature sensor, 8-calibration board interface, 9-chip probing pad interface. DETAILED DESCRIPTION
[0023] The content of the utility model can be more easily understood by referring to the following detailed description of preferred implementation method of the utility model and including embodiments. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as generally understood by those skilled in the art to which the present application belongs. When there is a conflict, the definition in the specification shall prevail.
[0024] Embodiment 1:
[0025] A sensor chip packaging test structure is provided as shown in Figures 1-3 The sensor chip packaging test structure comprises:
[0026] The sensor chip COB module 1 and the application test board 2, the sensor chip COB module 1 is fixedly installed on the application test board 2.
[0027] The sensor chip COB module 1 comprises a sensor chip 11, and the sensor chip 11 has a plurality of IO pads 12. The sensor chip COB (Chip On Board) module is to directly install the packaged bare chip on the application test board 2, omit the process of chip packaging, reduce the packaging cost, reduce the area of the application test board 2, and reduce the material cost. The IO pad 12 is an input / output pad, and the IO pad 12 is a physical connection point on the surface of the chip, which is an interface for signal transmission and interaction between the internal circuit of the chip and the external circuit or other chips. Each IO pad 12 of the sensor chip 11 is a single die system, which can be regarded as a relatively independent functional module and can independently complete a specific task under certain conditions. The sensor chip COB module directly combines the sensor chip with the circuit of the test application board, without spending a lot of time and cost to do chip rapid packaging, and can perform complete chip characteristic test in the range of -65C to +150C, meeting the requirements of the design end and the application end.
[0028] The application test board 2 is provided with a position frame 21, and the size of the position frame 21 matches the sensor chip COB module 1. The application test board 2 is provided with a plurality of connection points 22. The connection points 22 are connected with the IO pads 12 through lines. The application test board 2 is a PCB circuit board, and the size of the position frame 21 is determined according to the size of the sensor chip COB module 1, and the sensor chip COB module 1 is installed in the position frame 21.
[0029] The application test board 2 is provided with a packaging layer. The packaging layer is an epoxy resin material, and the lines or the sensor chip 11 are packaged and protected by means of glue dropping or glue pouring.
[0030] As shown in Figure 4 A sensor chip application circuit device is also provided, comprising a sensor chip packaging test structure 3, and the sensor chip packaging test structure 3 is electrically connected with a chip power supply 4, peripheral components 5, sensor components 6, temperature sensors 7, a calibration board interface 8, and a chip probing pad interface 9.
[0031] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, and are not intended to limit the present application. Although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacements for part or all of the technical features. These modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.
Claims
1. A sensor chip package test structure, characterized by, The application relates to a sensor chip COB module and an application test board. The sensor chip COB module comprises a sensor chip, and the sensor chip is provided with a plurality of IO pads.
2. The sensor chip package test structure of claim 1, wherein, The application test board is provided with a position frame.
3. The sensor chip package test structure of claim 2, wherein, The size of the position frame matches the sensor chip COB module.
4. The sensor chip package test structure of claim 3, wherein, The application test board is provided with a plurality of connection points.
5. The sensor chip package test structure of claim 2, wherein, The connection points are connected with the IO pads through lines.
6. The sensor chip package test structure of claim 5, wherein, The application test board is provided with a packaging layer.
7. The sensor chip package test structure of claim 6, wherein, The application further relates to a sensor chip packaging test structure connected with a chip power supply, peripheral components and sensor components.
8. A sensor chip application circuit arrangement, characterized by The sensor chip packaging test structure is further connected with a temperature sensor.
9. The sensor chip package test structure of claim 8, wherein, The sensor chip packaging test structure is further connected with a calibration board interface.
10. The sensor chip package test structure of claim 8, wherein,