Pixel

Abstract

The pixel may include: a first transistor including a gate electrode connected with a first node, a first electrode electrically connected with a first power supply line supplied with a first power supply, and a second electrode connected with a second node; a second transistor including a gate electrode supplied with a first scan signal, a first electrode electrically connected with a data line supplied with a data signal, and a second electrode; a third transistor including a gate electrode supplied with the first scan signal, a first electrode connected to a third node, and a second electrode connected to the first node; a first capacitor connected between the second electrode of the second transistor and the third node; and a light emitting element including a first electrode and a second electrode electrically connected with a second power supply line supplied with a second power supply having a different level from the first power supply.

Description

TECHNICAL FIELD

[0001] The utility model relates to the area of pixel drive circuit reduces the pixel. BACKGROUND

[0002] A display device can be a device composed of various electronic components such as a display panel for displaying an image, an input sensor for sensing an external input, and an electronic module. The electronic components can be electrically connected to each other through variously arranged signal lines. The display panel includes a plurality of pixels. Each of the plurality of pixels includes a light emitting element for generating light and a pixel driving circuit for controlling an amount of current flowing to the light emitting element. SUMMARY

[0003] The utility model discloses a kind of pixel driving circuit area reduction pixels and display device comprising it.

[0004] According to the pixel of an embodiment of the utility model, it can include: a first transistor including a gate electrode connected to a first node, a first electrode electrically connected to a first power supply line provided with a first power supply, and a second electrode connected to a second node; a second transistor including a gate electrode provided with a first scan signal, a first electrode electrically connected to a data line provided with a data signal, and a second electrode; a third transistor including a gate electrode provided with the first scan signal, a first electrode connected to a third node, and a second electrode connected to the first node; a first capacitor connected between the second electrode of the second transistor and the third node; and a light emitting element including a first electrode and a second electrode electrically connected to a second power supply line provided with a second power supply, wherein the second power supply has a different level from the first power supply.

[0005] The utility model can further include: a fourth transistor including a gate electrode provided with a first light emitting control signal, a first electrode connected to the first electrode of the light emitting element, and a second electrode connected to the second node.

[0006] The utility model can further include: a fifth transistor including a gate electrode provided with a second scan signal, a first electrode connected to a voltage line provided with an initialization voltage, and a second electrode connected to the third node.

[0007] The utility model can further include: a sixth transistor including a gate electrode provided with a second light emitting control signal, a first electrode connected to the first power supply line, and a second electrode connected to the first electrode of the first transistor.

[0008] The utility model can further include: a second capacitor connected between the first power supply line and the first node.

[0009] During a first section, the first scan signal and the second scan signal can be activated, and during the first section, the initialization voltage is provided to the first node, the second node, and the third node, respectively.

[0010] During a second section continuous with the first section, the first scan signal and the second emission control signal can be activated, and during the second section, a voltage value obtained by subtracting a threshold voltage of the first transistor from the first power supply is provided to the first node.

[0011] During a third section continuous with the second section, the first scan signal can be activated, and during the third section, the data signal is provided to the first node and the third node.

[0012] During a fourth section continuous with the third section, the second scan signal and the first emission control signal can be activated, and during the fourth section, the initialization voltage is provided to the first electrode of the light emitting element.

[0013] During a fifth section continuous with the fourth section, the first emission control signal and the second emission control signal can be activated.

[0014] The first capacitor can have a smaller capacitance than the second capacitor.

[0015] The second emission control signal can be a signal obtained by shifting the second scan signal by a prescribed time amount.

[0016] A display device according to an embodiment of the present disclosure can include a display panel including a plurality of pixels. Each of the plurality of pixels can include a light emitting element and a pixel driving circuit electrically connected to the light emitting element. The pixel driving circuit can include a first transistor electrically connected between the light emitting element and a first power supply line to which a first power supply is supplied, and including a gate electrode connected to a first node; a second transistor electrically connected between a data line to which a data signal is supplied and the first node, and including a gate electrode to which a first scan signal is supplied; a third transistor connected between the first node and the second transistor, and including a gate electrode to which the first scan signal is supplied; and a first capacitor connected between the second transistor and the third transistor.

[0017] The pixel driving circuit can further include a fourth transistor connected between the light emitting element and the first transistor, and including a gate electrode to which a first emission control signal is supplied.

[0018] The pixel driving circuit can further include a fifth transistor connected between a voltage line provided with an initialization voltage and the third transistor, and including a gate electrode provided with a second scan signal.

[0019] The pixel driving circuit can further include a sixth transistor connected between the first power supply line and the first transistor, and including a gate electrode provided with a second light emission control signal.

[0020] The pixel driving circuit can further include a second capacitor connected between the first power supply line and the first node.

[0021] The first capacitor can have a smaller capacitance than the second capacitor.

[0022] The second light emission control signal can be a signal in which the second scan signal is shifted by a prescribed time amount.

[0023] The light emitting element can be connected to the fourth transistor.

[0024] (Advantages)

[0025] As described above, according to the present application, the pixel driving circuit is configured with six transistors having P-type, three voltage lines, four gate control lines, and one data line, so that the area of the pixel driving circuit can be relatively reduced. Thus, a pixel having a reduced area of the pixel driving circuit and a display device including the same can be provided. Also, the pixel density of the pixel can be increased. A high-resolution pixel having a resolution of 4000 ppi (pixel per inch) or more can be easily designed. Thus, a pixel having improved display quality and a display device including the same can be provided. BRIEF DESCRIPTION OF DRAWINGS

[0026] Figure 1 is a perspective view of a display device of an embodiment of the present application.

[0027] Figure 2 is a perspective view showing a situation in which a user wears a display device of an embodiment of the present application.

[0028] Figure 3 is a block diagram of a display device of an embodiment of the present application.

[0029] Figure 4 is an equivalent circuit diagram of a pixel of an embodiment of the present application.

[0030] Figure 5 is a timing chart for explaining an operation of a display device of an embodiment of the present application.

[0031] Figures 6 to 10is a diagram for explaining the operation of a pixel of an embodiment of the present application.

[0032] Figure 11 is an equivalent circuit diagram of a pixel of an embodiment of the present application.

[0033] Explanation of reference numerals

[0034] 1000: display device; DP: display panel; PX: pixel; PCij: pixel driving circuit; LD: light emitting element; T1: first transistor; T2: second transistor; T3: third transistor; GI: first scan signal; GWGC: second scan signal; EB: first light emission control signal; EM: second light emission control signal DETAILED DESCRIPTION

[0035] In the present specification, in the case where a certain constitutional element (or region, layer, part, etc.) is mentioned to be "on" another constitutional element, connected to or combined with another constitutional element, it means that the certain constitutional element can be disposed / connected / combined directly on the other constitutional element, or a third constitutional element can be disposed between them.

[0036] The same reference numerals denote the same constitutional elements. Also, in the drawings, the thickness, ratio, and size of the constitutional elements are exaggerated for the effective explanation of the technical contents. "And / or" includes all of one or more combinations of the constitutional elements related to each other.

[0037] The first, second, and the like terms can be used to explain a plurality of constitutional elements, but the constitutional elements are not limited to the terms. The terms are used only for the purpose of distinguishing one constitutional element from other constitutional elements. For example, a first constitutional element can be referred to as a second constitutional element, and similarly, a second constitutional element can be referred to as a first constitutional element, without departing from the scope of the present application. The singular representation includes the plural representation unless it is explicitly represented in the context that the singular representation excludes the plural representation.

[0038] Also, the terms "below", "lower", "above", "upper", and the like are used to explain the relative relationship of the constitutional elements shown in the drawings. The terms are relative concepts, which are explained based on the direction shown in the drawings.

[0039] The terms "include" or "have" and the like should be understood as designating the existence of the characteristics, numbers, steps, actions, constitutional elements, components or combinations thereof described in the specification, and not intended to preclude the existence or additional possibility of one or more other characteristics, numbers, steps, actions, constitutional elements, components or combinations thereof.

[0040] Unless otherwise defined, all terms (including technical and scientific terms) used in the present specification have the same meaning as commonly understood by one of ordinary skill in the art to which this inventive concept belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an overly idealized or formal sense unless expressly so defined herein.

[0041] Hereinafter, embodiments of the present inventive concept will be described with reference to the accompanying drawings.

[0042] Figure 1 is a perspective view of a display apparatus of an embodiment of the present inventive concept.

[0043] Referring to Figure 1 , the display apparatus 1000 can be an apparatus activated according to an electrical signal. The display apparatus 1000 can include various embodiments. For example, the display apparatus 1000 can include a tablet PC, a notebook, a smart TV, a VR device, a smartphone, etc. These are suggested as embodiments, and of course, can be applied to other display apparatuses without departing from the concept of the present inventive concept.

[0044] The display apparatus 1000 can display an image IM toward a third direction DR3 intersecting a first direction DR1 and a second direction DR2 on a display surface FS parallel to the first direction DR1 and the second direction DR2, respectively. The display surface FS on which the image IM is displayed can correspond to a front surface of the display apparatus 1000.

[0045] The display surface FS of the display apparatus 1000 can be divided into a plurality of regions. The display surface FS of the display apparatus 1000 can be defined with a display region DA and a non-display region NDA.

[0046] The display region DA can be a region in which the image IM is displayed, and a user can recognize the image IM through the display region DA. The shape of the display region DA can be substantially defined by the non-display region NDA. However, this is only illustratively shown, and the non-display region NDA can be disposed adjacent to only one side of the display region DA, and can be omitted. The display apparatus 1000 of an embodiment of the present inventive concept can include various embodiments, and is not limited to a certain embodiment.

[0047] The non-display region NDA is a region adjacent to the display region DA, and can be a region in which the image IM is not displayed. The bezel region of the display apparatus 1000 can be defined by the non-display region NDA.

[0048] The non-display area NDA can surround the display area DA. However, this is only illustratively shown, and the non-display area NDA can be adjacent to only a part of the edges of the display area DA, and is not limited to one embodiment.

[0049] Figure 2 is a perspective view showing a situation in which a user wears a display device according to an embodiment of the present application.

[0050] Referring to Figure 2 , the display device 1000-1 can be provided to the user US in various forms. For example, the display device 1000-1 can constitute a wearable device and provide the user US with an image IM (see Figure 1 ). For example, the display device 1000-1 can have a form of a head mounted display (HMD) worn on the head of the user US or a glasses-type display that the user US can wear like glasses.

[0051] The head mounted display HMD can include the display device 1000-1, a wearing part 1200, and a cushion part 1300.

[0052] The display device 1000-1 can cover the eyes of the user US in correspondence with the left and right eyes of the user US.

[0053] The wearing part 1200 can be combined with the display device 1000-1 so that the user US can easily wear the display device 1000-1. Figure 2 The wearing part 1200 is illustratively shown in

[0054] The main band 1210 can fix the display device 1000-1 so as to be close to the head of the user US. The upper end band 1220 can prevent the display device 1000-1 from falling off, and can distribute the load of the display device 1000-1 to further improve the wearing feeling of the user US.

[0055] Although the main band 1210 and the upper end band 1220 are illustratively shown in Figure 2 to be respectively in a form in which the lengths thereof are adjustable, this is not limited thereto. For example, the main band 1210 and the upper end band 1220 can omit a part in which the lengths thereof are adjusted, and can also be in a form of a wire rope having elasticity.

[0056] If the display device 1000-1 can be fixed to the user US, the wearing part 1200 can further include a fastening part 1230 for fastening the display device 1000-1 to the user US.Figure 2 The illustrated form can be deformed into various forms. For example, the upper end strap 1220 can also be omitted. In another embodiment of the present application, the wearing part 1200 can be deformed into a helmet combined with the display device 1000-1 or a variety of forms such as a temple combined with the display device 1000-1.

[0057] The cushion part 1300 can be configured to be tightly attached to the face of the user US when the head-mounted device HMD is worn. The shape of the cushion part 1300 can be freely deformed and can absorb the impact applied to the head-mounted device HMD. For example, the cushion part 1300 can be a high molecular resin or a foamed sponge, and can include polyurethane, polycarbonate, polypropylene, polyethylene, and the like. However, the material of the cushion part 1300 is not limited to the above. In addition, the cushion part 1300 can also be omitted.

[0058] Figure 3 is a block diagram of a display device according to an embodiment of the present application.

[0059] Referring to Figure 3 , the display device 1000 can include a display panel DP, a driving controller 100, a data driving circuit 200, and a voltage generator 300.

[0060] The display panel DP according to an embodiment of the present application can be a light emitting type display panel, and is not particularly limited. For example, the display panel DP can be an organic light emitting display panel, a quantum dot light emitting display panel, a micro LED display panel, or a nano LED display panel. The light emitting layer of the organic light emitting display panel can include an organic light emitting substance. The light emitting layer of the quantum dot light emitting display panel can include quantum dots, quantum rods, and the like. The light emitting layer of the micro LED display panel can include a micro LED. The light emitting layer of the nano LED display panel can include a nano LED.

[0061] The driving controller 100 can receive an image signal RGB and a control signal CTRL. The driving controller 100 can generate an image data signal DATA in which the data format of the image signal RGB is converted to match the interface specification of the data driving circuit 200. The driving controller 100 can output a scan control signal SCS, a data control signal DCS, and a light emitting driving control signal ECS.

[0062] The data driving circuit 200 can receive the data control signal DCS and the image data signal DATA from the driving controller 100. The data driving circuit 200 can convert the image data signal DATA into a data signal Vdata (refer to FIG. 2).Figure 4 ), and outputs data signals Vdata (refer to Figure 4 ) to the plurality of data lines DL1-DLm, respectively. The data signals Vdata (refer to Figure 4 ) can be analog voltages corresponding to gray scale values of the image data signals DATA.

[0063] In an embodiment of the present application, the data driving circuit 200 can output data signals Vdata (refer to Figure 5 ) corresponding to the image data signals DATA to the data lines DL1-DLm, respectively, during a segment of a frame segment FP (refer to Figure 4 ).

[0064] The voltage generator 300 can generate voltages required for the operation of the display panel DP. In an embodiment of the present application, the voltage generator 300 can generate a first power ELVDD, a second power ELVSS, and an initialization voltage Vint. The first power ELVDD can have a higher voltage level than the second power ELVSS.

[0065] The display panel DP can include scan lines GIL1-GILn, GWGCL1-GWGCLn, light emitting control lines EBL1-EBLn, EML1-EMLn, data lines DL1-DLm, and a plurality of pixels PX. The display panel DP can further include a first driving circuit SD and a second driving circuit EDC.

[0066] The first driving circuit SD can be arranged at a first side of the display panel DP. The scan lines GIL1-GILn, GWGCL1-GWGCLn can extend from the first driving circuit SD in a first direction DR1.

[0067] The second driving circuit EDC can be arranged at a second side of the display panel DP. The light emitting control lines EBL1-EBLn, EML1-EMLn can extend from the second driving circuit EDC in a direction opposite to the first direction DR1.

[0068] The scan lines GIL1-GILn, GWGCL1-GWGCLn and the light emitting control lines EBL1-EBLn, EML1-EMLn can be arranged at intervals from each other in a second direction DR2, respectively.

[0069] The scan lines GIL1-GILn, GWGCL1-GWGCLn can include first scan lines GIL1-GILn and second scan lines GWGCL1-GWGCLn.

[0070] The light-emitting control lines EBL1-EBLn and EML1-EMLn can include first light-emitting control lines EBL1-EBLn and second light-emitting control lines EML1-EMLn.

[0071] The data lines DL1-DLm can extend from the data driver circuit 200 in an opposite direction of the second direction DR2. Each of the data lines DL1-DLm can be arranged at intervals from each other in the first direction DR1.

[0072] Although the first driving circuit SD and the second driving circuit EDC are arranged to face each other with the pixels PX therebetween in the illustrated example, the present application is not limited thereto. For example, the first driving circuit SD and the second driving circuit EDC can be arranged adjacent to each other on one of the first side and the second side of the display panel DP. In an embodiment, the first driving circuit SD and the second driving circuit EDC can be configured as one circuit. Figure 3 The plurality of pixels PX can be electrically connected to the scan lines GIL1-GILn, GWGCL1-GWGCLn, the light-emitting control lines EBL1-EBLn, EML1-EMLn, and the data lines DL1-DLm, respectively. Each of the plurality of pixels PX can be electrically connected to two scan lines and two light-emitting control lines.

[0073] The light-emitting elements LD (see FIG. 1) of the plurality of pixels PX can generate mutually different color lights. For example, the plurality of pixels PX can include a red pixel generating a red light, a green pixel generating a green light, and a blue pixel generating a blue light. The light-emitting elements of the red pixel, the light-emitting elements of the green pixel, and the light-emitting elements of the blue pixel can include light-emitting layers of different substances from each other.

[0074] Figure 4 The pixel driving circuit can include at least one transistor and at least one capacitor. This will be described later. The first driving circuit SD and the second driving circuit EDC can include transistors formed by the same process as the transistors of the pixel driving circuit.

[0075] Each of the plurality of pixels PX can receive the first power supply ELVDD, the second power supply ELVSS, and the initialization voltage Vint from the voltage generator 300.

[0076] The first driving circuit SD can receive the scan control signal SCS from the driving controller 100. The first driving circuit SD can output the scan signals to the scan lines GIL1-GILn, GWGCL1-GWGCLn in response to the scan control signal SCS.

[0077] The first driving circuit SD can receive the scan control signal SCS from the driving controller 100. The first driving circuit SD can output the scan signals to the scan lines GIL1-GILn, GWGCL1-GWGCLn in response to the scan control signal SCS.

[0078] ​The second drive circuit EDC can output light emission signals to the light emission control lines EBL1-EBLn, EML1-EMLn in response to a light emission drive control signal ECS received from the drive controller 100.

[0079] Figure 4 is an equivalent circuit diagram of a pixel of an embodiment of the present application. Figure 3 Each of the plurality of pixels PX illustrated in FIG. 1 can have the same circuit structure as the equivalent circuit diagram of the pixel PXij illustrated in FIG. 2. Figure 4 The equivalent circuit diagram of the pixel PXij illustrated in FIG. 2 can have the same circuit structure as the equivalent circuit diagram of the pixel PXij illustrated in FIG. 2.

[0080] Referring to FIG. 1, Figure 3 and Figure 4 The pixel PXij can be connected to the jth data line DLj among the data lines DL1-DLm, the ith first scan line GILi among the first scan lines GIL1-GILn, the ith second scan line GWGCLi among the second scan lines GWGCL1-GWGCLn, the ith first light emission control line EBLi among the first light emission control lines EBL1-EBLn, and the ith second light emission control line EMLi among the second light emission control lines EML1-EMLn. Here, i and j are natural numbers.

[0081] The pixel PXij can include a light emitting element LD and a pixel drive circuit PCij. The light emitting element LD can be a light emitting diode, and as an example, the light emitting element LD can be an organic light emitting diode including an organic light emitting layer. The pixel drive circuit PCij can be connected to the light emitting element LD and control the amount of current flowing to the light emitting element LD, and the light emitting element LD can generate light having a predetermined brightness according to the amount of received current.

[0082] The pixel drive circuit PCij can include first to sixth transistors T1, T2, T3, T4, T5, T6 and first and second capacitors C1, C2. The pixel PXij of an embodiment of the present application can be referred to as having a 6T2C structure.

[0083] Each of the first to sixth transistors T1-T6 can be a P-type transistor having a low-temperature polycrystalline silicon (LTPS) semiconductor layer. However, this is merely exemplary, and the semiconductor layer of an embodiment of the present application is not limited thereto, and can also include an oxide semiconductor, crystalline silicon, etc. However, this is merely exemplary, and the first to sixth transistors T1-T6 of an embodiment of the present application can all be N-type transistors, and in another embodiment, at least one of the first to sixth transistors T1-T6 can be a P-type transistor, and the rest can be N-type transistors.

[0084] The scan lines GILi and GWGCLi can deliver scan signals GI and GWGC, respectively, and the light emitting control lines Bli and EMLi can deliver light emitting control signals EB and EM, respectively. The data line DLj can deliver a data signal Vdata. The data signal Vdata can have a voltage level corresponding to a gray scale value of an image data signal DATA input in the display device 1000.

[0085] The first power line PL1 can supply a first power ELVDD. The second power line PL2 can supply a second power ELVSS. The second power ELVSS can have a lower voltage level than the first power ELVDD. The voltage line VL can supply an initialization voltage Vint.

[0086] The light emitting element LD can be connected between the second power line PL2 supplied with the second power ELVSS and the fourth transistor T4. The light emitting element LD can include a first electrode AND and a second electrode CTD. The first electrode AND can be referred to as an anode. The second electrode CTD can be referred to as a cathode. The first electrode AND can be electrically connected with the first power line PL1 via the fourth transistor T4, the first transistor T1, and the sixth transistor T6. The second electrode CTD can be connected with the second power line PL2.

[0087] In a case where the light emitting element LD is an organic light emitting element, the light emitting element LD can further include an organic layer disposed between the first electrode AND and the second electrode CTD. The first electrode AND of the light emitting element LD can be connected with the pixel driving circuit PCij. The light emitting element LD can emit light in correspondence with an amount of current of a driving current flowing through the first transistor T1 of the pixel driving circuit PCij.

[0088] The first transistor T1 can include a gate electrode connected with the first node N1, a first electrode electrically connected with the first power line PL1 via the sixth transistor T6, and a second electrode connected with the second node N2. The first transistor T1 can be referred to as a driving transistor. The second electrode of the first transistor T1 can be electrically connected with the light emitting element LD via the fourth transistor T4.

[0089] The second transistor T2 can include a gate electrode supplied with the second scan signal GWGC, a first electrode electrically connected with the data line DLj supplied with the data signal Vdata, and a second electrode connected with the second capacitor C2. The second transistor T2 can be referred to as a switching transistor. The gate electrode of the second transistor T2 can be connected with the second scan line GWGCLi. The second transistor T2 can be electrically connected between the data line DLj and the third node N3.

[0090] The third transistor T3 can include a gate electrode provided with the second scan signal GWGC, a first electrode connected to the third node N3, and a second electrode connected to the first node N1. The third transistor T3 can be electrically connected between the gate electrode of the first transistor T1 and the second transistor T2. The gate electrode of the third transistor T3 can be connected to the second scan line GWGCLi.

[0091] The gate electrodes of the second transistor T2 and the third transistor T3 can be shared and connected to one second scan line GWGCLi. The gate electrodes of the second transistor T2 and the third transistor T3 can be provided with the same second scan signal GWGC.

[0092] According to the present application, the pixel PXij can be driven by four lines including the first scan line GILi, the second scan line GWGCi, the first light emission control line EMLi, and the second light emission control line EBLi. The number of lines provided on the display panel DP (refer to Figure 3 ) can be reduced. Therefore, the pixel PXij having a reduced area of the pixel driving circuit PCij and the display device 1000 (refer to Figure 3 ) including the same can be provided. Also, the interval between the lines included in the pixel PXij can be increased. Therefore, the signal interference between the lines can be reduced. Thus, the pixel PXij having improved display quality and the display device 1000 (refer to Figure 3 ) including the same can be provided.

[0093] Also, according to the present application, as the number of the first scan line GILi, the second scan line GWGCi, the first light emission control line EMLi, and the second light emission control line EBLi is reduced, the size of the first driving circuit SD and the second driving circuit EDC provided in the non-display area NDA (refer to Figure 1 ) can be reduced. The display device 1000 (refer to Figure 1 ) having a reduced area of the non-display area NDA (refer to Figure 3 ) can be provided.

[0094] However, this is merely exemplary, and the types of signals received by the second transistor T2 and the third transistor T3 of an embodiment of the present application are not limited thereto. For example, the second scan signal GWGC can be further divided into a 2-1 scan signal and a 2-2 scan signal, and provided to the second transistor T2 and the third transistor T3, respectively.

[0095] The fourth transistor T4 can include a gate electrode provided with a second emission control signal EM, a first electrode connected to the first electrode of the light emitting element LD, and a second electrode connected to the second node N2. The fourth transistor T4 can be electrically connected between the light emitting element LD and the first transistor T1. The gate electrode of the fourth transistor T4 can be connected to the second emission control line EMLi.

[0096] The fifth transistor T5 can include a gate electrode provided with a first scan signal GI, a first electrode connected to a voltage line VL provided with an initialization voltage Vint, and a second electrode connected to the third node N3. The fifth transistor T5 can be electrically connected between the voltage line VL and the third transistor T3. The gate electrode of the fifth transistor T5 can be connected to the first scan line GILi.

[0097] The sixth transistor T6 can include a gate electrode provided with a first emission control signal EB, a first electrode connected to the first power line PL1, and a second electrode connected to the first electrode of the first transistor T1. The gate electrode of the sixth transistor T6 can be connected to the first emission control line EBLi.

[0098] The first capacitor C1 can be connected between the first power line PL1 and the first node N1.

[0099] The second capacitor C2 can be connected between the second electrode of the second transistor T2 and the third node N3. The capacitance of the second capacitor C2 can be less than the capacitance of the first capacitor C1. Also, the physical size of the second capacitor C2 can be less than the physical size of the first capacitor C1.

[0100] Unlike the present application, the pixel driving circuit can include seven or more transistors. Or, the gate control lines for driving the pixel driving circuit can be five or more. Thus, the physical area of the pixel driving circuit can increase. This can result in a relatively smaller number of pixels being arranged per a predetermined area, thereby causing a decrease in pixel density. However, according to the present application, the pixel driving circuit PCij is configured of six transistors T1 to T6 having P-type, three voltage lines PL1, PL2, VL, four gate control lines GILi, GWGCLi, EBLi, BMLi, and one data line DLj, so that the area of the pixel driving circuit PCij can be relatively reduced. Thus, a pixel PXij having a reduced area of the pixel driving circuit PCij and a display apparatus 1000 including the same can be provided (refer to FIG. 1). Figure 3). Also, the pixel density of the pixel PXij can increase. A high-resolution pixel having a resolution of 4000 ppi (pixel per inch) or more can be easily designed. Thus, a pixel PXij and a display device 1000 including the same having improved display quality can be provided.

[0101] Also, according to the present application, as the number of transistors for driving decreases, the power consumption of the display panel DP can decrease. Thus, an improved pixel PXij and a display device 1000 including the same that can implement a low-power design can be provided.

[0102] Figure 5 is a timing chart for explaining the operation of a display device of an embodiment of the present application, Figures 6 to 10 is a diagram for explaining the operation of a pixel of an embodiment of the present application. In explaining Figures 6 to 10 , for the constituent elements already explained, Figure 4 the same reference numerals will be assigned and the explanation thereof will be omitted.

[0103] Referring to Figure 3 and Figure 5 , the display panel DP can operate and display an image IM in units of frame sections FP (see Figure 1 ). Any one of the frame sections FP can include first to fifth sections t1, t2, t3, t4, t5.

[0104] The first to fourth sections t1 to t4 can be referred to as non-emission sections. Specifically, the first section t1 can be referred to as an initialization section. The second section t2 can be referred to as a compensation section. The third section t3 can be referred to as a data input section. The fourth section t4 can be referred to as an anode initialization section. The fifth section t5 can be referred to as an emission section.

[0105] Figure 6 is a diagram for explaining the operation of a pixel PXij in the first section t1 of the frame section FP.

[0106] Referring to Figure 5 and Figure 6 , in the first section t1, the first scan signal GI and the second scan signal GWGC can be active levels. The active levels of the first scan signal GI and the second scan signal GWGC can each be a low level. However, this is merely exemplary, and the active levels of the signals of an embodiment of the present application are not limited thereto. For example, the active levels of the signals can also be high levels.

[0107] The first light emission control signal EB and the second light emission control signal EM can be passive levels. The passive levels of the first light emission control signal EB and the second light emission control signal EM can each be a high level. However, this is merely exemplary, and the passive levels of the signals of an embodiment of the present application are not limited thereto. For example, the passive levels of the signals can also be low levels.

[0108] The data signal Vdata can have a prescribed voltage level. For example, in the first section t1, the second section t2, the fourth section t4, and the fifth section t5, the data signal Vdata can have a constant DC value. The DC value can be provided at the first electrode of the second capacitor C2. The second electrode of the second capacitor C2 can be connected to the third node N3. The alternating current component of the data signal Vdata can be prevented from passing through the second capacitor C2 and causing noise to be generated at the third node N3.

[0109] The third transistor T3 can turn on in response to the second scan signal GWGC. The fifth transistor T5 can turn on in response to the first scan signal GI. The initialization voltage Vint can be provided to the first node N1 via the third transistor T3 and the fifth transistor T5. That is, the gate electrode of the first transistor T1 can be charged with the initialization voltage Vint. The residual current of the gate electrode of the first transistor T1 can be removed.

[0110] The initialization voltage Vint can be provided to the second node N2 and the third node N3 via the fifth transistor T5. The second node N2 and the third node N3 can be charged with the initialization voltage Vint. The residual current of the second node N2 and the third node N3 can be removed.

[0111] According to the present application, the residual current of the nodes N1, N2, N3 on the compensation path can be removed before the threshold voltage (referred to as Vth) of the first transistor T1 is compensated in the subsequent second section t2. The pixel PXij can initialize the nodes N1, N2, N3 in each frame section FP through the first section t1. Thus, the malfunctions caused by the residual current can be prevented. In this way, the compensation of the threshold voltage of the first transistor T1 can be easily achieved. Therefore, the pixel PXij and the display device 1000 (refer to Figure 3 ) including the same having improved display quality can be provided.

[0112] Figure 7 is a diagram for illustrating the operation of the pixel PXij in the second section t2 of the frame section FP.

[0113] Refer to Figure 5 and Figure 7, the second section t2 can be continuous with the first section t1. In the second section t2, the first emission control signal EB and the second scan signal GWGC can be active levels. The active levels of the first emission control signal EB and the second scan signal GWGC can each be a low level.

[0114] The first scan signal GI and the second emission control signal EM can be passive levels. The passive levels of the first scan signal GI and the second emission control signal EM can each be a high level.

[0115] The sixth transistor T6 can be turned on in response to the first emission control signal EB. The third transistor T3 can be turned on in response to the second scan signal GWGC.

[0116] During the second section t2, the first transistor T1 can act as a source follower. A voltage of a magnitude of a threshold voltage of the first transistor T1 lower than the first power supply ELVDD can be provided at the first node N1. That is, the first node N1 can be charged with a voltage of ELVDD-Vth.

[0117] The first capacitor C1 can be configured between the first power supply line PL1 and the first node N1. The first capacitor C1 can store a difference voltage between the first power supply line PL1 and the first node N1. The first capacitor C1 can be referred to as a storage capacitor.

[0118] Figure 8 is a diagram for explaining an operation of the pixel PXij in the third section t3 of the frame section FP.

[0119] Referring to Figure 5 and Figure 8 , the third section t3 can be continuous with the second section t2. In the third section t3, the second scan signal GWGC can be an active level. The active level of the second scan signal GWGC can be a low level.

[0120] The first scan signal GI, the first emission control signal EB, and the second emission control signal EM can be passive levels. The passive levels of the first scan signal GI, the first emission control signal EB, and the second emission control signal EM can each be a high level.

[0121] The second transistor T2 and the third transistor T3 can be turned on in response to the second scan signal GWGC. The data signal Vdata provided through the data line DLj can be provided to the first electrode of the second capacitor C2. The data signal Vdata can be coupled to the second electrode of the second capacitor C2 and provided to the third node N3. The data signal Vdata can be provided to the first node N1 via the third transistor T3.

[0122] Figure 9 is a diagram for explaining an operation of the pixel PXij in the fourth segment t4 of the frame segment FP.

[0123] Referring to Figure 5 and Figure 9 , the fourth segment t4 can be continuous with the third segment t3. In the fourth segment t4, the first scan signal GI and the second emission control signal EM can be active levels. The active levels of the first scan signal GI and the second emission control signal EM can each be a low level.

[0124] The second scan signal GWGC and the first emission control signal EB can be inactive levels. The inactive levels of the second scan signal GWGC and the first emission control signal EB can each be a high level.

[0125] The fourth transistor T4 can turn on in response to the second emission control signal EM. The fifth transistor T5 can turn on in response to the first scan signal GI. The initialization voltage Vint can be supplied to the first electrode AND of the light emitting element LD via the fourth transistor T4 and the fifth transistor T5. The residual current of the first electrode AND of the light emitting element LD can be removed.

[0126] According to the present application, the residual current of the anode electrode AND can be removed before the light emitting element LD performs a light emitting operation in the subsequent fifth segment t5. That is, all of the nodes N1, N2, N3, AND can be initialized by the first segment t1 and the fourth segment t4. The adverse effects of the pixel PXij due to the residual current can be minimized. Thus, the pixel PXij and the display device 1000 including the same, which have improved display quality, can be provided (see Figure 3 ).

[0127] The sixth transistor T6 can turn off in response to the first emission control signal EB. The sixth transistor T6 can block the light emission of the light emitting element LD.

[0128] Figure 10 is a diagram for explaining an operation of the pixel PXij in the fifth segment t5 of the frame segment FP.

[0129] Referring to Figure 5 and Figure 10 , the fifth segment t5 can be performed after the fourth segment t4. In the fifth segment t5, the first emission control signal EB and the second emission control signal EM can be active levels. The active levels of the first emission control signal EB and the second emission control signal EM can each be a low level.

[0130] The first scan signal GI and the second scan signal GWGC can be passive voltage levels. The passive voltage levels of both the first scan signal GI and the second scan signal GWGC can be high.

[0131] The fourth transistor T4 can be turned on in response to the second light emission control signal EM. The sixth transistor T6 can be turned on in response to the first light emission control signal EB.

[0132] With the fourth transistor T4 and the sixth transistor T6 turned on, the drive current ID can flow from the first power line PL1 through the sixth transistor T6, the first transistor T1, the fourth transistor T4, the light-emitting element LD, and the second power line PL2.

[0133] A voltage corresponding to the amount of charge stored in the first capacitor C1 can be supplied to the gate electrode of the first transistor T1.

[0134] From the display panel DP (reference) Figure 3 ) data drive circuit 200 (refer to) Figure 3 The output data signal Vdata can be input to the gate electrode of the first transistor T1. Thus, the light-emitting element LD can emit light.

[0135] Multiple pixel PX (reference) Figure 3 The threshold voltage of the first transistor T1 included in each of the four sections (t1, t2, t3, t4) can vary depending on the characteristics of the first transistor T1. However, according to this invention, under the action of the first to fourth sections t1, t2, t3, t4, the threshold voltage Vth of the first transistor T1 may not affect the driving current ID flowing through the light-emitting element LD. Therefore, the display panel DP (refer to...) Figure 3 The output image IM (reference) Figure 1 The brightness of the pixels (PXij) can remain uniform. Therefore, it is possible to provide pixel PXij with improved display quality and display device 1000 (see reference). Figure 3 ).

[0136] In one embodiment of this utility model, the third transistor T3 can be configured between the first node N1 and the third node N3 and perform multiple functions.

[0137] In the first segment t1, the third transistor T3 can be turned on in response to the second scan signal GWGC. The third transistor T3 can provide a path to electrically connect the voltage line VL and the first node N1 to each other. That is, the third transistor T3 can provide a path for initializing the gate electrode of the first transistor T1 using the initialization voltage Vint.

[0138] In the second section t2, the third transistor T3 can be turned on in response to the second scan signal GWGC. The third transistor T3 can provide a path to electrically connect the first node N1, the second node N2, and the third node N3. That is, the third transistor T3 can provide a path for compensating for the threshold voltage of the first transistor T1.

[0139] In the third section t3, the third transistor T3 can be turned on in response to the second scan signal GWGC. The third transistor T3 can provide a path for the data signal Vdata to be delivered to the gate electrode of the first transistor T1 through the coupling of the second capacitor C2.

[0140] In the fourth section t4, the third transistor T3 can be turned off in response to the second scan signal GWGC. The third transistor T3 can block the initialization voltage Vint from being provided to the first node N1. Thus, the data signal Vdata reflecting the threshold voltage of the first transistor T1 stored in the first capacitor C1 can be protected.

[0141] In the fifth section t5, the third transistor T3 can be turned off in response to the second scan signal GWGC. The third transistor T3 can block the first power source ELVDD from flowing into the first node N1.

[0142] Figure 11 is an equivalent circuit diagram of a pixel of an embodiment of the present application. In the description of Figure 11 , the same reference numerals will be assigned to the constituent elements that have been described Figure 4 and the description thereof will be omitted.

[0143] Referring to Figure 11 , the pixel PXij-1 can include a light emitting element LD and a pixel driving circuit PCij-1.

[0144] The pixel driving circuit PCij-1 can include first to sixth transistors T1, T2, T3, T4, T5, T6-1 and first and second capacitors C1, C2.

[0145] The fifth transistor T5 can include a gate electrode provided with the first scan signal GIi, a first electrode connected with a voltage line VL provided with the initialization voltage Vint, and a second electrode connected with the third node N3. The fifth transistor T5 can be connected between the voltage line VL and the third transistor T3. The gate electrode of the fifth transistor T5 can be connected with the first scan line GILi.

[0146] The sixth transistor T6-1 can include a gate electrode provided with a next frame section FP (refer to Figure 5the first scan signal GIi+1 of the next frame section FP (refer to Figure 5 ) and the first electrode of the first transistor T1. The gate electrode of the sixth transistor T6 can be connected to the first scan line GILi+1 of the next frame section FP (refer to Figure 5 ). That is, the signal supplied to the gate electrode of the sixth transistor T6-1 can be the signal of the second scan signal GIi shifted by a prescribed time size. At this time, the prescribed time can be the size of one frame section FP (refer to

[0147] Although the above has been described with reference to the preferred embodiments of the present application, it is to be understood that the skilled person in the relevant technical field or the average person in the relevant technical field can understand that various modifications and changes can be made to the present application without departing from the scope of the idea and the technical field of the present application as recited in the appended claims. Therefore, the technical scope of the present application should not be limited to the contents in the specific embodiments of the specification, but should be defined by the appended claims.

Claims

1. A pixel comprising: a first transistor including a gate electrode connected to a first node, a first electrode electrically connected to a first power supply line to which a first power supply is supplied, and a second electrode connected to a second node; a second transistor including a gate electrode to which a first scan signal is supplied, a first electrode electrically connected to a data line to which a data signal is supplied, and a second electrode; a third transistor including a gate electrode to which the first scan signal is supplied, a first electrode connected to a third node, and a second electrode connected to the first node; a first capacitor connected between the second electrode of the second transistor and the third node; and a light emitting element including a first electrode and a second electrode electrically connected to a second power supply line to which a second power supply is supplied, the second power supply having a different level from the first power supply.

2. The pixel according to claim 1, further comprising: a fourth transistor including a gate electrode to which a first light emitting control signal is supplied, a first electrode connected to the first electrode of the light emitting element, and a second electrode connected to the second node.

3. The pixel according to claim 2, further comprising: a fifth transistor including a gate electrode to which a second scan signal is supplied, a first electrode connected to a voltage line to which an initialization voltage is supplied, and a second electrode connected to the third node.

4. The pixel according to claim 3, further comprising: a sixth transistor including a gate electrode to which a second light emitting control signal is supplied, a first electrode connected to the first power supply line, and a second electrode connected to the first electrode of the first transistor.

5. The pixel according to claim 4, further comprising: a second capacitor connected between the first power supply line and the first node.

6. The pixel according to claim 5, wherein during a first period, the first scan signal and the second scan signal are activated, during the first period, the initialization voltage is supplied to the first node, the second node, and the third node, respectively.

7. The pixel according to claim 6, wherein during a second period continuous to the first period, the first scan signal and the second light emitting control signal are activated, during the second period, a voltage value obtained by subtracting a threshold voltage of the first transistor from the first power supply is supplied to the first node.

8. The pixel according to claim 7, wherein during a third period continuous to the second period, the first scan signal is activated, during the third period, the data signal is supplied to the first node and the third node.

9. The pixel according to claim 8, wherein during a fourth period continuous to the third period, the second scan signal and the first light emitting control signal are activated, during the fourth period, the initialization voltage is supplied to the first electrode of the light emitting element.

10. The pixel according to claim 9, wherein ​ ​ ​ ​ ​ During a fifth segment, consecutive to the fourth segment, the first light emission control signal and the second light emission control signal are activated.

Images