Circuit board

Abstract

The utility model provides a circuit board, which relates to the technical field of circuits and comprises a circuit board body structure, the circuit board body structure is provided with a processor and at least two connectors electrically connected with the processor respectively, and the at least two connectors are arranged on two sides of the processor respectively. A set distance X1 is formed between each connector and the processor; wherein X1 is smaller than or equal to 80 mm.

Description

Technical Field

[0001] This application relates to the field of circuit technology, and more particularly to a circuit board. Background Technology

[0002] In modern computer systems, especially servers and high-performance computing devices, the requirements for printed circuit board (PCB) design are becoming increasingly stringent as data processing speeds continue to increase. Circuits are not only the carriers of hardware components but also the critical paths for signal transmission. In high-speed signal transmission, signal length directly affects its integrity and system performance. Especially when signals need to traverse multiple layers of circuitry, vias (conductors that vertically penetrate between circuit layers) become one of the main factors affecting signal quality.

[0003] The high-speed connectors on the circuit boards of related technologies are some distance from the CPU, resulting in a relatively long PCIe bus connecting the high-speed connectors to the CPU, which leads to high signal loss on the PCIe circuit boards. Utility Model Content

[0004] This application provides a circuit board to at least solve the problem of high loss of PCIe signals on circuit boards in the related art.

[0005] This application provides a circuit board, including: a circuit board body structure, on which a processor and at least two connectors electrically connected to the processor are disposed, the at least two connectors are respectively disposed on both sides of the processor, and each connector is separated from the processor by a predetermined distance X1; wherein, X1≤80mm.

[0006] Furthermore, X1 ≥ 45 mm.

[0007] Furthermore, 0mm≤X1≤10mm.

[0008] Furthermore, at least two connectors include: a first connector disposed on a first side of the processor along a first direction;

[0009] The second connector is disposed on the second side of the processor along the first direction.

[0010] Furthermore, the number of first connectors is multiple, and the multiple first connectors are spaced apart along the second direction; and / or,

[0011] There are multiple second connectors, and the multiple second connectors are spaced apart along the second direction;

[0012] The first direction is perpendicular to the second direction.

[0013] Furthermore, the circuit board body structure is provided with a plurality of mounting holes at intervals. The plurality of mounting holes include a first mounting hole corresponding to the processor and a second mounting hole corresponding to the connector. The circuit board also includes a second high-speed signal transmission line disposed within the circuit board body structure, with the two ends of the second high-speed signal transmission line connected to the first mounting hole and the second mounting hole, respectively.

[0014] Furthermore, the number of processors is multiple; among them,

[0015] Multiple processors are spaced apart along a second direction; and / or,

[0016] Connectors are located on both sides of each processor.

[0017] Furthermore, the multiple mounting holes include multiple first mounting holes that correspond one-to-one with the multiple processors. The circuit board also includes a first high-speed signal transmission line disposed within the circuit board body structure. One end of the first high-speed signal transmission line is connected to the first mounting hole corresponding to one of the multiple processors, and the other end of the first high-speed signal transmission line is connected to the first mounting hole corresponding to another of the multiple processors.

[0018] Furthermore, each mounting hole penetrates the circuit board body structure.

[0019] Furthermore, the circuit board body structure includes a first board and a second board, which are stacked together. The first high-speed signal transmission line is disposed in the second board, and the second high-speed signal transmission line is disposed in the first board.

[0020] Furthermore, the first mounting hole used in conjunction with the first high-speed signal transmission line is a third via hole, which extends from the first plate body into the second plate body.

[0021] Furthermore, the first mounting hole and the second mounting hole used in conjunction with the second high-speed signal transmission line are respectively a first via and a second via, both of which are located within the first board body.

[0022] Furthermore, the first board also includes a first sub-board and a second sub-board, which are stacked together. A first high-speed signal transmission line is sandwiched between the first sub-board and the second sub-board, and a first via and a second via penetrate the first sub-board.

[0023] Furthermore, the second board also includes a third sub-board and a fourth sub-board, which are stacked together. A second high-speed signal transmission line is sandwiched between the third and fourth sub-boards, and a third via is provided through the first board and the third sub-board.

[0024] Furthermore, the first high-speed signal transmission line and the second high-speed signal transmission line include copper conductors and a silver coating plated on the surface of the copper conductors, wherein the high-speed signal is a signal with a frequency greater than or equal to 2 GHz.

[0025] Furthermore, the thickness of the silver coating is greater than or equal to 2 μm and less than or equal to 5 μm.

[0026] Furthermore, the connector is a high-speed connector.

[0027] Furthermore, the connector includes at least one of high-density connectors and high-speed connectors.

[0028] This application shortens the signal transmission path by reducing the distance between the high-speed connector and the processor, thereby significantly reducing signal loss during transmission of high-speed signals (such as PCIe) on the circuit board. In high-frequency, high-speed signal environments, a shorter path effectively maintains signal strength and reduces attenuation, ensuring the quality of signal transmission.

[0029] Shortening the signal path helps reduce signal reflection, crosstalk, and ringing effects, thereby improving signal integrity, which is especially important for high-speed data transmission. Better signal integrity results in a lower data transmission error rate, and ultimately, higher system reliability and performance.

[0030] The compact layout of the connectors reduces the additional circuit space required between the connectors and the processor, making the circuit board design more compact. This helps to integrate more functional components in a limited space, improves the space utilization of the circuit board, and also reduces the manufacturing cost of the circuit board.

[0031] Reducing the distance between the processor and the connector simplifies the wiring design on the circuit board, reduces the complexity of vias and traces, lowers signal delay and manufacturing difficulty, and improves production yield. Attached Figure Description

[0032] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 A top view of a circuit board provided in Embodiment 1 of this application;

[0034] Figure 2 A side view of a circuit board provided in Embodiment 1 of this application;

[0035] Figure 3This is a schematic diagram of the circuit board body structure of a circuit board provided in Embodiment 1 of this application;

[0036] Figure 4 This is a top view of a circuit board structure provided in Embodiment 2 of this application;

[0037] Figure 5 This is a side view of a circuit board provided in Embodiment 2 of this application;

[0038] Figure 6 This is a schematic diagram of the circuit board body structure of a circuit board provided in Embodiment 2 of this application;

[0039] Figure 7 This is a three-dimensional structural diagram of a circuit board provided in Embodiment 2 of this application.

[0040] The above figures include the following reference numerals:

[0041] 1. Circuit board body structure; 11. First board body; 111. First sub-board; 112. Second sub-board; 12. Second board body; 121. Third sub-board; 122. Fourth sub-board; 13. First via; 14. Second via; 15. Third via; 4. First high-speed signal transmission line; 5. Second high-speed signal transmission line; 2. Processor; 3. Connector; 31. First connector; 32. Second connector. Detailed Implementation

[0042] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0043] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0044] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0045] In related technologies, there is a certain distance between the high-speed connector and the CPU in the circuit board. An excessively long PCIe bus between the high-speed connector and the CPU will result in higher PCIe losses on the circuit board. The reason why the high-speed connector cannot be close to the CPU is that after the signal of the high-speed connector is fanned out, it needs to be connected to the inner layer through vias. These vias will block the UPI bus between the two CPUs.

[0046] Example 1

[0047] like Figures 1 to 3 As shown, the main objective of this technical solution is to address the above problems by providing a circuit board, including a circuit board body structure 1. The circuit board body structure 1 is provided with a processor 2 and at least two connectors 3 that are electrically connected to the processor 2. The at least two connectors 3 are respectively disposed on both sides of the processor 2, and each connector 3 has a set distance X1 between it and the processor 2; wherein, X1≤80mm.

[0048] By closely arranging at least two connectors 3 on both sides of the processor 2 and ensuring that the distance X1 between them and the processor 2 does not exceed 80 mm, the transmission path length of high-speed signals such as PCIe is significantly reduced. A shorter transmission path helps reduce signal delay, decreases signal attenuation and reflection during transmission on the line, thereby improving signal integrity and enhancing system stability and data transmission rate.

[0049] Shortening the distance between connector 3 and processor 2 helps reduce the range of electromagnetic interference (EMI), thereby improving the electromagnetic compatibility performance of the circuit board. This is because a shorter transmission line reduces the likelihood of radiated emissions and decreases sensitivity to external signals, making the circuit board more robust in dense electronic environments.

[0050] Placing connectors 3 on both sides of processor 2 not only shortens the signal path but also optimizes the spatial layout of the circuit board. This layout allows other components on the circuit board to be arranged more compactly, saving circuit board area and facilitating the design of higher-density circuit boards. It also makes it easier to integrate more functions within a limited space.

[0051] Preferably, X1 ≥ 45mm.

[0052] Setting the X1 distance to 45 mm or more provides greater flexibility in circuit board design and manufacturing, avoiding manufacturing difficulties caused by overly compact layouts, such as via and trace density issues. This helps improve circuit board manufacturing yield, reduce scrap rates during production, and thus lower overall production costs.

[0053] Electromagnetic compatibility (EMC) is crucial in circuit board design, especially for high-speed signal transmission. Maintaining a distance of at least 45 mm helps simplify EMC design. With proper isolation and shielding, EMI can be controlled more effectively, protecting signals from external electromagnetic interference and ensuring stable system operation.

[0054] Furthermore, at least two connectors 3 include: a first connector 31, which is disposed on a first side of the processor 2 along a first direction;

[0055] The second connector 32 is disposed on the second side of the processor 2 along the first direction.

[0056] By symmetrically arranging the first connector 31 and the second connector 32 along the first direction of the processor 2, the wiring and signal load can be balanced, avoiding excessive wiring and connection points concentrated on one side. This helps to reduce the heat load on one side, while balancing the current and signal distribution on the circuit board, improving the stability and efficiency of the system.

[0057] This layout allows high-speed signals originating from processor 2 to be routed more intuitively and conveniently to the connectors on both sides of the circuit board, reducing the need for signal detours, thereby reducing signal delay and loss and enhancing signal integrity.

[0058] The symmetrical distribution of the first connector 31 and the second connector 32 makes heat dissipation design easier. By setting heat dissipation channels or heat dissipation elements between the processor 2 and the connector 3, heat sources can be effectively managed, heat can be avoided from concentrating around the processor 2, and the thermal management capability of the entire system can be improved.

[0059] Furthermore, there are multiple first connectors 31, and the multiple first connectors 31 are spaced apart along the second direction.

[0060] Furthermore, there are multiple second connectors 32, and the multiple second connectors 32 are spaced apart along the second direction;

[0061] The first direction is perpendicular to the second direction.

[0062] The arrangement of multiple first connectors 31 and second connectors 32 significantly increases the input / output (I / O) capability of the circuit board, enabling it to support more peripheral devices or subsystem connections.

[0063] The connectors 3, spaced apart along the second direction, can more evenly distribute high-speed signals, avoid dense crossover of signal lines, reduce crosstalk and attenuation between signals, optimize signal quality, and improve system stability.

[0064] The multiple connectors 3 spaced apart form a more robust structure on the circuit board, improving mechanical strength and reducing electromagnetic interference (EMI) caused by dense wiring, thus enhancing the electromagnetic compatibility (EMC) of the system.

[0065] Furthermore, a plurality of mounting holes are provided at intervals on the circuit board body structure 1. The plurality of mounting holes include a first mounting hole corresponding to the processor 2 and a second mounting hole corresponding to the connector 3. The circuit board also includes a second high-speed signal transmission line 5 disposed in the circuit board body structure 1, with the two ends of the second high-speed signal transmission line 5 connected to the first mounting hole and the second mounting hole, respectively.

[0066] The second high-speed signal transmission line 5 extends directly from the first mounting hole to the second mounting hole, reducing the signal transmission path from the processor 2 to the connector 3 and lowering signal delay and loss. This embedded signal line design also avoids electromagnetic interference that may be caused by surface wiring, improving signal integrity and stability.

[0067] The mounting holes not only strengthen the circuit board structure but also facilitate heat dissipation. The first and second mounting holes allow for the design of more effective heat dissipation solutions, such as adding heat sinks or heat dissipation channels around the mounting holes, ensuring that the processor 2 and connectors maintain good operating temperatures under high loads and extending hardware lifespan.

[0068] With the pre-set mounting holes, assemblers can quickly and accurately locate and install key components such as processor 2 and connector 3, simplifying the hardware assembly process, improving production efficiency, and reducing assembly error rate.

[0069] Furthermore, there are multiple processors 2; wherein the multiple processors 2 are spaced apart along the second direction.

[0070] Furthermore, each processor 2 has a connector 3 on both sides.

[0071] The configuration of multiple processors 2, along with their spaced arrangement along the second direction, significantly enhances the system's parallel computing capabilities. Each processor 2 can execute tasks independently, achieving load balancing.

[0072] The connector layout on both sides of the processor 2 ensures that high-speed signals such as PCIe can be transmitted along the shortest path, reducing signal latency and loss, and improving signal quality and transmission speed. Even in high-bandwidth applications, signal integrity and system responsiveness are maintained.

[0073] Multiple processors 2 are arranged at intervals along the second direction, and connectors 3 are provided on both sides. This layout creates a better heat dissipation environment for each processor 2. The spacing between the processors 2 allows for better airflow, while the symmetrical layout of the connectors 3 helps to distribute heat evenly, reducing the risk of localized overheating of the processors 2 and improving the thermal stability of the system.

[0074] The symmetrical layout of connector 3 and the high-speed signal line directly connected to processor 2 reduce intermediate links in signal transmission, improve the reliability of electrical connections, and reduce potential failure points during signal transmission.

[0075] Furthermore, the multiple mounting holes include multiple first mounting holes that correspond one-to-one with the multiple processors 2. The circuit board also includes a first high-speed signal transmission line 4 disposed within the circuit board body structure 1. One end of the first high-speed signal transmission line 4 is connected to the first mounting hole corresponding to one of the multiple processors 2, and the other end of the first high-speed signal transmission line 4 is connected to the first mounting hole corresponding to another processor 2 among the multiple processors 2.

[0076] Furthermore, each mounting hole is provided through the circuit board body structure 1.

[0077] The arrangement of multiple first high-speed signal transmission lines 4 allows for high-speed, direct data exchange and resource sharing between processors 2, improving communication efficiency and collaboration capabilities between processors 2.

[0078] The first high-speed signal transmission line 4 is directly connected to the corresponding mounting hole of the processor 2, which reduces the signal transmission path length, reduces signal delay and attenuation, and ensures high-quality signal transmission.

[0079] The through-hole design facilitates the direct transfer of heat from the bottom of the processor 2 to the circuit board's cooling system, such as a heat sink or heat dissipation substrate, thereby improving heat dissipation efficiency and reducing the risk of performance degradation or hardware damage to the processor 2 due to overheating.

[0080] The layout of embedded signal lines simplifies the wiring complexity on the circuit board surface, while the through-hole design makes the assembly of processor 2 simpler and faster, reducing the assembly error rate and improving production efficiency and yield.

[0081] The embedded first high-speed signal transmission line 4 and through-hole design help reduce electromagnetic radiation on the circuit board surface, reduce the impact of electromagnetic interference, and improve the electromagnetic compatibility of the system.

[0082] Example 2

[0083] like Figures 4 to 7As shown, preferably, in this embodiment of the application, the distance between connector 3 and processor 2 is in the range of 0mm≤X1≤10mm.

[0084] Over such a short distance, the transmission delay of high-speed signals such as PCIe is almost negligible, and signal loss is minimized, greatly improving signal integrity and transmission efficiency.

[0085] With X1 limited to 0mm to 10mm, the circuit board design can maximize the use of the limited space, making the circuit board more compact.

[0086] The extremely short distance X1 reduces the complexity of internal wiring, lowers the need for multi-layered PCBs, reduces the number of vias, and simplifies the PCB manufacturing process. This not only reduces manufacturing costs but also improves production efficiency and PCB yield.

[0087] Within an ultra-short distance of 0mm to 10mm, signal reflection and attenuation are virtually nonexistent, contributing to improved signal integrity and stability. The shorter signal path reduces the risk of noise and signal distortion, ensuring accurate and reliable data transmission.

[0088] Furthermore, the circuit board body structure 1 includes a first board body 11 and a second board body 12, which are stacked together. The first high-speed signal transmission line 4 is disposed in the second board body 12, and the second high-speed signal transmission line 5 is disposed in the first board body 11.

[0089] By placing different types of high-speed signal transmission lines in different board layers, signals can be effectively isolated, crosstalk and electromagnetic interference (EMI) between signals can be reduced, signal quality can be optimized, and system stability can be enhanced.

[0090] The first high-speed signal transmission line 4 in the second board 12 and the second high-speed signal transmission line 5 in the first board 11 are directly embedded inside the board, resulting in a shorter signal transmission path, reduced signal loss caused by via connections, and improved signal transmission speed and efficiency.

[0091] The stacked board design increases the thickness and structural strength of the circuit board, making it more resistant to physical impacts and deformation, protecting the internal high-speed signal transmission lines from external environmental factors, and improving the durability and reliability of the circuit board.

[0092] The layered board structure allows for more flexible layout of internal high-speed signal transmission lines, enabling the design of optimal line paths based on different signal transmission requirements. Meanwhile, the outer board can be used to set up other functional lines and components, improving the space utilization efficiency of the circuit board and the freedom of circuit design.

[0093] Furthermore, the first mounting hole used in conjunction with the first high-speed signal transmission line 4 is a third via 15, which extends from the first plate 11 into the second plate 12.

[0094] Furthermore, the first mounting hole and the second mounting hole used in conjunction with the second high-speed signal transmission line 5 are respectively the first via 13 and the second via 14, and both the first via 13 and the second via 14 are located within the first plate 11.

[0095] The third via 15 directly penetrates the first plate 11 and the second plate 12, forming a connection with the first high-speed signal transmission line 4, effectively reducing signal transmission delay and loss, and improving signal quality and transmission efficiency. The precise positioning design of the first via 13 and the second via 14 within the first plate 11 also reduces signal loss caused by the vias and optimizes the signal transmission path.

[0096] By incorporating vias within specific board layers, effective isolation of signals from different layers can be achieved, reducing mutual interference between signals. For example, the first high-speed signal transmission line 4 and the second high-speed signal transmission line 5 are located within the second board 12 and the first board 11, respectively. The via design ensures vertical transmission of signals, rather than parallel transmission, reducing potential electromagnetic interference and improving the overall stability of the system.

[0097] The third via 15, penetrating both layers of the board, enhances the overall structural strength of the circuit board, providing additional mechanical support and making the board more stable under external pressure or impact. The placement of the first via 13 and the second via 14 within the first board 11 also strengthens the connection strength within the board and optimizes the physical structure of the circuit board.

[0098] Vias, acting as a bridge between high-speed signal transmission lines inside the circuit board and the processor 2 or connector 3, directly determine the continuity of signal transmission and the reliability of electrical connections. The precise placement of the third via 15, the first via 13, and the second via 14 reduces uncertainties in the signal transmission path and enhances the stability of the electrical connection.

[0099] Furthermore, the first plate 11 also includes a first sub-plate 111 and a second sub-plate 112, the first sub-plate 111 and the second sub-plate 112 are stacked, the first high-speed signal transmission line 4 is sandwiched between the first sub-plate 111 and the second sub-plate 112, and the first via 13 and the second via 14 are disposed through the first sub-plate 111.

[0100] The first plate 11 further includes a first sub-plate 111 and a second sub-plate 112, wherein the first sub-plate 111 and the second sub-plate 112 are stacked, and the first high-speed signal transmission line 4 is sandwiched between the first sub-plate 111 and the second sub-plate 112. Figure 7As shown, the first via 13 and the second via 14 are provided on the first sub-board 111 and located at the end of the first high-speed signal transmission line 4.

[0101] This design places the first high-speed signal transmission line 4 between the first sub-board 111 and the second sub-board 112. This design allows for a more compact arrangement of the signal lines, reducing transmission distance. Vias, as a crucial component connecting signals across different layers, have their placement directly impacting signal transmission efficiency and quality. This embodiment further reduces the signal transmission path and improves signal transmission speed and stability by optimizing via placement.

[0102] Furthermore, the second board 12 also includes a third sub-board 121 and a fourth sub-board 122, which are stacked together. The second high-speed signal transmission line 5 is sandwiched between the third sub-board 121 and the fourth sub-board 122, and the third via 15 is disposed through the first board 11 and the third sub-board 121.

[0103] The second board 12 further includes a third sub-board 121 and a fourth sub-board 122, wherein the third sub-board 121 and the fourth sub-board 122 are stacked together, and the second high-speed signal transmission line 5 is sandwiched between the third sub-board 121 and the fourth sub-board 122. Figure 7 As shown, the third via 15 is provided on the first sub-board 111, the second sub-board 112 and the third sub-board 121, and is located at the end of the second high-speed signal transmission line 5.

[0104] This solution places the second high-speed signal transmission line 5 between the third sub-board 121 and the fourth sub-board 122. This design ensures the independence of the signal line and minimizes the path. The third via 15 is located on the first sub-board 111, the second sub-board 112, and the third sub-board 121, at the end of the second high-speed signal transmission line 5. This layout ensures a direct connection between the signal line and the processor 2, while also avoiding potential interference with the first high-speed signal transmission line 4. In principle, by setting an independent high-speed signal transmission line inside the second board 12, signal routing can be effectively managed, preventing crosstalk and electromagnetic interference between signals. The technical solution in this embodiment reduces signal delay and enhances signal stability and reliability by optimizing the layout of the second high-speed signal transmission line 5.

[0105] Furthermore, the first high-speed signal transmission line 4 and the second high-speed signal transmission line 5 include copper conductors and a silver coating plated on the surface of the copper conductors, wherein the high-speed signal is a signal with a frequency greater than or equal to 2 GHz.

[0106] Furthermore, the thickness of the silver coating is greater than or equal to 2 μm and less than or equal to 5 μm.

[0107] Copper conductors, as the primary medium for signal transmission, possess excellent conductivity, while a silver coating further enhances their conductivity and the stability of signal transmission. The presence of the silver coating reduces surface oxidation and contact resistance, thereby improving the transmission efficiency of high-frequency signals. In terms of effectiveness, the technical solution in this embodiment, through the use of a silver coating, effectively improves the transmission quality of high-frequency signals and reduces signal loss.

[0108] Furthermore, connector 3 is a high-speed connector.

[0109] Furthermore, connector 3 includes at least one of high-density connector 3 and high-speed connector 3.

[0110] The selection of high-density connectors and high-speed connectors is based on the signal transmission rate and the physical size of the connectors. High-density connectors are suitable for applications requiring a large number of signal lines, while high-speed connectors are suitable for high-frequency signal transmission. The technical solution in this embodiment, by selecting an appropriate connector type, can meet the needs of high-speed signal transmission while adapting to the limitations of high-density cabling, making it suitable for high-performance computing and network communication equipment.

[0111] The first high-speed signal transmission line mentioned above is a PCIe bus, and the second high-speed signal transmission line mentioned above is a UPI bus.

[0112] The PCIe bus is used for high-speed data exchange between peripherals and processor 2, while the UPI bus is used for high-speed interconnection between processors 2. The technical solution in this embodiment improves data transmission speed and overall system performance by optimizing the layout of the PCIe and UPI buses, making it suitable for data processing centers and supercomputers requiring high bandwidth and low latency.

[0113] Specifically, the aforementioned PCB board also includes a power management module, capacitors, resistors, and a crystal oscillator.

[0114] The integration of these components aims to provide a complete signal transmission and processing platform. In principle, the power management module is responsible for power supply and voltage regulation, capacitors and resistors are used for filtering and signal shaping, and the crystal oscillator provides a stable clock signal.

[0115] In addition, this embodiment introduces multi-layer shielding and isolation technology, constructing a physical isolation layer between the PCIe bus and the UPI bus to reduce mutual interference between signals. Furthermore, a shielding layer is made using special materials (such as conductive rubber, metal mesh, etc.) to ensure effective isolation of different signals and maintain signal integrity even in high-frequency operating environments. An additional shielding layer design is added to the first and second boards. This shielding layer not only physically separates the two types of buses but also absorbs and scatters electromagnetic waves through grounding, preventing signal leakage and interference.

[0116] A more specific technical solution involves a first sub-board made of standard FR-4 epoxy glass cloth substrate carrying the main electrical components, and a second sub-board made of polypropylene. Polypropylene has a low dielectric constant (approximately 2.2) and a low loss tangent (between 0.001 and 0.005), which effectively reduces signal attenuation and delay during transmission, especially in high-frequency signal applications, ensuring signal integrity and improving transmission efficiency. In the lamination process, the polypropylene board is placed at the core of the multilayer structure for internal high-speed signal transmission. This approach offers the advantage of providing a superior signal transmission path, particularly in areas requiring numerous via connections, where its low dielectric properties significantly reduce signal loss as it traverses different layers.

[0117] The circuit board provided in this application has been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only for the purpose of helping to understand the method and core ideas of this application. It should be noted that those skilled in the art can make several improvements and modifications to this application without departing from the principles of this application, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A circuit board, characterized in that, include: The circuit board body structure (1) is provided with a processor (2) and at least two connectors (3) electrically connected to the processor (2) respectively. The at least two connectors (3) are respectively provided on both sides of the processor (2), and each connector (3) has a set distance X1 between it and the processor (2); wherein, X1≤80mm.

2. The circuit board according to claim 1, characterized in that, X1≥45mm.

3. The circuit board according to claim 1, characterized in that, 0mm≤X1≤10mm.

4. The circuit board according to claim 1, characterized in that, The at least two connectors (3) include: A first connector (31) is disposed on a first side of the processor (2) along a first direction; The second connector (32) is disposed on the second side of the processor (2) along the first direction.

5. The circuit board according to claim 4, characterized in that, The number of the first connectors (31) is multiple, and the multiple first connectors (31) are spaced apart along the second direction; and / or, The number of the second connectors (32) is multiple, and the multiple second connectors (32) are spaced apart along the second direction; Wherein, the first direction is perpendicular to the second direction.

6. The circuit board according to claim 1, characterized in that, Multiple mounting holes are spaced apart on the circuit board body structure (1). The multiple mounting holes include a first mounting hole corresponding to the processor (2) and a second mounting hole corresponding to the connector (3). The circuit board also includes a second high-speed signal transmission line (5) disposed in the circuit board body structure (1). The two ends of the second high-speed signal transmission line (5) are respectively connected to the first mounting hole and the second mounting hole.

7. The circuit board according to claim 6, characterized in that, The number of processors (2) is multiple; among which, The plurality of said processors (2) are spaced apart along the second direction; and / or, Each of the processors (2) has a connector (3) on both sides.

8. The circuit board according to claim 7, characterized in that, The plurality of mounting holes include a plurality of first mounting holes that are configured one-to-one with the plurality of processors (2). The circuit board also includes a first high-speed signal transmission line (4) disposed in the circuit board body structure (1). One end of the first high-speed signal transmission line (4) is connected to the first mounting hole corresponding to one of the plurality of processors (2), and the other end of the first high-speed signal transmission line (4) is connected to the first mounting hole corresponding to another of the plurality of processors (2).

9. The circuit board according to claim 8, characterized in that, Each of the mounting holes is provided through the circuit board body structure (1).

10. The circuit board according to claim 8, characterized in that, The circuit board body structure (1) includes a first board body (11) and a second board body (12), which are stacked together. The first high-speed signal transmission line (4) is disposed in the second board body (12), and the second high-speed signal transmission line (5) is disposed in the first board body (11).

11. The circuit board according to claim 10, characterized in that, The first mounting hole used in conjunction with the first high-speed signal transmission line (4) is a third via (15), which extends from the first plate (11) into the second plate (12).

12. The circuit board according to claim 10, characterized in that, The first mounting hole and the second mounting hole used in conjunction with the second high-speed signal transmission line (5) are respectively the first via (13) and the second via (14), and both the first via (13) and the second via (14) are located within the first plate (11).

13. The circuit board according to claim 12, characterized in that, The first board (11) also includes a first sub-board (111) and a second sub-board (112). The first sub-board (111) and the second sub-board (112) are stacked together. The first high-speed signal transmission line (4) is sandwiched between the first sub-board (111) and the second sub-board (112). The first via (13) and the second via (14) are disposed through the first sub-board (111).

14. The circuit board according to claim 11, characterized in that, The second board (12) also includes a third sub-board (121) and a fourth sub-board (122), the third sub-board (121) and the fourth sub-board (122) are stacked, the second high-speed signal transmission line (5) is sandwiched between the third sub-board (121) and the fourth sub-board (122), and the third via (15) is disposed through the first board (11) and the third sub-board (121).

15. The circuit board according to claim 10, characterized in that, The first high-speed signal transmission line (4) and the second high-speed signal transmission line (5) include copper conductors and a silver coating plated on the surface of the copper conductors, wherein the high-speed signal is a signal with a frequency greater than or equal to 2 GHz.

16. The circuit board according to claim 15, characterized in that, The thickness of the silver coating is greater than or equal to 2 μm and less than or equal to 5 μm.

17. The circuit board according to claim 4, characterized in that, The connector (3) is a high-speed connector.

18. The circuit board according to claim 5, characterized in that, The connector (3) includes at least one of a high-density connector (3) and a high-speed connector (3).

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