RDL switching assembly based on silicon wafer

Abstract

The utility model discloses an RDL switching assembly based on a silicon wafer, comprising a substrate made of a silicon wafer; an oxide layer is arranged on the substrate, an electroplating layer is arranged above the oxide layer, and electroplating patterns of the electroplating layer are a plurality of electrical circuits; the inner ring of the substrate is provided with a plurality of test bonding pads, the outer ring of the substrate is provided with fixed bonding pads, a plurality of wires are welded at the fixed bonding pads, the number of the test bonding pads and the number of the fixed bonding pads are consistent with the number of the electrical circuits, and the test bonding pads and the fixed bonding pads are electrically connected through the electrical circuits. According to the utility model, the silicon wafer is used as the substrate to manufacture the RDL adapter plate, the silicon wafer is low in cost, good in flatness and short in manufacturing period, the electrical circuit formed by electroplating on the silicon wafer is high in precision, and the test requirement of an advanced process chip can be met.

Description

Technical Field

[0001] This utility model relates to the field of adapter board technology, and in particular to an RDL adapter component based on silicon wafers. Background Technology

[0002] Current testing methods for logic chips with small pitches primarily rely on ceramic substrates as the core support structure. Within the probe card, the ceramic substrate acts as a spatial conversion substrate, undertaking the dual functions of pitch conversion and signal transmission. Through micron-level metal wiring design, the large-pitch signal interface of the tester (e.g., hundreds of microns) is converted into a micro-pitch that matches the chip pads or bumps, thereby achieving precise contact of the high-density probe array.

[0003] However, ceramic substrates rely on complex processes such as high-temperature co-firing, resulting in production cycles that can last for months. Furthermore, the high cost of materials like aluminum nitride leads to significant losses from single failures. At the same time, current ceramic substrates typically have linewidths / spacings exceeding 50μm, making it difficult to meet the requirements for ultra-fine pitches below 10μm and thus hindering the testing needs of advanced process chips. Utility Model Content

[0004] To address the aforementioned issues, this invention provides an RDL adapter based on silicon wafers, which is low-cost, has a short manufacturing cycle, and can produce high-precision circuits.

[0005] Therefore, the technical solution of this utility model is: an RDL adapter based on a silicon wafer, including a substrate made of a silicon wafer; an oxide layer is provided on the substrate, and an electroplating layer is provided above the oxide layer, the electroplating pattern of the electroplating layer being a plurality of electrical lines; a plurality of test pads are provided in the inner ring of the substrate, and a fixed pad is provided in the outer ring, with a plurality of wires welded to the fixed pads, and the number of test pads, fixed pads and electrical lines is the same, and the test pads and fixed pads are electrically connected by electrical lines.

[0006] Based on the above scheme and as a preferred embodiment of the above scheme: an organic insulating film is provided on the electroplated layer, and the electrical circuit is located within the coverage area of ​​the organic insulating film.

[0007] Based on the above scheme and as a preferred embodiment of the above scheme: the organic insulating film is provided with several through holes, and the test pads and fixing pads are exposed from the through holes.

[0008] Based on the above scheme and as a preferred embodiment of the above scheme: the organic insulating film material is polyimide or benzocyclobutene.

[0009] Based on the above scheme and as a preferred embodiment of the above scheme: the electroplating pattern further includes several positioning marks, which are cross-shaped patterns.

[0010] Based on the above scheme and as a preferred embodiment of the above scheme: the corners of the electrical circuits are connected by a rounded transition.

[0011] Compared with the prior art, the beneficial effects of this utility model are: using silicon wafers as substrates to manufacture RDL adapter boards, silicon wafers are inexpensive, have good flatness, and a short manufacturing cycle; the electrical circuits formed by electroplating on silicon wafers have high precision and can meet the testing requirements of advanced process chips; covering the electrical circuits with an organic insulating film can reduce interference between circuits and short circuits caused by material flow during welding; adding a cross pattern for positioning on the substrate allows for very precise welding. Attached Figure Description

[0012] Figure 1 This is a schematic diagram of the structure of this utility model;

[0013] Figure 2 for Figure 1 A magnified view of a portion of the image;

[0014] Figure 3 This is a side view of the structure of this utility model.

[0015] The markings in the figure are as follows: substrate 1, oxide layer 2, electroplating layer 3, electrical circuit 31, arc segment 32, positioning mark 33, test pad 4, fixing pad 5, organic insulating film 6, through hole 61. Detailed Implementation

[0016] In the description of this utility model, it should be noted that the directional terms such as "center", "horizontal (X)", "longitudinal (Y)", "vertical (Z)", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", and "counterclockwise" indicate the orientation and positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. They should not be construed as limiting the specific protection scope of this utility model.

[0017] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features. Thus, the use of "first" and "second" to define a feature may explicitly or implicitly include one or more of that feature. In the description of this utility model, "several" or "a number" means two or more, unless otherwise explicitly specified.

[0018] See the attached figures. The silicon wafer-based RDL adapter assembly described in this embodiment includes a substrate 1, which is made of a silicon wafer. An oxide layer 2 is provided on the substrate 1, and an electroplated layer 3 is provided above the oxide layer 2. The electroplated pattern of the electroplated layer 3 consists of several electrical lines 31, with the corners of the electrical lines 31 connected by arc segments 32. The electroplated pattern also includes several positioning marks 33, which are cross-shaped patterns.

[0019] The substrate 1 has a plurality of test pads 4 on its inner ring and fixed pads 5 on its outer ring. A plurality of wires are soldered to the fixed pads 5. The number of test pads 4, fixed pads 5 and electrical circuits 31 are the same. The test pads 4 and fixed pads 5 are electrically connected by electrical circuits 31. The electrical circuits perform the dual functions of spacing conversion and signal transmission.

[0020] An organic insulating film 6 is provided on the electroplated layer 3. The organic insulating film 6 is made of polyimide or benzocyclobutene. The electrical circuit 3 is located within the coverage area of ​​the organic insulating film 6, which can reduce interference between electrical circuits. The organic insulating film 6 has several through holes 61, through which the test pads 4 and the fixing pads 5 are exposed for subsequent soldering and testing.

[0021] During production:

[0022] ① Prepare a silicon wafer, grind the surface flat, and perform surface oxidation treatment;

[0023] ② The electrical circuits are covered on the surface of the silicon wafer that has been oxidized by electroplating, and a cross pattern for positioning is added around them. This can increase the bonding force and make the circuits less likely to fall off. The curvature at the corners of the electrical circuits is added to reduce stress damage.

[0024] ③ Cover the surface with a layer of organic insulating film, leaving the areas to be welded exposed;

[0025] ④ Solder test pads on the inner end points of the electrical circuits on the inner ring of the silicon wafer;

[0026] ⑤ Solder the fixing pads on the outer edge of the silicon wafer and the outer end of the electrical circuit, and solder the connecting wires to complete the physical connection from the wafer under test to the connector.

[0027] ⑥ The circuitry on the entire silicon substrate is thinned to the set value by polishing.

[0028] The above description is merely a preferred embodiment of this utility model. The protection scope of this utility model is not limited to the above embodiments. All technical solutions falling within the scope of this utility model's concept are protected. It should be noted that for those skilled in the art, any improvements and modifications made without departing from the principle of this utility model should also be considered within the protection scope of this utility model.

Claims

1. An RDL adapter component based on silicon wafers, characterized in that: The substrate includes a substrate made of silicon wafer; the substrate has an oxide layer, and an electroplating layer is provided above the oxide layer, the electroplating pattern of which is a plurality of electrical circuits; the inner circle of the substrate has a plurality of test pads, the outer circle has fixed pads, and a plurality of wires are soldered to the fixed pads, and the number of test pads, fixed pads and electrical circuits is the same, and the test pads and fixed pads are electrically connected by electrical circuits.

2. The RDL adapter based on a silicon wafer as described in claim 1, characterized in that: An organic insulating film is provided on the electroplated layer, and the electrical circuit is located within the coverage area of ​​the organic insulating film.

3. The RDL adapter based on a silicon wafer as described in claim 2, characterized in that: The organic insulating film has several through holes, through which test pads and fixing pads are exposed.

4. The RDL adapter based on a silicon wafer as described in claim 2, characterized in that: The organic insulating film is made of polyimide or benzocyclobutene.

5. The RDL adapter based on a silicon wafer as described in claim 1, characterized in that: The electroplating pattern also includes several positioning marks, which are cross-shaped patterns.

6. The RDL adapter based on a silicon wafer as described in claim 1, characterized in that: The corners of the electrical wiring are connected by a rounded transition.

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