Multilayer high-order interconnection circuit board

Abstract

A multi-layer high-order interconnection circuit board comprises a board body and a plurality of chips arranged on the board body, the board body comprises an inner layer board and outer layer boards arranged on the two outer sides of the inner layer board, the chips are divided into the outer layer chips, the first inner layer chips and the second inner layer chips, the outer layer chips are connected to circuit layers of the outer layer boards, and the first inner layer chips and the second inner layer chips are connected to the circuit layers of the outer layer boards. The first inner-layer chip is connected to the circuit layer of the inner-layer board, and the peripheral surface of the first inner-layer chip is filled with an adhesive layer; the orientation of the second inner-layer chip is opposite to that of the first inner-layer chip, the bottom surface of the second inner-layer chip faces the outer side, and a bottom pin of the second inner-layer chip is electrically connected with a circuit layer on the outer side of the outer-layer plate; a plurality of heat dissipation holes are formed in the outer sides of the first inner-layer chip and the second inner-layer chip, and the heat dissipation holes are communicated with the outside. According to the utility model, not only can a large number of chips be installed, but also the influence on the performance of the circuit board due to excessive chip aggregation and over-dense gaps can be avoided; the device is high in practicability and has high popularization significance.

Description

TECHNICAL FIELD

[0001] The utility model relates to the technical field of circuit board, concretely relates to a multilayer high order interconnection circuit board. BACKGROUND

[0002] Printed circuit board, also known as printed circuit board, is the provider of electrical connection of electronic components. Printed circuit board develops from single layer to double-sided board, multilayer board and flexible board, and constantly develops in the direction of high precision, high density and high reliability. The current multilayer interconnection circuit board is the circuit board with higher circuit distribution density made by using micro blind hole technology, which can realize higher wiring density and more complex circuit design in smaller size. With the development of science and technology, the integrated electronic components on the circuit board are more and more dense, and the spacing between the electronic components is smaller and smaller, which is not conducive to heat dissipation, thereby reducing the performance of the circuit board and lacking practicality. INVENTION CONTENTS

[0003] Therefore, the utility model aims at providing a multilayer high order interconnection circuit board to solve the problems in the background art.

[0004] A multilayer high order interconnection circuit board comprises a board body and a plurality of chips arranged on the board body, the board body comprises an inner layer board and outer layer boards arranged on the two outer sides of the inner layer board, the chips are divided into outer layer chips and first inner layer chips and second inner layer chips, the outer layer chips are connected to the circuit layer of the outer layer board, the first inner layer chips are connected to the circuit layer of the inner layer board, and the outer peripheral surfaces of the first inner layer chips are filled with glue layers; the second inner layer chips are opposite to the first inner layer chips in orientation, the bottom surfaces of the second inner layer chips face the outer side, and the bottom feet of the second inner layer chips are electrically connected to the circuit layer of the outer side of the outer layer board; a plurality of heat dissipation holes are arranged on the outer sides of the first inner layer chips and the second inner layer chips, and the heat dissipation holes are communicated with the outside.

[0005] Further, a first groove is arranged on the outer side of the inner layer board, the aperture of the first groove is larger than that of the first inner layer chip, the first inner layer chip is arranged in the first groove, the pins of the first inner layer chip are welded to the circuit layer of the inner layer board, and the glue layer is filled between the outer peripheral edge of the first inner layer chip and the side wall of the first groove.

[0006] Further, a bottom foot groove is arranged on the bottom of the second inner layer chip, the groove wall of the bottom foot groove is made of conductive material, and the circuit layer of the outer layer board is filled in the bottom foot groove.

[0007] Further, the bottom foot groove is arranged in a trapezoidal shape or an inverted trapezoidal shape.

[0008] Further, a boss is arranged on the bottom of the second inner layer chip, and the circuit layer of the outer layer board is wrapped around the boss.

[0009] Further, the boss is arranged in a trapezoidal shape or an inverted trapezoidal shape.

[0010] Further, the bottom surface of the outer layer chip is provided with a pin, and the outer side of the pin is provided with a tin layer forming a reverse structure with the pin.

[0011] A circuit board electroplating processing device comprises a guide rail, a moving frame, a mounting plate and a clamp group, the moving frame is installed on the guide rail and can move left and right along the guide rail, the mounting plate is installed on the bottom of the moving frame, and the clamp group is installed on the bottom surface of the mounting plate; the guide rail comprises two symmetrically arranged side rails, the top of the guide rail is provided with a conductive strip, the bottom of the conductive strip is provided with a conductive groove, and the top of the moving frame is provided with a conductive block embedded in the conductive groove and movable in the conductive groove.

[0012] Further, the moving frame comprises two fixed plates and rollers arranged on the outer sides of the two fixed plates, the two fixed plates are symmetrically arranged on the two opposite sides of the mounting plate respectively, and the two rollers are embedded in the corresponding side rails and move in the corresponding side rails.

[0013] Further, the clamp group comprises a plurality of clamps, each clamp comprises a fixed clamping part and a movable clamping part arranged oppositely, the fixed clamping part is arranged on the outer side of the mounting plate, and the middle part of the movable clamping part is pivotally connected to the fixed clamping part.

[0014] In summary, the utility model discloses a kind of multi-layer boards, and the inner layer of the multi-layer board is embedded with chip in different directions, and then a plurality of heat dissipation holes are used for heat dissipation;Outer chip is arranged on the outer surface, and the inner and outer layer chips are arranged in a staggered manner.The design of separating multiple chips avoids the concentration of chips on the surface.In addition, the utility model also provides an electroplating processing device for processing heat dissipation holes on the multi-layer board of the utility model, and the active movement of the plate body enables the electroplating solution to enter the smaller heat dissipation holes more fully, avoiding the problem of incomplete electroplating.The utility model has strong practicality and strong popularization significance. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 A structure diagram of a multi-layer high-order interconnection circuit board is provided.

[0016] Figure 2 A structure diagram of a multi-layer high-order interconnection circuit board is provided. Figure 1 A structure diagram of a multi-layer high-order interconnection circuit board is provided.

[0017] Figure 3 A structure diagram of a multi-layer high-order interconnection circuit board is provided. Figure 1 Another embodiment structure diagram of a second inner layer chip is provided.

[0018] Figure 4 A partial cross-sectional structure diagram of an electroplating device is provided.

[0019] Figure 5 For Figure 4 The three-dimensional structure schematic diagram of the electroplating device. DETAILED DESCRIPTION

[0020] In order to make the purpose, technical scheme and advantages of the utility model more clearly, the following will be further described in detail by combining with the drawings and examples. It should be understood that the specific examples described here are only used to explain the utility model, and are not used to limit the utility model.

[0021] As Figures 1 to 3 The utility model provides a multilayer high order interconnection circuit board, the multilayer high order interconnection circuit board includes board body 10 and sets up several chips on board body 10, the board body is multilayer board, and it includes inner layer board 12, outer layer board 11 and the PP layer 13 set up between outer layer board 11 and inner layer board 12, the both sides of outer layer board 11 and inner layer board 12 are provided with circuit layer, and several chips are connected on inner layer board 11 and outer layer board 12.

[0022] The chip is divided into outer layer chip 21 and first inner layer chip 22, second inner layer chip 23, the outer layer chip 21 is connected on the circuit layer of outer layer board 11, and the bottom surface of the outer layer chip 21 is protruded with pin 211, which is connected on the circuit layer of outer layer board 11 through solder ball. More specifically, the bottom pin 211 of the outer layer chip 21 is arranged in trapezoidal shape, and the outer side tin layer 212 forms a reverse structure with the pin 211, so that the installation is more stable. In addition, the outer side of the tin layer 212 is provided with glue layer 213, and the glue layer 213 is heat-conducting glue.

[0023] The structure of the first inner layer chip 22 is basically same with the outer layer chip 21, and the difference is that the first inner layer chip 22 is connected on the circuit layer of inner layer board 12, and the outer peripheral surface is filled with glue layer 221. The PP layer 13 of the first inner layer chip 22 and part of outer layer board 11 are provided with first recess 14 on the outer side of inner layer board 12, the aperture of the first recess 14 is larger than the first inner layer chip 22, the first inner layer chip 22 is installed in the first recess 14, and the pin is welded on the circuit layer of inner layer board 12, and the outer peripheral edge and the sidewall of the first recess 14 form a filling glue layer.

[0024] The bottom of the second inner layer chip 23 is provided with a foot groove 231, the wall of which is made of conductive material. In this embodiment, the foot groove 231 is arranged in an inverted trapezoidal shape. The circuit layer of the outer layer plate 11 is filled in the foot groove 231. In addition, multiple heat dissipation holes 15 are provided on the outer sides of both the first inner layer chip 22 and the second inner layer chip 23. The heat dissipation holes 15 are connected to the outside to dissipate internal heat in a timely manner. In this embodiment, the layout structure design of the inner layer chips disperses the chip installation, avoiding the concentration of all chips on the outer surface. It can be understood that in another embodiment (such as...) Figure 3 As shown, the bottom of the second inner layer chip 23 is provided with a trapezoidal boss 231a, and the circuit layer of the outer layer plate 11 covers the trapezoidal boss 231a. The provision of the bottom groove 231 or the trapezoidal boss 231a increases the contact surface between the circuit layer and the pins, and improves the stability of the electrical contact.

[0025] like Figures 4 to 5 As shown, this utility model also discloses an electroplating processing apparatus for electroplating holes on the aforementioned multilayer high-order interconnect circuit board. The electroplating processing apparatus includes a guide rail 10a, a movable frame 20a, a mounting plate 30a, and a fixture assembly 40a. The movable frame 20a is mounted on the guide rail 10a and can move left and right along the guide rail 10a. The mounting plate 30a is mounted at the bottom of the movable frame 20a, and the fixture assembly 40a is mounted on the bottom surface of the mounting plate 30a.

[0026] The guide rail 10a includes two symmetrically arranged side rails 11a, which are combined left and right. The upper and lower ends of the side rails are locked by bolts. A conductive strip 12a is provided on the top of the guide rail, and a conductive groove is provided at the bottom of the conductive strip 12a. A conductive block 21a is provided on the top of the movable frame 20a. The conductive block 21a is embedded in the conductive groove and can move within the conductive groove.

[0027] The movable frame 20a includes two fixed plates 21a and rollers 22a disposed on the outer sides of the two fixed plates 21a. The two fixed plates 21a are respectively mounted on two opposite sides of the mounting plate 30a and are arranged symmetrically. The two rollers 22a are respectively embedded in corresponding side rails 11a and can move within their corresponding side rails 11a. The clamping assembly 40a includes a plurality of clamps 41a. Each clamp 41a includes a fixed clamping part 411a and a movable clamping part 412a disposed opposite to each other. The fixed clamping part 411a is disposed on the outer side surface of the mounting plate 30a. The middle part of the movable clamping part 412a is pivotally connected to the fixed clamping part 411a and can rotate to clamp or release.

[0028] The tail end of the movable clamping part 412a is provided with a spring 413a connected to the fixed clamping part 411a.

[0029] In summary, the utility model discloses a multilayer board is embedded in the different direction of inner layer chip, then adopts a plurality of heat dissipation hole heat dissipation again, sets up the outside chip on the outer surface, and the inside and outside layer core is set up in the position difference.This kind of design that separates a plurality of chips avoids the chip too concentrated surface, in addition, the utility model also provides a kind of electroplating processing device, it is used to process heat dissipation hole on the multilayer board of the utility model, the initiative movement of plate body, so that electroplating liquid can more fully enter into smaller heat dissipation hole, avoid the problem of electroplating not in place.

[0030] The utility model has strong practicability and strong popularization significance.

[0031] The above-mentioned embodiments only express some implementation manners of the utility model, and the description is more specific and detailed, but it can not be understood as the limitation of the utility model patent scope. It should be pointed out that for ordinary skilled person in the art, without departing from the concept of the utility model, some modifications and improvements can be made, which belong to the protection scope of the utility model. Therefore, the protection scope of the utility model patent should be subject to the appended claims.

Claims

1. A multilayer high-order interconnect circuit board, characterized in that: The device includes a board body and several chips disposed on the board body. The board body includes an inner layer board and an outer layer board disposed on its two outer sides. The chips are divided into outer layer chips, a first inner layer chip, and a second inner layer chip. The outer layer chips are connected to the circuit layer of the outer layer board, and the first inner layer chips are connected to the circuit layer of the inner layer board, and their outer peripheral surfaces are filled with an adhesive layer. The second inner layer chip is oriented opposite to the first inner layer chip, with its bottom surface facing outwards. The bottom of the second inner layer chip is electrically connected to the circuit layer on the outer side of the outer layer board. Multiple heat dissipation holes are provided on the outer sides of both the first inner layer chip and the second inner layer chip, and the heat dissipation holes are connected to the outside.

2. The multilayer high-order interconnect circuit board as described in claim 1, characterized in that: The outer side plate of the inner layer board is provided with a first groove. The diameter of the first groove is larger than that of the first inner layer chip. The first inner layer chip is installed in the first groove, and its pins are soldered to the circuit layer of the inner layer board. A filling adhesive layer is formed between its outer periphery and the side wall of the first groove.

3. The multilayer high-order interconnect circuit board as described in claim 1, characterized in that: The bottom of the second inner layer chip is provided with a foot groove, the wall of which is made of conductive material, and the circuit layer of the outer layer board is filled in the foot groove.

4. The multilayer high-order interconnect circuit board as described in claim 3, characterized in that: The base groove is trapezoidal or inverted trapezoidal in shape.

5. The multilayer high-order interconnect circuit board as described in claim 3, characterized in that: The second inner layer chip has a boss at its bottom, and the circuit layer of the outer layer board covers the boss.

6. The multilayer high-order interconnect circuit board as described in claim 5, characterized in that: The boss is arranged in a trapezoidal shape or an inverted trapezoidal shape.

7. The multilayer high-order interconnect circuit board as described in claim 1, characterized in that: The outer chip has protruding pins on its bottom surface, and a tin layer forming an inverted structure with it is provided on its outer side. An adhesive layer is provided on the outer side of the tin layer.

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