High electrostatic protection PCB structure for high-speed signals

Abstract

The utility model discloses a high electrostatic protection PCB structure used for high speed signals, a capacitor bank is arranged at the top layer of a segmentation area, the capacitor bank comprises a first bridging capacitor and a second bridging capacitor which are respectively arranged at two sides of a protruding part, and the first bridging capacitor and the second bridging capacitor are arranged along the X-axis direction. And the convex extension part of the digital ground is connected with the analog ground. According to the design, the first bridging capacitor and the second bridging capacitor are changed into the transverse layout from the traditional vertical layout, so that signals can flow back more smoothly in a coplanar waveguide state, unnecessary bypassing is reduced, an actual signal flow-back path is shortened, and the signal transmission efficiency is improved. Insertion loss curve resonance and return loss degradation caused by an overlong signal backflow path can be greatly improved.

Description

Technical Field

[0001] This utility model relates to the field of circuit board design technology, and more specifically, to a high electrostatic discharge protection PCB structure for high-speed signals. Background Technology

[0002] Printed circuit boards (PCBs) serve as the physical support and key component for signal transmission in electronic products, playing an indispensable role in modern electronic devices. They not only provide a mounting substrate for various electronic components but also enable electrical connections between these components through conductive paths on them.

[0003] Electrostatic discharge (ESD) protection is a crucial consideration in the design of all electronic products, as effective ESD protection measures can safeguard electronic components from ESD damage and ensure the stability and reliability of circuit boards. The hazards of ESD are mainly manifested in the following aspects:

[0004] Electrostatic discharge (ESD): Electrostatic discharge can directly damage electronic components, especially for particularly sensitive components such as chips and other precision parts. ESD may cause them to break down or accelerate the aging process.

[0005] Electromagnetic interference: When electrostatic discharge occurs, a strong electromagnetic field is generated. This electromagnetic field affects the surrounding circuits through capacitive coupling, inductive coupling or radiative coupling, causing abnormal behavior of the circuit board.

[0006] Dust adsorption: Static electricity can also attract dust particles, which can cause contamination on the circuit board surface and thus affect its normal operation.

[0007] Therefore, during the PCB design phase, electrostatic discharge (ESD) protection must be implemented for sensitive components and signals. The common practice is to use dedicated ESD devices to safely discharge static electricity to the chassis ground or digital ground, thereby protecting critical chips from damage and ensuring the normal operation of the equipment.

[0008] However, since digital ground is also a pathway for electrostatic discharge (ESD), it is necessary to separate the analog ground from the digital ground of some sensitive chips or devices. While this prevents ESD from affecting sensitive components through the digital ground, it also forces some signals to cross different ground planes. Such crossings inherently cause sudden changes in the local impedance of the signal and deterioration of the return current path. If the signal rate is low and the rise time is long, the signal may not be significantly affected; however, as the signal rate increases, especially for high-speed signals, this crossing phenomenon leads to a deterioration in signal quality, known as signal degradation.

[0009] With the passage of time and technological advancements, signal transmission speeds are increasing, especially in the field of high-precision medical equipment, where electrostatic interference (ESI) has become a particularly prominent issue. These devices are often extremely sensitive to static electricity; any ESI can lead to equipment malfunction or even threaten patient safety. This presents a new challenge—how to achieve efficient ESI protection without severely compromising signal integrity. This paradox is one of the problems that urgently needs to be solved in current technological development. Utility Model Content

[0010] In order to overcome the shortcomings of the prior art, this utility model provides a high electrostatic discharge protection PCB structure for high-speed signals, which can meet the high electrostatic discharge protection requirements while significantly improving the signal degradation problem caused by segmentation.

[0011] The technical solution of this utility model is as follows: A high electrostatic discharge protection PCB structure for high-speed signals, comprising:

[0012] A ground layer comprising digital ground and analog ground, wherein a dividing region is provided between the digital ground and the analog ground to allow the digital ground and the analog ground to be arranged at intervals, the dividing region cutting the digital ground into a ground structure with protrusions, and the dividing region cutting the analog ground into a ground structure with gaps;

[0013] A capacitor bank is disposed on the top layer of the segmented area. The capacitor bank includes a first bridging capacitor and a second bridging capacitor respectively disposed on both sides of the protrusion. The first bridging capacitor and the second bridging capacitor are both arranged along the X-axis direction and are used to connect the protrusion of the digital ground and the analog ground.

[0014] Furthermore, it also includes a third bridging capacitor, which is disposed at the bottom layer of the segmented area. One end of the third bridging capacitor is connected to the protrusion of the digital ground, and the other end of the third bridging capacitor is connected to the analog ground. The third bridging capacitor is disposed along the Y-axis direction.

[0015] Furthermore, the segmented region includes two opposing segmentation gaps that are interconnected, and each segmentation gap includes a first segment and a second segment. The first segment extends inward from the outer edge of the stratum along the X-axis direction, and the first segment is connected to the end of the first segment. The second segment extends along the Y-axis direction.

[0016] Furthermore, the width of the first segment is equal to the width of the second segment.

[0017] Furthermore, the width of the first segment is 1.1mm to 1.2mm.

[0018] Furthermore, the width of the second segment is 1.1mm to 1.2mm.

[0019] Furthermore, the width of the first segment is 1.14 mm.

[0020] Furthermore, the width of the second segment is 1.14 mm.

[0021] The beneficial effects of this utility model based on the above solution are as follows: This utility model provides a high electrostatic discharge (ESD) protection PCB structure for high-speed signals. The capacitor bank is located on the top layer of the segmented area. The capacitor bank includes a first bridging capacitor and a second bridging capacitor respectively disposed on both sides of the protrusion. Both the first and second bridging capacitors are arranged along the X-axis and are used to connect the digital ground protrusion and the analog ground. This design changes the traditional vertical (Y-axis) layout of the first and second bridging capacitors to a horizontal (X-axis) layout, ensuring smoother signal return in the coplanar waveguide state, reducing unnecessary detours, and thus shortening the actual signal return path. This significantly improves the insertion loss curve resonance and return loss degradation caused by excessively long signal return paths. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is one of the traditional 75-ohm signal PCB structure designs;

[0024] Figure 2 The second type of traditional 75-ohm signal PCB structure design;

[0025] Figure 3 This is a top view of the high electrostatic discharge protection PCB structure in an embodiment of this utility model;

[0026] Figure 4 This is a bottom view of the high electrostatic discharge protection PCB structure in an embodiment of this utility model;

[0027] Figure 5 This is a three-dimensional schematic diagram of the high electrostatic discharge protection PCB structure in the embodiments of this utility model;

[0028] In the diagram, 1 is the ground layer; 11 is the digital ground; 111 is the protrusion; 12 is the analog ground; 13 is the segmented area; 131 is the segment gap; 1311 is the first segment; 1312 is the second segment; 2 is the capacitor bank; 21 is the first bridging capacitor; 22 is the second bridging capacitor; 3 is the third bridging capacitor; and 4 is the coaxial connector. Detailed Implementation

[0029] The embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples. The following detailed description of the embodiments and the accompanying drawings are used to illustrate the principles of the present invention by way of example, but should not be used to limit the scope of the present invention, that is, the present invention is not limited to the described embodiments.

[0030] To better understand this utility model, the following description, in conjunction with the accompanying drawings and embodiments, will further illustrate the present utility model:

[0031] See Figure 1 As shown, Figure 1 As is typical of traditional 75-ohm signal PCB designs, the 75-ohm signal is connected to an external sensor via coaxial connector 4. Due to high ESD protection requirements, the AGND (analog ground 12) of coaxial connector 4 needs to be separated from the DGND (digital ground 11) of the chip. Figure 1 The PCB design for a 75-ohm signal shown divides the transmission line into a ground plane (GND). While this design meets high electrostatic discharge (ESD) protection requirements, it causes changes in the capacitance and inductance of this area, directly altering the characteristic impedance of the transmission line. When the impedance changes drastically, some signal energy is reflected back to the source, reducing the signal-to-noise ratio (SNR) and increasing the bit error rate (BER), severely impacting data transmission quality and failing to meet the requirements for high-speed signal transmission.

[0032] See Figure 2 As shown, Figure 2 This is the second traditional 75-ohm signal PCB design. Figure 2 The 75-ohm signal PCB design shown relocates the segmented area 13 to the signal pad location. First bridging capacitors 21 and 22 are distributed on both sides of the signal pad, connecting DGND and AGND respectively. These first bridging capacitors 21 and 22 are arranged vertically. While this design improves the transmission line impedance in the segmented area, allowing the transmission line to better meet the 3Gbps signal transmission requirements, it also results in a longer return current path. This return path, as... Figure 2 As shown by the thick black line, this leads to increased high-frequency energy loss. This not only causes resonance in the insertion loss curve but also degrades the return loss, which cannot meet the signal transmission requirements for higher-speed signals.

[0033] Based on this, this utility model embodiment provides a high electrostatic discharge protection PCB structure for high-speed signals, including a circuit board body and a capacitor bank 2.

[0034] See Figures 3-5 As shown, the circuit board body includes a signal layer, a power layer, and a ground layer 1. The ground layer 1 includes a digital ground 11 and an analog ground 12. A partition region 13 is provided between the digital ground 11 and the analog ground 12 so that the digital ground 11 and the analog ground 12 are arranged alternately. The partition region 13 cuts the digital ground 11 into a ground structure with a protrusion 111 and the analog ground 12 into a ground structure with a notch. A capacitor group 2 is provided on the top layer of the partition region 13. The capacitor group 2 includes a first bridging capacitor 21 and a second bridging capacitor 22 respectively provided on both sides of the protrusion 111. The first bridging capacitor 21 and the second bridging capacitor 22 are both arranged along the X-axis direction and are used to connect the protrusion 111 of the digital ground 11 and the analog ground 12.

[0035] Specifically, capacitor bank 2 is located on the top layer of segmented region 13. Capacitor bank 2 includes a first bridging capacitor 21 and a second bridging capacitor 22 respectively located on both sides of the protrusion 111. Both the first bridging capacitor 21 and the second bridging capacitor 22 are arranged along the X-axis and are used to connect the protrusion 111 of digital ground 11 and analog ground 12. This design changes the traditional vertical (Y-axis) layout of the first bridging capacitor 21 and the second bridging capacitor 22 to a horizontal (X-axis) layout, ensuring smoother signal return in the coplanar waveguide state, reducing unnecessary detours, and thus shortening the actual signal return path. This return path is as follows: Figure 3 As shown by the thick black line, it can significantly improve the resonance of the insertion loss curve and the degradation of return loss caused by excessively long signal return paths.

[0036] In another embodiment, the high electrostatic discharge protection PCB structure for high-speed signals further includes a third bridging capacitor 3, which is disposed at the bottom layer of the segmented region 13. One end of the third bridging capacitor 3 is connected to the protrusion 111 of the digital ground 11, and the other end of the third bridging capacitor 3 is connected to the analog ground 12. The third bridging capacitor 3 is disposed along the Y-axis direction.

[0037] Specifically, a third bridging capacitor 3 is arranged along the Y-axis at the bottom layer of the segmented region 13 of the transmission line. This capacitor provides a reference for the transmission line within the segmented region 13, helping to alleviate impedance abrupt changes caused by the segmentation. This design not only improves the impedance matching of the transmission line but also creates a new signal return path. This new signal return path further shortens the signal return distance, reduces unnecessary loop area and inductance effects, thereby improving the transmission line's performance at high frequencies. In other words, this design establishes a low-impedance connection channel between the segmented ground planes, enabling high-frequency signals to find a return path more effectively, reducing energy loss and reflection, helping to maintain signal integrity, reducing insertion loss, improving return loss characteristics, and enhancing the high-frequency performance of the transmission line.

[0038] It is worth mentioning that, using the high electrostatic discharge protection PCB structure provided in this embodiment, the transmission line can meet the 12Gbps signal transmission requirements.

[0039] Specifically, the segmented region 13 includes two opposing segmentation gaps 131, which are interconnected. Each segmentation gap 131 includes a first segment 1311 and a second segment 1312. The first end of the first segment 1311 extends inward from the outer edge of the stratum 1 along the X-axis direction, and the first end of the second segment 1312 is connected to the end of the first segment 1311, extending along the Y-axis direction. The width of the first segment 1311 is equal to the width of the second segment 1312.

[0040] In one embodiment, the width of the first segment 1311 is 1.1mm to 1.2mm, and the width of the second segment 1312 is 1.1mm to 1.2mm. As a preferred design, the width of the first segment 1311 is 1.14mm, and the width of the second segment 1312 is 1.14mm. It is worth noting that the segment widths of the digital ground and analog ground depend on the isolation requirements; the dimensions shown here are merely examples and not mandatory standard dimensions. In practical applications, those skilled in the art can adjust these dimensions appropriately according to the isolation requirements.

[0041] It should be noted that the indicated orientation or positional relationship is based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship that the product is usually placed in during use, or the orientation or positional relationship that is commonly understood by those skilled in the art, or the orientation or positional relationship that the product is usually placed in during use. It is only for the purpose of facilitating the description of this application and simplifying the description, and is not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this application.

[0042] It should be understood that those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

[0043] The present utility model patent has been described above with reference to the accompanying drawings. Obviously, the implementation of the present utility model patent is not limited to the above-described manner. Any improvements made by adopting the inventive concept and technical solution of the present utility model patent, or the direct application of the inventive concept and technical solution of the present utility model patent to other occasions without modification, are all within the protection scope of the present utility model.

Claims

1. A high electrostatic discharge (ESD) protection PCB structure for high-speed signals, characterized in that, include: A ground layer comprising digital ground and analog ground, wherein a dividing region is provided between the digital ground and the analog ground to allow the digital ground and the analog ground to be arranged at intervals, the dividing region cutting the digital ground into a ground structure with protrusions, and the dividing region cutting the analog ground into a ground structure with gaps; A capacitor bank is disposed on the top layer of the segmented area. The capacitor bank includes a first bridging capacitor and a second bridging capacitor respectively disposed on both sides of the protrusion. The first bridging capacitor and the second bridging capacitor are both arranged along the X-axis direction and are used to connect the protrusion of the digital ground and the analog ground.

2. The high electrostatic discharge protection PCB structure for high-speed signals as described in claim 1, characterized in that: It also includes a third bridging capacitor, which is disposed at the bottom layer of the segmented area. One end of the third bridging capacitor is connected to the protrusion of the digital ground, and the other end of the third bridging capacitor is connected to the analog ground. The third bridging capacitor is disposed along the Y-axis direction.

3. The high electrostatic discharge protection PCB structure for high-speed signals as described in claim 1, characterized in that: The segmented region includes two opposing segmentation gaps that are interconnected. Each segmentation gap includes a first segment and a second segment. The first segment extends inward from the outer edge of the stratum along the X-axis direction. The first segment is connected to the end of the first segment and extends along the Y-axis direction.

4. The high electrostatic discharge protection PCB structure for high-speed signals as described in claim 3, characterized in that: The width of the first segment is equal to the width of the second segment.

5. A high electrostatic discharge (ESD) protection PCB structure for high-speed signals as described in claim 3, characterized in that: The width of the first segment is 1.1mm to 1.2mm.

6. The high electrostatic discharge protection PCB structure for high-speed signals as described in claim 3, characterized in that: The width of the second segment is 1.1mm to 1.2mm.

7. A high electrostatic discharge (ESD) protection PCB structure for high-speed signals as described in claim 3, characterized in that: The width of the first segment is 1.14 mm.

8. A high electrostatic discharge protection PCB structure for high-speed signals as described in claim 3, characterized in that: The width of the second segment is 1.14 mm.

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