Server and server system

Abstract

The utility model discloses a server and a server system. The server comprises a processor node, an optical module, a retimer and a control module, a first interconnection signal transmission end of the processor node is connected with a second interconnection signal transmission end of the retimer, a third interconnection signal transmission end of the retimer is connected with a fourth interconnection signal transmission end of the optical module, and a fifth interconnection signal transmission end of the optical module is connected with the switching module; the in-place signal output end of the optical module is connected with the in-place signal detection end of the control module, and the reset signal output end of the control module is connected with the reset signal input end of the re-timer. According to the utility model, the in-place detection of the optical module can be realized, so that the server can obtain the plugging condition of the optical module in time.

Description

TECHNICAL FIELD

[0001] The utility model relates to server technical field especially relates to a server and server system. BACKGROUND

[0002] With the rapid development of AI, big data and other application fields, the requirement for computing performance is also higher and higher, and the traditional CPU (Central Processing Unit, central processor) server is difficult to meet the performance requirement of new business, and the heterogeneous computing mode composed of CPU, GPU (Graphics Processing Unit, graphics processing unit), FPGA (Field Programmable Gate Array, field programmable gate array) and ASIC (Application Specific Integrated Circuit, application specific integrated circuit) is gradually becoming the mainstream to carry out data training or inference.

[0003] Single-processor nodes are interconnected by high-speed signals on the board, and also interconnected by external switching modules to improve the pooling capability of the data center multi-node server. When implementing interconnection, the processor nodes are connected to the switching module through the re-timer, optical module and optical cable to complete the interconnection between the processor nodes, and the application of the optical module makes the interconnection topology of the data multi-node server more flexible and the wiring more convenient.

[0004] However, the existing scheme does not specially design the hot plug of the optical module, the server cannot perceive the plugging condition of the optical module and respond in time, which may cause the interconnection link of the server to fail and cannot be recovered. UTILITY MODEL CONTENT

[0005] The purpose of the embodiment of the utility model is to provide a kind of server and server system, it can realize to the in-place detection of optical module, so that server can obtain the plugging condition of optical module in time.

[0006] To achieve the above purpose, the utility model embodiment provides a kind of server, including N processor nodes, N optical modules, re-timer and control module;

[0007] The processor node includes first interconnection signal transmission end, the re-timer includes second interconnection signal transmission end, third interconnection signal transmission end and reset signal input end, the optical module includes fourth interconnection signal transmission end, fifth interconnection signal transmission end and in-place signal output end, and the control module includes in-place signal detection end and reset signal output end;

[0008] The first interconnection signal transmission end of the processor node is connected with the second interconnection signal transmission end of the re-timer, the third interconnection signal transmission end of the re-timer is connected with the fourth interconnection signal transmission end of the optical module, and the fifth interconnection signal transmission end of the optical module is connected with the switching module.

[0009] The in-place signal output end of the optical module is connected with the in-place signal detection end of the control module, and the reset signal output end of the control module is connected with the reset signal input end of the re-timer.

[0010] As an improvement of the above scheme, the server further comprises a power supply module; the power supply module comprises a power output end and an enable signal input end, the optical module further comprises a power input end, and the control module further comprises an enable signal output end.

[0011] The power output end of the power supply module is connected with the power input end of the optical module, and the enable signal output end of the control module is connected with the enable signal input end of the power supply module.

[0012] As an improvement of the above scheme, the control module further comprises an in-place indication signal output end, and the processor node further comprises an in-place indication signal input end.

[0013] The in-place indication signal output end of the control module is connected with the in-place indication signal input end of the processor node.

[0014] As an improvement of the above scheme, the server further comprises a clock module, the clock module comprises a clock signal output end, the re-timer further comprises a first clock signal input end, and the processor node further comprises a second clock signal input end.

[0015] The clock signal output end of the clock module is connected with the first clock signal input end of the re-timer and the second clock signal input end of the processor node respectively.

[0016] As an improvement of the above scheme, the control module is a programmable logic device.

[0017] As an improvement of the above scheme, the control module is a CPLD device.

[0018] As an improvement of the above scheme, the processor node is a GPU processor.

[0019] As an improvement of the above scheme, the server further comprises a central processor, and the central processor is connected with each processor node through a PCIE channel.

[0020] The utility model discloses an embodiment further provides a kind of server system, including server and switching module;The server includes N processor nodes, N optical modules, re-timer and control module;The processor node includes first interconnection signal transmission end, the re-timer includes second interconnection signal transmission end, third interconnection signal transmission end and reset signal input end, the optical module includes fourth interconnection signal transmission end, fifth interconnection signal transmission end and in-place signal output end, the control module includes in-place signal detection end and reset signal output end;The switching module includes sixth interconnection signal input end;

[0021] The first interconnection signal transmission end of the processor node is connected with the second interconnection signal transmission end of the re-timer, the third interconnection signal transmission end of the re-timer is connected with the fourth interconnection signal transmission end of the optical module, and the fifth interconnection signal transmission end of the optical module is connected with the sixth interconnection signal input end of the switching module;The in-place signal output end of the optical module is connected with the in-place signal detection end of the control module, and the reset signal output end of the control module is connected with the reset signal input end of the re-timer.

[0022] As an improvement of the above scheme, the server further includes a power supply module; the power supply module includes a power output end and an enable signal input end, the optical module further includes a power input end, and the control module further includes an enable signal output end; the power output end of the power supply module is connected with the power input end of the optical module, and the enable signal output end of the control module is connected with the enable signal input end of the power supply module.

[0023] Compared with the prior art, the server and the server system disclosed by the utility model include a plurality of processor nodes, a plurality of optical modules, a re-timer, a switching module and a control module; the processor nodes are connected with the optical modules one by one through the re-timer, the optical modules are connected with the switching module, and each optical module is connected with the switching module; the control module is connected with each optical module and the re-timer respectively, the control module is used for detecting the in-place signal of the optical module, and the reset signal of the re-timer is controlled according to the in-place signal. By means of the technical means of the utility model, the plugging condition of the optical module is perceived by the control module in real time to detect the in-place signal of the optical module, so that the server can obtain the plugging condition of the optical module in time, which is beneficial to the server to respond in time according to the plugging condition of the optical module, and avoids the failure of the interconnection link of the server after the optical module is plugged in and cannot be recovered. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 It is the structure schematic view of the first server provided by the utility model embodiment;

[0025] Figure 2is a structure schematic view of a second server provided by the embodiment of the utility model;

[0026] Figure 3 is a structure schematic view of a third server provided by the embodiment of the utility model;

[0027] Figure 4 is a working flow schematic view of the control module in the embodiment of the utility model;

[0028] Figure 5 is a structure schematic view of a fourth server provided by the embodiment of the utility model;

[0029] Figure 6 is a structure schematic view of a fifth server provided by the embodiment of the utility model;

[0030] Figure 7 is a structure schematic view of a first server system provided by the embodiment of the utility model;

[0031] In the drawing, 100, server;

[0032] 110, processor node;111, first interconnection signal transmission end;112, in place indication signal input end;113, second clock signal input end;

[0033] 120, re-timer;121, second interconnection signal transmission end;122, third interconnection signal transmission end;123, reset signal input end;124, first clock signal input end;

[0034] 130, optical module;131, fourth interconnection signal transmission end;132, fifth interconnection signal transmission end;133, in place signal output end;134, power input end;

[0035] 140, control module;141, in place signal detection end;142, reset signal output end;143, enable signal output end;144, in place indication signal output end;

[0036] 150, power supply module;151, power output end;152, enable signal input end;

[0037] 160, clock module;161 clock signal output end;

[0038] 170, central controller;

[0039] 200, server system;210, switching module. DETAILED DESCRIPTION

[0040] The technical solutions in the embodiments of the present application will be clearly and completely described with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of the present application.

[0041] In the description of the present application, it should be understood that the orientations or positional relationships indicated by the terms "center", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. are based on the orientations or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the devices or elements indicated must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0042] The terms "first", "second", etc. are only for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined with "first", "second", etc. can explicitly or implicitly include one or more of the features. In the description of the present application, unless otherwise specified, the meaning of "multiple" is two or more.

[0043] In the description of the present application, it should be noted that, unless otherwise explicitly specified and limited, the terms "mounting", "connection", "connecting" should be understood in a broad sense, for example, it can be fixed connection, or detachable connection, or integrally connected; it can be mechanical connection, or electrical connection; it can be directly connected, or indirectly connected through an intermediate medium, or the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0044] Referring to Figure 1 The present embodiment provides a first server structure schematic diagram, and the present embodiment provides a server 100, which comprises N processor nodes 110, N optical modules 130, a re-timer 120 and a control module 140, N is a positive integer greater than 1.

[0045] The processor node 110 comprises a first interconnection signal transmission end 111, the re-timer 120 comprises a second interconnection signal transmission end 121 and a third interconnection signal transmission end 122, the optical module 130 comprises a fourth interconnection signal transmission end 131, a fifth interconnection signal transmission end 132 and an in-place signal output end 133, and the control module 140 comprises an in-place signal detection end 141.

[0046] The first interconnection signal transmission end 111 of the processor node 110 is connected with the second interconnection signal transmission end 121 of the retimer 120, the third interconnection signal transmission end 122 of the retimer 120 is connected with the fourth interconnection signal transmission end 131 of the optical module 130, and the fifth interconnection signal transmission end 132 of the optical module 130 is connected with an external switching module. That is, N processor nodes 110 are connected with N optical modules 130 one by one through the retimer 120, and the optical modules 130 are connected with the external switching module.

[0047] In this scenario, each processor node 110 can be connected to the switching module through the optical module 130 and the optical cable to complete the interconnection expansion between each processor node 110. The processor node can be any one of GPU, FPGA, ASIC, TPU (Tensor Processing Unit), NPU (Neural network Processing Unit), DPU (Deeplearning Processing Unit), APU (Accelerated Processing Unit), and GPGPU (General-Purpose Graphics Processing Unit). The optical module is a module for converting high-speed electrical signals and optical signals, which is responsible for converting electrical signals into optical signals for transmission, and restoring optical signals into electrical signals at the receiving end. The whole connection process is as follows: after power-on booting into the system, each processor node 110 loads the driver, and the driver enables the LTSSM (Link Training and Status State Machine) state machine of the signal interconnection port of the processor node 110 to initiate link training, and each processor node 110 and the switching module complete link training and connection through the optical module 130 and the optical cable. Optionally, the interconnection signal output by the processor node 110 is connected through the QSFP (Quad Small Form-factor Pluggable) connector at the board edge, and then through the optical module and the optical cable to the switching unit to complete the interconnection between the processor nodes. The QSFP connector supports 4 or 8 data transmission channels and can support high-speed data transmission. Considering the signal integrity factor, a retimer 120 is also added in the interconnection link. The retimer 120 is usually located in the middle of the link between two interconnection devices, and is used to complete the relay of high-speed interconnection signals.

[0048] And, the in-position signal output end 133 of the optical module 130 is connected with the in-position signal detection end 141 of the control module 140, that is, the control module 140 is connected with each of the optical modules 130 respectively, and is used for detecting the in-position signal of the optical module 130.

[0049] When the topology needs to be changed or the optical module and the cable are damaged and need to be replaced, the hot plug optical module is needed. In the embodiment of the utility model, because the re-timer 120 divides the whole link into two ends of the processor node to the re-timer and the re-timer to the switching module, when the optical module 130 is plugged or unplugged, the synchronism of the two end links needs to be kept. Therefore, the control module 140 detects the in-position signal of the optical module 130 in real time to perceive the plugging or unplugging of the optical module 130, so that the server can perceive whether the optical module 130 is plugged or unplugged in time and respond to the plugging or unplugging of the optical module in time.

[0050] Optionally, the in-position signal of the optical module 130 can be set as low level effective, and the working principle of the control module 140 for perceiving the plugging or unplugging of the optical module 130 is that the control module 140 detects the in-position signal of the optical module 130, when the in-position signal is low level, it is determined that the optical module 130 is in the plugging state, and when the in-position signal is high level, it is determined that the optical module 130 is in the unplugging state.

[0051] By using the technical means of the embodiment of the utility model, the in-position signal of the optical module is detected in real time by the control module to perceive the plugging or unplugging of the optical module, so that the server can obtain the plugging or unplugging of the optical module in time, which is beneficial to the server responding in time according to the plugging or unplugging of the optical module and avoiding the interconnection link of the server from being faulty and unable to recover after the optical module is plugged or unplugged.

[0052] As a preferred embodiment, the re-timer 120 further comprises a reset signal input end 123, and the control module 140 further comprises a reset signal output end 142. The reset signal output end 142 of the control module 140 is connected with the reset signal input end 123 of the re-timer 120.

[0053] Because of the existence of the re-timer 120, after the optical module 130 is unplugged and plugged again, its state may be lost or become unstable in the hot plug process, and the interconnection link may be unable to recover. Therefore, in the embodiment of the utility model, after the control module 140 detects the in-position signal of the optical module 130 in real time to perceive the plugging or unplugging of the optical module 130, the reset signal output end sends the corresponding reset signal to the reset signal input end 123 of the re-timer 120 to control the re-timer 120 to work normally or reset.

[0054] The reset signal is a control signal for setting the circuit or component to an initial state. In the re-timer 120, the reset signal is used to control the opening and closing of the working state thereof.

[0055] Optionally, the reset signal of the re-timer 120 can be set as low active, when the reset signal of the serdes port of the re-timer 120 is released, the re-timer 120 works normally and participates in data transmission; when the reset signal of the serdes port of the re-timer 120 is pulled low, the re-timer 120 enters the reset state and stops working.

[0056] The working principle of the control module 140 sending the corresponding reset signal to the re-timer 120 to control the re-timer 120 to work normally or reset is as follows:

[0057] When the optical module 130 is determined to be in the inserted state according to the in-place signal 0, the control module 140 sends the reset signal 1 to the corresponding port of the re-timer 120, sets the reset signal of the re-timer to high level, that is, releases the reset signal of the port. After the reset signal is released, the re-timer 120 and the optical module 130 start to work normally. At this time, the server will perform link training, including signal synchronization, parameter negotiation, etc., to ensure that data can be correctly and stably transmitted. After the link training is completed, the interconnection link is established and the data transmission starts.

[0058] When the optical module 130 is determined to be in the pulled-out state according to the in-place signal 1, the control module 140 sends the reset signal 0 to the corresponding port of the re-timer 120, sets the reset signal of the re-timer to low level, that is, pulls the reset signal of the port low. After the reset signal is pulled low, the corresponding port of the re-timer 120 enters the reset state and stops data transmission.

[0059] By using the technical means of the embodiment of the utility model, the stability and reliability of the link are crucial in the high-speed interconnection link. The scheme can effectively manage the connection and disconnection state of the link by detecting the insertion and pulling of the optical module and corresponding control of the reset signal of the re-timer, realizes the intelligent management of the interconnection link when the optical module is inserted and pulled out, and ensures the accuracy and stability of data transmission. When the optical module is inserted, the reset signal is released in time to establish the link; when the optical module is pulled out, the reset signal is immediately pulled low to disconnect the link, which helps to protect the re-timer and other components on the interconnection link and prevent signal interference or damage caused by the pulling out of the optical module.

[0060] As a preferred embodiment, the embodiment is further implemented on the basis of any of the above embodiments, referring to Figure 2Is the structure schematic view of the second server provided by the embodiment of the utility model, the server 100 still includes power module 150;The power module 150 includes power output end 151 and enable signal input end 152, the optical module 130 still includes power input end 134, the control module 140 still includes enable signal output end 143.

[0061] The power output end 151 of the power module 150 is connected with the power input end 134 of the optical module 130, and the enable signal output end 143 of the control module 140 is connected with the enable signal input end 152 of the power module 150.

[0062] In the embodiment of the utility model, the power module 150 is arranged to supply power for the optical module 130, so that the optical module 130 can realize the photoelectric signal conversion function.When the optical module 130 is plugged or unplugged, the power module 150 of the optical module 130 is still in the power supply state, which may cause the electrical damage of the optical module 130.Therefore, after the control module 140 detects the presence signal of the optical module 130 to perceive the plugging condition of the optical module 130, the control module 140 sends the corresponding enable signal to the enable signal input end 152 of the power module 150 through the enable signal output end 143 to control the power-on or power-off of the power module 150.

[0063] The working principle that the control module 140 sends the corresponding enable signal to the power module 150 to control the power-on or power-off of the power module 150 is as follows: when the optical module 130 is determined to be in the insertion state according to the presence signal 0, the control module 140 sends the enable signal 1 to the power module 150 to control the power-on of the power module 150 to supply power for the optical module 130;When the optical module 130 is determined to be in the pulled-out state according to the presence signal 1, the control module 140 sends the enable signal 0 to the power module 150 to control the power-off of the power module 150 to stop supplying power for the optical module 130.

[0064] By using the technical means of the embodiment of the utility model, the plugging condition of the optical module is detected by the control module, and the power-on or power-off of the power module is controlled, so that the damage of the optical module caused by the power module still in the power supply state during hot plugging can be avoided, and the service life of the optical module is effectively prolonged.

[0065] As a preferred embodiment, the embodiment is further implemented on the basis of any of the above embodiments, referring to Figure 3 Is the structure schematic view of the third server provided by the embodiment of the utility model, the control module 140 still includes presence indication signal output end 144, and the processor node 110 still includes presence indication signal input end 112.The presence indication signal output end 144 of the control module 140 is connected with the presence indication signal input end 112 of the processor node 110.

[0066] In the embodiment of the utility model, when the plug-in and plug-out operation is performed on the optical module 130, the drive layer needs to timely perceive the occurrence of the hot plug behavior, so as to make the timely processing of the drive layer. Therefore, after the control module 140 detects the in-place signal of the optical module 130 to perceive the plug-in and plug-out condition of the optical module 130, it will also send the corresponding in-place indication signal to the in-place indication signal input end 112 of the processor node 110 through the in-place indication signal output end 144, for indicating whether the optical module 130 is in place, so that the processor node 110 obtains the plug-in and plug-out condition of the optical module 130 and makes the corresponding processing of the drive layer.

[0067] Referring to Figure 4 , it is the working process schematic diagram of the control module in the embodiment of the utility model, and the in-place signal of the optical module and the reset signal of the re-timer are low effective. When the control module 140 detects that the in-place signal of the optical module 130 is low, it means that the optical module is inserted, at this time, the control module 140 controls the power supply module 150 to be powered on, and simultaneously releases the reset signal of the corresponding port of the re-timer 120, so that the interconnection link completes the connection, and the control module 140 informs the corresponding processor node 110 that the optical module 130 connected by it is in place, at this time, the drive layer obtains the information of the insertion of the optical module 130 from the processor node 110 and makes the corresponding processing of the drive layer.

[0068] When the control module 140 detects that the in-place signal of the optical module 130 is high, it means that the optical module 130 is pulled out, at this time, the control module 140 controls the power supply module 150 to be powered off, and simultaneously pulls down the reset signal of the corresponding port of the re-timer 120, so that the port of the re-timer 120 in which the link is disconnected is in the reset state, and the control module 140 informs the corresponding processor node 110 that the optical module 130 connected by it has been pulled out, at this time, the drive layer obtains the information of the pulling out of the optical module 130 from the processor node 110 and makes the corresponding processing of the drive layer.

[0069] By the technical means of the embodiment of the utility model, the plug-in and plug-out condition of the optical module is detected by the control module, the re-timer is controlled to work or reset, the power supply module is controlled to be powered on or powered off, and the plug-in and plug-out condition of the optical module is indicated to the processor node, so that each module component of the server can timely obtain the plug-in and plug-out condition of the optical module, which is beneficial to the server to make timely response according to the plug-in and plug-out condition of the optical module and ensure the normal operation of the server.

[0070] As a preferred embodiment, the embodiment is further implemented on the basis of any of the above embodiments, referring to Figure 5The server 100 further comprises a clock module 160, the clock module 160 comprises a clock signal output end 161, the re-timer 120 further comprises a first clock signal input end 124, and the processor node 110 further comprises a second clock signal input end 113.

[0071] The clock signal output end 161 of the clock module 160 is connected with the first clock signal input end 124 of the re-timer 120 and the second clock signal input end 113 of the processor node 110 respectively.

[0072] In the embodiment of the utility model, clock module 160 is set to provide clock signal for processor node 110 and re-timer 120 on link, thereby providing accurate time for server, ensuring time consistency of processor node 110 and re-timer 120, and improving system stability and reliability.

[0073] It should be noted that the hot plug scheme does not need to be specially processed for the clock module.

[0074] As a preferred embodiment, the control module is a programmable logic device in the further implementation based on any of the above embodiments.

[0075] The CPLD has high-speed signal processing capability, can detect the in-place signal of the optical module in real time and accurately, and can generate an accurate reset signal to ensure that the re-timer can be accurately reset when needed.

[0076] As a preferred embodiment, the control module is a CPLD (Complex Programmable Logic Device) device. Figure 6 The server 100 further comprises a central processor 170, and the central processor 170 is connected with each processor node 110 through a PCIE (Peripheral Component Interconnect Express) channel.

[0077] As a preferred embodiment, the processor node 110 is a GPU processor.

[0078] In the embodiment of the utility model, the server 100 includes a heterogeneous computing mode formed by a combination of a central processing unit CPU and an image processor GPU and other processors, which is used for data training or reasoning. When the control module 140 sends the in-place indication signal to the processor node 110, the processor node 110 sends the in-place indication signal to the central processor 170 through the PCIE channel, so that the central processor makes a timely response at the drive level according to the in-place condition of the optical module 130, and guarantees the normal operation of the server 100.

[0079] Referring to Figure 7 , the utility model embodiment provides a first server system structure schematic drawing, the utility model embodiment still provides a kind of server system 200, the server system 200 includes server 100 and exchange module 210, the server 100 includes N processor nodes 110, N optical modules 130, re-timer 120 and control module 140.

[0080] The processor node 110 includes a first interconnection signal transmission end, the re-timer 120 includes a second interconnection signal transmission end, a third interconnection signal transmission end and a reset signal input end, the optical module 130 includes a fourth interconnection signal transmission end, a fifth interconnection signal transmission end and an in-place signal output end, the control module 140 includes an in-place signal detection end and a reset signal output end;The exchange module 210 includes a sixth interconnection signal input end;

[0081] The first interconnection signal transmission end of the processor node 110 is connected with the second interconnection signal transmission end of the re-timer 120, the third interconnection signal transmission end of the re-timer 120 is connected with the fourth interconnection signal transmission end of the optical module 130, and the fifth interconnection signal transmission end of the optical module 130 is connected with the sixth interconnection signal input end of the exchange module 210;The in-place signal output end of the optical module 130 is connected with the in-place signal detection end of the control module 140, and the reset signal output end of the control module 140 is connected with the reset signal input end of the re-timer 120.

[0082] Preferably, the server 100 further includes a power supply module 150;The power supply module 150 includes a power output end and an enable signal input end, the optical module 130 further includes a power input end, and the control module 140 further includes an enable signal output end;The power output end of the power supply module 150 is connected with the power input end of the optical module 130, and the enable signal output end of the control module 140 is connected with the enable signal input end of the power supply module 150.

[0083] Preferably, the control module 140 further comprises an in-position indication signal output end, and the processor node 110 further comprises an in-position indication signal input end; the in-position indication signal output end of the control module 140 is connected with the in-position indication signal input end of the processor node 110.

[0084] Preferably, the server 100 further comprises a clock module 160, the clock module 160 comprises a clock signal output end, the re-timer 120 further comprises a first clock signal input end, and the processor node 110 further comprises a second clock signal input end; the clock signal output end of the clock module 160 is connected with the first clock signal input end of the re-timer 120 and the second clock signal input end of the processor node 110 respectively.

[0085] Preferably, the server 100 further comprises a central processor 170, and the central processor 170 is connected with each processor node 110 through a PCIE channel.

[0086] It should be noted that the server 100 in the server system 200 is the server mentioned in any one of the above embodiments, and the structure and working principle of the two are the same, and thus will not be described here.

[0087] The above is the preferred embodiment of the present application, and it should be noted that for ordinary skilled in the art, without departing from the principles of the present application, a number of improvements and refinements can be made, and these improvements and refinements are also considered to be within the scope of the present application.

Claims

1. A server, characterized by The server comprises N processor nodes, N optical modules, a re-timer and a control module. The processor node comprises a first interconnection signal transmission end, the re-timer comprises a second interconnection signal transmission end, a third interconnection signal transmission end and a reset signal input end, the optical module comprises a fourth interconnection signal transmission end, a fifth interconnection signal transmission end and a in-place signal output end, and the control module comprises a in-place signal detection end and a reset signal output end. The first interconnection signal transmission end of the processor node is connected with the second interconnection signal transmission end of the re-timer, the third interconnection signal transmission end of the re-timer is connected with the fourth interconnection signal transmission end of the optical module, and the fifth interconnection signal transmission end of the optical module is connected with the switching module. The in-place signal output end of the optical module is connected with the in-place signal detection end of the control module, and the reset signal output end of the control module is connected with the reset signal input end of the re-timer.

2. The server of claim 1, wherein, The server further comprises a power supply module; the power supply module comprises a power supply output end and an enable signal input end, the optical module further comprises a power supply input end, and the control module further comprises an enable signal output end. The power supply output end of the power supply module is connected with the power supply input end of the optical module, and the enable signal output end of the control module is connected with the enable signal input end of the power supply module.

3. The server of claim 1, wherein, The control module further comprises a in-place indication signal output end, and the processor node further comprises a in-place indication signal input end. The in-place indication signal output end of the control module is connected with the in-place indication signal input end of the processor node.

4. The server according to any one of claims 1 to 3, characterized in that, The server further comprises a clock module; the clock module comprises a clock signal output end, the re-timer further comprises a first clock signal input end, and the processor node further comprises a second clock signal input end. The clock signal output end of the clock module is connected with the first clock signal input end of the re-timer and the second clock signal input end of the processor node respectively.

5. The server of claim 1, wherein, The control module is a programmable logic device.

6. The server of claim 5, wherein, The control module is a CPLD device.

7. The server of claim 1, wherein, The processor node is a GPU processor.

8. The server of claim 1 or 7, wherein, The server further comprises a central processing unit, and the central processing unit is connected with each processor node through a PCIE channel.

9. A server system, characterized by The server comprises N processor nodes, N optical modules, a re-timer and a control module; the processor node comprises a first interconnection signal transmission end, the re-timer comprises a second interconnection signal transmission end, a third interconnection signal transmission end and a reset signal input end, the optical module comprises a fourth interconnection signal transmission end, a fifth interconnection signal transmission end and a in-place signal output end, the control module comprises a in-place signal detection end and a reset signal output end, and the switching module comprises a sixth interconnection signal input end. The first interconnection signal transmission end of the processor node is connected with the second interconnection signal transmission end of the re-timer, the third interconnection signal transmission end of the re-timer is connected with the fourth interconnection signal transmission end of the optical module, and the fifth interconnection signal transmission end of the optical module is connected with the sixth interconnection signal input end of the exchange module; the in-position signal output end of the optical module is connected with the in-position signal detection end of the control module, and the reset signal output end of the control module is connected with the reset signal input end of the re-timer.

10. The server system of claim 9, wherein, The server further comprises a power supply module; the power supply module comprises a power output end and an enable signal input end, the optical module further comprises a power input end, and the control module further comprises an enable signal output end; The power output end of the power supply module is connected with the power input end of the optical module, and the enable signal output end of the control module is connected with the enable signal input end of the power supply module.

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