Interface circuit of inverter and inverter

Abstract

The utility model relates to the technical field of inverters, and relates to an interface circuit of an inverter and the inverter. The interface circuit comprises a main control chip, a broken line detection unit, a voltage division unit and a signal amplification unit, the broken line detection unit is connected with the other end of a broken line switch unit, and the broken line detection unit is used for detecting the broken line state of the power grid dispatching equipment and pulling down the voltage of the input end of the signal amplification unit when the line is broken; the voltage division unit comprises a first voltage division module and a plurality of second voltage division modules with different resistance values, the plurality of second voltage division modules and the plurality of power regulation switch units are connected in series in a one-to-one correspondence manner and then are connected in parallel, a first parallel node is grounded, and a second parallel node is connected with one end of the first voltage division module and the input end of the signal amplification unit; the other end of the first voltage-dividing module is connected with an external power supply; and the main control chip is used for judging the voltage output by the signal amplification unit and controlling grid-connected power generation according to a judgment result. The system has the functions of power dispatching and disconnection detection of the power grid dispatching equipment at the same time.

Description

TECHNICAL FIELD

[0001] The utility model relates to inverter technical field, especially an interface circuit and inverter of inverter. BACKGROUND

[0002] With the rapid development of the electric power industry, the development of photovoltaic new energy is gradually becoming the mainstream of the market, and as the core power generation equipment, the related technical quality requirements are also improving. Countries are also constantly considering the requirements of countries for inverter market access. Among them, the inverter access requirement standard AS / NZS 4777.2:2020 of the Australian market is officially revised and published, which requires that inverters need to increase grid-connected power scheduling interfaces and be connected to DRED (Demand Response Enabling Device, grid scheduling device) to adjust and control the grid-connected power in real time, and the control logic is set according to the mode specified in the standard content.

[0003] According to the standard requirements, a plurality of external IO interfaces need to be added to the inverter, one of which is used to forcibly disconnect the power grid. An IO interface is added to the existing inverter, which meets the basic mandatory requirements, but cannot realize power scheduling. Some inverters add multiple IO interfaces, but cannot realize line detection of the grid scheduling device, and thus cannot cut off the power grid in the case of line break of the grid scheduling device, which has a safety hazard. UTILITY MODEL CONTENT

[0004] The technical problem to be solved by the embodiments of the utility model lies in providing an interface circuit and inverter of inverter to solve the problem that the inverter in the prior art cannot simultaneously have the functions of power scheduling and line detection of the grid scheduling device.

[0005] The utility model discloses an interface circuit of inverter for connecting external grid scheduling device, wherein the grid scheduling device comprises a line break identification resistor, a line break switch unit and a plurality of power regulation switch units, the line break identification resistor is connected in parallel with the line break switch unit, one end of the line break switch unit is grounded, and the interface circuit of the inverter comprises a master control chip, a line break detection unit, a voltage division unit and a signal amplification unit, wherein,

[0006] The other end of the line break detection unit is connected with the line break switch unit, and the line break detection unit is used for detecting the line break state of the grid scheduling device and pulling down the input voltage of the signal amplification unit when the line is broken.

[0007] The voltage dividing unit comprises a first voltage dividing module and a plurality of second voltage dividing modules with different resistance values, the plurality of second voltage dividing modules are connected in series and then connected in parallel one by one, a first parallel node thereof is grounded, a second parallel node thereof is connected to one end of the first voltage dividing module and an input end of the signal amplification unit, and the other end of the first voltage dividing module is connected to an external power supply.

[0008] An analog input port of the master control chip is connected to an output end of the signal amplification unit, the master control chip is used for judging a voltage output by the signal amplification unit, and controlling grid-connected power generation power or cutting off a power grid according to a judgment result.

[0009] Optionally, the disconnection detection unit comprises a first switch tube, a second switch tube, a first voltage stabilizing tube, a second voltage stabilizing tube, a first pull-up module and a second pull-up module, a driving end of the first switch tube is connected to a negative electrode of the first voltage stabilizing tube, a first end of the first switch tube is connected to an external power supply, a second end of the first switch tube is connected to a positive electrode of the second voltage stabilizing tube and one end of the second pull-up module, a first end of the second switch tube is grounded, a second end of the second switch tube is connected to an input end of the signal amplification unit, a positive electrode of the first voltage stabilizing tube is connected to a negative electrode of the second voltage stabilizing tube and one end of the first pull-up module, the other end of the first pull-up module is connected to the external power supply, and the other end of the second pull-up module is connected to the driving end of the second switch tube.

[0010] Optionally, the disconnection detection unit further comprises a first resistor and a second resistor, the first resistor is connected in series between the negative electrode of the first voltage stabilizing tube and the driving end of the first switch tube, and the second resistor is connected in series between the positive electrode of the first voltage stabilizing tube and the negative electrode of the second voltage stabilizing tube.

[0011] Optionally, the interface circuit of the inverter further comprises a signal isolation unit, an input end of the signal isolation unit is connected to a connection node of the first voltage dividing module and the second voltage dividing module, and an output end of the signal isolation unit is connected to an input end of the signal amplification unit.

[0012] Optionally, the signal isolation unit comprises a third resistor and an isolated linear optocoupler, the third resistor is connected in series between the connection node of the first voltage dividing module and the second voltage dividing module and an input end of the isolated linear optocoupler, and an output end of the isolated linear optocoupler is connected to the input end of the signal amplification unit.

[0013] Optionally, the signal amplification unit comprises an operational amplifier, a fourth resistor, a fifth resistor, a sixth resistor and a seventh resistor, the fourth resistor is connected in series between the positive output terminal of the isolation linear photocoupler and the non-inverting input terminal of the operational amplifier, the fifth resistor is connected in series between the negative output terminal of the isolation linear photocoupler and the inverting input terminal of the operational amplifier, the sixth resistor is connected in series between the non-inverting input terminal of the operational amplifier and the ground terminal, and the seventh resistor is connected in series between the output terminal and the inverting input terminal of the operational amplifier.

[0014] Optionally, the signal amplification unit further comprises a first capacitor and a second capacitor, the first capacitor is connected in parallel with the sixth resistor, and the second capacitor is connected in parallel with the seventh resistor.

[0015] Optionally, the first voltage division module comprises a first voltage division resistor, the second voltage division module comprises a plurality of second voltage division resistors, the plurality of second voltage division resistors are connected in series and then connected in parallel, a first parallel node is connected to the ground, a second parallel node is connected to one end of the first voltage division resistor and the input terminal of the signal isolation unit, the other end of the first voltage division resistor is connected to an external power supply, and the plurality of second voltage division resistors have different resistance values.

[0016] Optionally, the first pull-up module comprises a first pull-up resistor, one end of the first pull-up resistor is connected to an external power supply, and the other end of the first pull-up resistor is connected to one end of the broken line switch unit, the positive electrode of the first voltage stabilizing tube and the negative electrode of the second voltage stabilizing tube, the second pull-up module comprises a second pull-up resistor, one end of the second pull-up resistor is connected to the positive electrode of the second voltage stabilizing tube and the second end of the first switch tube, and the other end of the second pull-up resistor is connected to the driving end of the second switch tube.

[0017] The utility model discloses still disclose a kind of inverters, including the interface circuit of the inverter as described above.

[0018] Compared with the prior art, the interface circuit of the inverter and the inverter have the beneficial effects that the interface circuit of the inverter is used for connecting the external power grid scheduling device, the main control chip, the broken line detection unit, the voltage dividing unit and the signal amplification unit are arranged, the voltage dividing unit comprises a first voltage dividing module and a plurality of second voltage dividing modules with different resistance values, the plurality of second voltage dividing modules are in one-to-one correspondence with a plurality of power regulation switch units and are connected in series and then connected in parallel, when one power regulation switch unit is operated to be connected, the corresponding second voltage dividing module connected in series is connected to the first voltage dividing module, the voltage obtained by voltage division of the first voltage dividing module is amplified by the signal amplification unit and then transmitted to the main control chip, the main control chip judges the voltage and controls the output of corresponding grid-connected power generation power, and the power scheduling function is achieved; and the other end of the broken line switch unit is connected to the broken line detection unit, the broken line state of the external power grid scheduling device can be detected, and the input end voltage of the signal amplification unit is pulled down when the line is broken, the voltage is amplified by the signal amplification unit and then transmitted to the main control chip, and the main control chip controls the cut-off of the power grid based on the voltage input by the analog quantity input port, so that the inverter has the functions of power scheduling and broken line detection of the power grid scheduling device. BRIEF DESCRIPTION OF DRAWINGS

[0019] The technical solutions of the utility model will be further explained in detail below in combination with the drawings and embodiments, and the drawings are as follows:

[0020] Figure 1 It is the structure block diagram of the interface circuit of the inverter provided by the utility model embodiment;

[0021] Figure 2 It is the circuit principle diagram of the interface circuit of the inverter provided by the utility model embodiment.

[0022] The reference signs in the drawings are as follows:

[0023] 100, power grid scheduling device;110, broken line identification resistance;120, broken line switch unit;130, power regulation switch unit;

[0024] 200, interface circuit of inverter;

[0025] 210 (U1), main control chip;220, broken line detection unit;221, first pull-up module;222, second pull-up module;230, voltage dividing unit;231, first voltage dividing module;232, second voltage dividing module;240, signal amplification unit;250, signal isolation unit;

[0026] Q1, first switch tube; Q2, second switch tube; ZD1, first voltage stabilizer; ZD2, second voltage stabilizer; R1, first pull-up resistor; R2, second pull-up resistor; R3, first resistor; R4, second resistor; R5, third resistor; U2, isolation linear photocoupler; U3, operational amplifier; R6, fourth resistor; R7, fifth resistor; R8, sixth resistor; R9, seventh resistor; C1, first capacitor; C2, second capacitor; R10, first voltage dividing resistor. DETAILED DESCRIPTION

[0027] It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other without conflict. The preferred embodiments of the present application will be described in detail with reference to the drawings.

[0028] The interface circuit 200 of the inverter provided in the embodiments of the present application is used for connecting to the external power grid scheduling device 100, and reference Figure 1 , the power grid scheduling device 100 includes a broken line identification resistor 110, a broken line switch unit 120 and a plurality of power regulation switch units 130, the broken line identification resistor 110 is connected in parallel with the broken line switch unit 120, and one end of the broken line switch unit 120 is grounded.

[0029] The broken line identification resistor 110 is a resistor built in the power grid scheduling device 100 for identifying whether the power grid scheduling device 100 is broken, when the broken line identification resistor 110 is abnormal such as exceeding a preset value or being damaged, the power grid scheduling device 100 can perform corresponding abnormal control operation, its identification and control process is a conventional technology, which will not be described here. The user can operate the power scheduling switch unit of the power grid scheduling device 100 to regulate the grid-connected power of the inverter. The broken line switch unit 120 is operated to be connected, which indicates that the user has the demand to cut off the power grid. The number of the power regulation switch units 130 can be two or more than two, for example, the power grid scheduling device 100 is provided with four power regulation switch units 130, such as K1-K4 shown in Figure 2 .

[0030] Reference Figure 1 and Figure 2 , in the embodiments of the present application, the interface circuit 200 of the inverter includes a master control chip 210 (U1), a broken line detection unit 220, a voltage dividing unit 230 and a signal amplification unit 240.

[0031] The other end of the broken line switch unit 120 is connected to the broken line detection unit 220, and the broken line detection unit 220 is used for detecting the broken line state of the power grid scheduling device 100 and pulling down the input end voltage of the signal amplification unit 240 when the line is broken.

[0032] The voltage dividing unit 230 comprises a first voltage dividing module 231 and a plurality of second voltage dividing modules 232 with different resistance values, and the plurality of second voltage dividing modules 232 are connected in series and then connected in parallel one by one with the plurality of power regulating switch units 130, the first parallel node thereof is grounded, the second parallel node thereof is connected to one end of the first voltage dividing module 231 and the input end of the signal amplification unit 240, and the other end of the first voltage dividing module 231 is connected to the external power supply.

[0033] The analog input port of the main control chip 210 (U1) is connected to the output end of the signal amplification unit 240, and the main control chip 210 (U1) is used to judge the voltage output by the signal amplification unit 240 and control the grid-connected power generation power or cut off the power grid according to the judgment result.

[0034] The interface circuit 200 of the inverter of the embodiment of the application comprises the main control chip 210 (U1), the disconnection detection unit 220, the voltage dividing unit 230 and the signal amplification unit 240, the voltage dividing unit 230 comprises the first voltage dividing module 231 and the plurality of second voltage dividing modules 232 with different resistance values, the plurality of second voltage dividing modules 232 are connected in series and then connected in parallel one by one with the plurality of power regulating switch units 130, when one of the power regulating switch units 130 is turned on, the corresponding second voltage dividing module 232 connected in series is connected to the first voltage dividing module 231, the voltage obtained by the first voltage dividing module 231 is amplified by the signal amplification unit 240 and then transmitted to the main control chip 210 (U1), the main control chip 210 (U1) judges the voltage and controls the output of the corresponding grid-connected power generation power, thereby having the power scheduling function; and the disconnection detection unit 220 is connected to the other end of the disconnection switch unit 120, can detect the disconnection state of the external power grid scheduling device 100 and pull down the voltage at the input end of the signal amplification unit 240 when the disconnection is detected, the voltage is amplified by the signal amplification unit 240 and then transmitted to the main control chip 210 (U1), the main control chip 210 (U1) controls the cut-off of the power grid based on the voltage input by the analog input port, therefore, the inverter of the application can have the functions of power scheduling and disconnection detection of the power grid scheduling device 100.

[0035] The main control chip 210 (U1) in the application only needs to use one analog input port to realize power scheduling, disconnection detection of the power grid scheduling device 100 and forced cut-off of the power grid, thereby saving the analog input port resources of the main control chip 210 (U1).

[0036] The main control chip 210 (U1) is provided with a plurality of different voltage values, the main control chip 210 (U1) judges the voltage output by the signal amplification unit 240, and according to the corresponding voltage value, corresponding grid-connected power generation control is performed, such as cutting off the power grid, and different gears of grid-connected power generation power are output. The main control chip 210 (U1) can use an existing chip, which is provided with a plurality of different voltage values and control logic corresponding to the voltage values, and the software program assisting the operation of the main control chip is a replicable software program. The improvement point of the present application is the hardware circuit structure of the interface circuit of the inverter.

[0037] Reference Figure 1 And Figure 2 In the optional embodiment of the present application, the disconnection detection unit 220 includes a first switch tube Q1, a second switch tube Q2, a first voltage stabilizing tube ZD1, a second voltage stabilizing tube ZD2, a first pull-up module 221 and a second pull-up module 222. The driving end of the first switch tube Q1 is connected to the negative electrode of the first voltage stabilizing tube ZD1, the first end of the first switch tube Q1 is connected to an external power supply, the second end of the first switch tube Q1 is connected to the positive electrode of the second voltage stabilizing tube ZD2 and one end of the second pull-up module 222, the first end of the second switch tube Q2 is grounded, the second end of the second switch tube Q2 is connected to the input end of the signal amplification unit 240, the positive electrode of the first voltage stabilizing tube ZD1 is connected to the negative electrode of the second voltage stabilizing tube ZD2 and one end of the first pull-up module 221, the other end of the first pull-up module 221 is connected to an external power supply, and the other end of the second pull-up module 222 is connected to the driving end of the second switch tube Q2.

[0038] By setting the first switch tube Q1, the second switch tube Q2, the first voltage stabilizing tube ZD1, the second voltage stabilizing tube ZD2, the first pull-up module 221 and the second pull-up module 222, when the power grid dispatching device 100 is disconnected or the resistance value of the disconnection identification resistor 110 is greater than the preset value, Figure 2 The REF_GEN point voltage is pulled up by the first pull-up module 221 and the external power supply. If the REF_GEN point voltage exceeds the sum of the breakdown voltage of the second voltage stabilizing tube ZD2 and the junction voltage of the second switch tube Q2, the second switch tube Q2 is turned on, the input end voltage of the signal amplification unit 240 is pulled down to zero volts, and the main control chip 210 (U1) controls the inverter to disconnect the power grid.

[0039] When the disconnection switch unit 120 is operated to be turned on, the REF_GEN point voltage in the figure is pulled to zero volts, which is less than the sum of the breakdown voltage of the first voltage stabilizing tube ZD1 and the junction voltage of the first switch tube Q1, and the first switch tube Q1 is turned on. The driving end of the second switch tube Q2 is pulled up by the second pull-up module 222, so that the second switch tube Q2 is also turned on, the input end voltage of the signal amplification unit 240 is pulled down to zero volts, and the main control chip 210 (U1) controls the inverter to disconnect the power grid.

[0040] When the grid scheduling device 100 is not connected, Figure 2 The REF_GEN point voltage is pulled up by the first pull-up module 221 and the external power supply. If the REF_GEN point voltage exceeds the sum of the breakdown voltage of the second Zener diode ZD2 and the junction voltage of the second switch tube Q2, the second switch tube Q2 is turned on, the input voltage of the signal amplification unit 240 is pulled down to zero volts, and the main control chip 210 (U1) controls the inverter to disconnect the grid.

[0041] When the resistance value of the disconnection identification resistor 110 is normal and the disconnection switch unit 120 is in the disconnected state, the REF_GEN point voltage does not exceed the sum of the breakdown voltage of the second Zener diode ZD2 and the junction voltage of the second switch tube Q2, and the first switch tube Q1 and the second switch tube Q2 are both in the cut-off state, the input voltage of the signal amplification unit 240 will not be pulled down, and the main control chip 210 (U1) will not control the grid to be disconnected.

[0042] The application realizes the disconnection detection of the grid scheduling device 100 with a relatively simple circuit structure, which is beneficial to reducing the volume occupied by the circuit, facilitating the miniaturization of the inverter, and lowering the cost.

[0043] Optionally, the first switch tube Q1 is an NPN transistor, the base of the NPN transistor is used as the driving end of the first switch tube Q1, the emitter is used as the first end of the first switch tube Q1, and the collector is used as the second end of the first switch tube Q1. Alternatively, the first switch tube Q1 is a PMOS tube, the gate of the PMOS tube is used as the driving end of the first switch tube Q1, the source is used as the first end of the first switch tube Q1, and the drain is used as the second end of the first switch tube Q1.

[0044] The second switch tube Q2 is an NPN transistor, the base of the NPN transistor is used as the driving end of the second switch tube Q2, the emitter is used as the first end of the second switch tube Q2, and the collector is used as the second end of the second switch tube Q2. Alternatively, the second switch tube Q2 is an NMOS tube, the gate of the NMOS tube is used as the driving end of the second switch tube Q2, the source is used as the first end of the second switch tube Q2, and the drain is used as the second end of the second switch tube Q2.

[0045] Optionally, the first pull-up module 221 includes a first pull-up resistor R1, one end of the first pull-up resistor R1 is connected to an external power supply, the other end is connected to one end of the disconnection switch unit 120, the positive electrode of the first Zener diode ZD1, and the negative electrode of the second Zener diode ZD2, and the second pull-up module 222 includes a second pull-up resistor R2, one end of the second pull-up resistor R2 is connected to the positive electrode of the second Zener diode ZD2 and the second end of the first switch tube Q1, and the other end is connected to the driving end of the second switch tube Q2.

[0046] In the case that the disconnection switch unit 120 is disconnected or the resistance value of the disconnection identification resistor 110 is greater than the preset value, the first pull-up resistor R1 and the external power supply can pull up the voltage of the REF_GEN point, and then turn on the second switch tube Q2. The second pull-up resistor R2 can pull up the voltage of the driving end of the second switch tube Q2 when the first switch tube Q1 is turned on, turn on the second switch tube Q2, and then pull down the input voltage of the signal amplification unit 240. The first pull-up resistor R1 is used as the first pull-up module 221, and the second pull-up resistor R2 is used as the second pull-up module 222, so that the circuit structure is simple, the circuit is simplified, and the cost is low.

[0047] In other embodiments, the first pull-up module 221 and the second pull-up module 222 can each use two or more resistors in series or parallel to achieve voltage pull-up.

[0048] Reference Figure 1 and Figure 2 In the optional embodiments of the present application, the disconnection detection unit 220 further includes a first resistor R3 and a second resistor R4. The first resistor R3 is connected in series between the negative electrode of the first voltage stabilizing tube ZD1 and the driving end of the first switch tube Q1, and the second resistor R4 is connected in series between the positive electrode of the first voltage stabilizing tube ZD1 and the negative electrode of the second voltage stabilizing tube ZD2.

[0049] The first resistor R3 functions to limit current, avoiding excessive current from damaging the first switch tube Q1 and ensuring stable operation of the circuit. The second resistor R4 also functions to limit current, avoiding excessive current from damaging the second switch tube Q2 and ensuring stable operation of the circuit.

[0050] Reference Figure 1 and Figure 2 In the optional embodiments of the present application, the interface circuit 200 of the inverter further includes a signal isolation unit 250. The input end of the signal isolation unit 250 is connected to the connection node of the first voltage division module 231 and the second voltage division module 232, and the output end is connected to the input end of the signal amplification unit 240.

[0051] By providing the signal isolation unit 250, electrical isolation can be provided, which functions to isolate external signals from the internal power supply of the inverter, isolate the interference of external signals on the internal circuit of the inverter, and improve the stability and reliability of circuit operation.

[0052] Optionally, the signal isolation unit 250 includes a third resistor R5 and an isolation linear optocoupler U2. The third resistor R5 is connected in series between the connection node of the first voltage division module 231 and the second voltage division module 232 and the input end of the isolation linear optocoupler U2. The output end of the isolation linear optocoupler U2 is connected to the input end of the signal amplification unit 240.

[0053] The isolation linear optocoupler U2 is an electronic component used to isolate the signal transmission between two circuits. It is usually composed of a light-emitting diode and a photosensitive diode, and the signal transmission between the two is through an optical path. When the electrical signal at the input end acts on the light-emitting diode, the light-emitting diode will emit a light signal, which will be received by the photosensitive diode and converted into an electrical signal output to another circuit. The isolation linear optocoupler U2 specifically adopts a 1:1 transmission isolation linear optocoupler U2.

[0054] The third resistor R5 can function as a current limiter to prevent excessive current from damaging the isolation linear optocoupler U2.

[0055] By setting the third resistor R5 and the isolation linear optocoupler U2, the external signal is isolated from the internal power supply with a relatively simple circuit structure, reducing the volume occupied by the circuit, which is beneficial to the miniaturization of the inverter.

[0056] Reference Figure 1 and Figure 2 In the optional embodiment of the present application, the signal amplification unit 240 includes an operational amplifier U3, a fourth resistor R6, a fifth resistor R7, a sixth resistor R8, and a seventh resistor R9. The fourth resistor R6 is connected in series between the positive output terminal of the isolation linear optocoupler U2 and the positive input terminal of the operational amplifier U3. The fifth resistor R7 is connected in series between the negative output terminal of the isolation linear optocoupler U2 and the negative input terminal of the operational amplifier U3. The sixth resistor R8 is connected in series between the positive input terminal of the operational amplifier U3 and the ground terminal. The seventh resistor R9 is connected in series between the output terminal and the negative input terminal of the operational amplifier U3.

[0057] By setting the operational amplifier U3, the fourth resistor R6, the fifth resistor R7, the sixth resistor R8, and the seventh resistor R9, a differential operational amplifier circuit is formed, which can amplify the differential part of the input signal, i.e., the difference between the two input signals, while suppressing the common mode part, i.e., the common part of the two input signals, which helps to improve the anti-interference ability of the signal.

[0058] Optionally, the signal amplification unit 240 further includes a first capacitor C1 and a second capacitor C2. The first capacitor C1 is connected in parallel with the sixth resistor R8, and the second capacitor C2 is connected in parallel with the seventh resistor R9.

[0059] By connecting the first capacitor C1 in parallel with the sixth resistor R8 and the second capacitor C2 in parallel with the seventh resistor R9, the bandwidth and the attenuation factor of the input signal can be improved.

[0060] Reference Figure 1 and Figure 2In the optional embodiment of the present application, the first voltage division module 231 includes a first voltage division resistor R10, the second voltage division module 232 includes a plurality of second voltage division resistors, the plurality of second voltage division resistors are connected in series and then connected in parallel one by one, the first parallel node is grounded, the second parallel node is connected to one end of the first voltage division resistor R10 and the input end of the signal isolation unit 250, the other end of the first voltage division resistor R10 is connected to an external power supply, and the plurality of second voltage division resistors have different resistance values.

[0061] The first voltage division resistor R10 is used as the first voltage division module 231, and the second voltage division resistor is used as the second voltage division module 232. When a certain power regulation switch unit 130 is closed, the corresponding second voltage division resistor connected in series is connected in series with the first voltage division resistor R10, and the series node is connected to the input end of the signal isolation unit 250. Since the resistance values of the second voltage division resistors connected in series by each power regulation unit are different, when the user performs power regulation, the corresponding voltage points input to the input end of the signal isolation unit 250 are different when each power regulation unit is switched on. The main control chip 210 (U1) can control the output of the corresponding grid-connected power according to the different voltage points, thereby realizing power regulation. For example, as shown in Figure 2 , four power regulation units are set, four second voltage division resistors R111, R112, R113, and R114 are set correspondingly, and the broken-line switch unit 120 is K0 as shown in Figure 2 . When K0 is closed, the voltage input to the input end of the signal isolation unit 250 is 0; when K1 is closed, the voltage input to the input end of the signal isolation unit 250 is defined as V1; when K2 is closed, the voltage input to the input end of the signal isolation unit 250 is defined as V2; when K3 is closed, the voltage input to the input end of the signal isolation unit 250 is defined as V3; and when K4 is closed, the voltage input to the input end of the signal isolation unit 250 is defined as V4. The control logic of the main control chip 210 (U1) corresponding to the four voltage points can be: when the input voltage is 0, the inverter is controlled to be disconnected from the grid; when the input voltage is V1, the inverter is controlled to not output power; when the input voltage is V2, the grid-connected power output by the inverter is controlled to be not more than 25%; when the input voltage is V3, the grid-connected power output by the inverter is controlled to be not more than 75%; and when the input voltage is V4, the inverter outputs the maximum grid-connected power.

[0062] The first voltage division resistor R10 is used as the first voltage division module 231, and the second voltage division resistor is used as the second voltage division module 232. The circuit structure of the entire voltage division unit 230 is relatively simple, and the cost is relatively low. In other embodiments, the first voltage division module 231 and the second voltage division module 232 can also be composed of a plurality of resistors connected in series or in parallel.

[0063] The embodiment of the application also provides an inverter.

[0064] The interface circuit in the inverter of the embodiment of the application is provided with the master control chip 210 (U1), the disconnection detection unit 220, the voltage dividing unit 230 and the signal amplification unit 240, the voltage dividing unit 230 includes the first voltage dividing module 231 and a plurality of second voltage dividing modules 232 with different resistance values, the plurality of second voltage dividing modules 232 are connected in series and then connected in parallel one by one with the plurality of power regulating switch units 130, when one power regulating switch unit 130 is operated to be turned on, the corresponding second voltage dividing module 232 connected in series is connected to the first voltage dividing module 231, the voltage divided by the first voltage dividing module 231 is amplified by the signal amplification unit 240 and then transmitted to the master control chip 210 (U1), the master control chip 210 (U1) judges the voltage and controls the output of the corresponding grid-connected power generation power, so that the power scheduling function is achieved; and the disconnection detection unit 220 is connected to the other end of the disconnection switch unit 120, can detect the disconnection state of the external grid scheduling device 100 and pull down the input end voltage of the signal amplification unit 240 when the disconnection is detected, the voltage is amplified by the signal amplification unit 240 and then transmitted to the master control chip 210 (U1), the master control chip 210 (U1) controls the cut-off of the grid based on the voltage input by the analog quantity input port, therefore, the inverter can simultaneously achieve the functions of power scheduling and disconnection detection of the grid scheduling device 100.

[0065] It should be understood that the above embodiments are only used to illustrate the technical solutions of the application, rather than limit them, and the technical solutions recorded in the above embodiments can be modified by those skilled in the art, or some technical features can be replaced by equivalents; all these modifications and replacements should belong to the protection scope of the claims of the application.

Claims

1. An interface circuit for an inverter, characterized by The application relates to an interface circuit of an inverter for accessing an external power grid dispatching device, wherein the power grid dispatching device comprises a disconnection identification resistor, a disconnection switch unit and a plurality of power regulation switch units; one end of the disconnection switch unit is grounded; the interface circuit of the inverter comprises a master control chip, a disconnection detection unit, a voltage division unit and a signal amplification unit; the disconnection detection unit is connected to the other end of the disconnection switch unit and is used for detecting the disconnection state of the power grid dispatching device and pulling down the input voltage of the signal amplification unit when disconnection occurs; the voltage division unit comprises a first voltage division module and a plurality of second voltage division modules with different resistance values; the plurality of second voltage division modules are connected in series and then connected in parallel with the plurality of power regulation switch units one by one; the first parallel node is grounded; the second parallel node is connected to one end of the first voltage division module and the input end of the signal amplification unit; the other end of the first voltage division module is connected to an external power supply; the analog input port of the master control chip is connected to the output end of the signal amplification unit; the master control chip is used for judging the voltage output by the signal amplification unit and controlling the grid-connected power generation power or cutting off the power grid according to the judgment result. The disconnection detection unit comprises a first switch tube, a second switch tube, a first voltage stabilizing tube, a second voltage stabilizing tube, a first pull-up module and a second pull-up module; the driving end of the first switch tube is connected to the negative electrode of the first voltage stabilizing tube; the first end of the first switch tube is connected to an external power supply; the second end of the first switch tube is connected to the positive electrode of the second voltage stabilizing tube and one end of the second pull-up module; the first end of the second switch tube is grounded; the second end of the second switch tube is connected to the input end of the signal amplification unit; the positive electrode of the first voltage stabilizing tube is connected to the negative electrode of the second voltage stabilizing tube and one end of the first pull-up module; the other end of the first pull-up module is connected to an external power supply; the other end of the second pull-up module is connected to the driving end of the second switch tube. The disconnection detection unit further comprises a first resistor and a second resistor; the first resistor is connected in series between the negative electrode of the first voltage stabilizing tube and the driving end of the first switch tube; and the second resistor is connected in series between the positive electrode of the first voltage stabilizing tube and the negative electrode of the second voltage stabilizing tube. The interface circuit of the inverter further comprises a signal isolation unit; the input end of the signal isolation unit is connected to the connection node of the first voltage division module and the second voltage division module; and the output end of the signal isolation unit is connected to the input end of the signal amplification unit.

2. The interface circuit of an inverter according to claim 1, wherein, The signal isolation unit comprises a third resistor and an isolated linear optocoupler; the third resistor is connected in series between the connection node of the first voltage division module and the second voltage division module and the input end of the isolated linear optocoupler; and the output end of the isolated linear optocoupler is connected to the input end of the signal amplification unit.

3. The interface circuit of an inverter according to claim 2, wherein, ​ 4. The interface circuit of an inverter according to any one of claims 1 to 3, characterized in that, ​ 5. The interface circuit of the inverter according to claim 4, characterized in that, ​ 6. The interface circuit of the inverter according to claim 5, wherein, The signal amplification unit comprises an operational amplifier, a fourth resistor, a fifth resistor, a sixth resistor and a seventh resistor, the fourth resistor is connected in series between the positive output terminal of the isolation linear photocoupler and the non-inverting input terminal of the operational amplifier, the fifth resistor is connected in series between the negative output terminal of the isolation linear photocoupler and the inverting input terminal of the operational amplifier, the sixth resistor is connected in series between the non-inverting input terminal of the operational amplifier and the ground terminal, and the seventh resistor is connected in series between the output terminal and the inverting input terminal of the operational amplifier.

7. The interface circuit of the inverter according to claim 6, characterized by The signal amplification unit further comprises a first capacitor and a second capacitor, the first capacitor is connected in parallel with the sixth resistor, and the second capacitor is connected in parallel with the seventh resistor.

8. The interface circuit of the inverter according to claim 4, wherein, The first voltage division module comprises a first voltage division resistor, the second voltage division module comprises a plurality of second voltage division resistors, the plurality of second voltage division resistors are connected in series and then connected in parallel, a first parallel node is connected to the ground, a second parallel node is connected to one end of the first voltage division resistor and the input terminal of the signal isolation unit, the other end of the first voltage division resistor is connected to an external power supply, and the plurality of second voltage division resistors have different resistance values.

9. The interface circuit of an inverter according to claim 2, wherein, The first pull-up module comprises a first pull-up resistor, one end of the first pull-up resistor is connected to an external power supply, and the other end of the first pull-up resistor is connected to one end of the broken line switch unit, the positive electrode of the first voltage stabilizing tube and the negative electrode of the second voltage stabilizing tube, the second pull-up module comprises a second pull-up resistor, one end of the second pull-up resistor is connected to the positive electrode of the second voltage stabilizing tube and the second end of the first switch tube, and the other end of the second pull-up resistor is connected to the driving end of the second switch tube.

10. An inverter, characterized by comprising: An interface circuit comprising an inverter as claimed in any one of claims 1 to 9.

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