Opposite substrate, display panel and display device

Abstract

The embodiment of the utility model discloses an opposite substrate, a display panel and a display device. The opposite substrate comprises a first substrate, and a plurality of pixel areas arranged in an array are arranged on the first substrate. The first common electrode is arranged on the first substrate and comprises a plurality of first domain areas corresponding to each pixel area, the first common electrode comprises a plurality of first slits in each first domain area, and the extension directions of the first slits in the adjacent first domain areas are different. The corresponding common electrode in each first domain region in the opposite substrate is provided with the first slit, so that the reflectivity of the first common electrode to incident ambient light is effectively reduced.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to opposing substrates, display panels and display devices. Background Technology

[0002] Display panels are widely used in various types of electronic devices for image display, such as liquid crystal displays (LCDs). An LCD panel includes an array substrate and a counter substrate, and a layer of liquid crystal molecules sandwiched between them. Pixel electrodes and a common electrode are disposed on the inner sides of the array substrate and the counter substrate. The electric field between the pixel electrodes and the common electrode drives the liquid crystal molecules to rotate, thereby emitting light from the backlight module for image display. Because the pixel electrodes and the common electrode are made of indium tin oxide (ITO) or metal, ambient light is reflected after entering the display panel, thus affecting the user's visual experience. Therefore, reducing the reflection of ambient light by LCD panels and improving the user's visual experience has become an urgent problem to be solved. Utility Model Content

[0003] In view of the shortcomings of the prior art, this application provides a counter substrate with low reflectivity, and a display panel and display device including the counter substrate.

[0004] In a first aspect, this application provides a counter substrate, including a first substrate and a first common electrode. The first substrate includes a plurality of pixel regions arranged in an array. The first common electrode is disposed on the first substrate, and for each pixel region includes a plurality of first domain regions. Within each first domain region, the first common electrode includes a plurality of first slits, and the extension directions of the first slits in adjacent first domain regions are different.

[0005] In one embodiment of this application, the first common electrode between two adjacent first domain regions further includes a first trunk electrode, the first common electrode within the first domain region includes a plurality of first branch electrodes, the first branch electrodes are connected to the first trunk electrode, and the first slit is included between two adjacent first branch electrodes.

[0006] In one embodiment of this application, the opposing substrate further includes a first polarizer, which is disposed on the side of the first substrate away from the first common electrode.

[0007] In one embodiment of this application, a light-shielding layer is provided on the surface of the first substrate adjacent to the first common electrode and at a position corresponding to the interval between two adjacent pixel regions.

[0008] In one embodiment of this application, the opposing substrate further includes a filter layer, which is located on the side of the first common electrode away from the first substrate. The filter layer is disposed corresponding to the pixel area and is used to filter out light of different colors.

[0009] Secondly, in this application embodiment, a display panel is provided, including the aforementioned opposing substrate, array substrate, and display medium layer, wherein the array substrate, display medium layer, and opposing substrate are stacked sequentially. The array substrate includes a second substrate, which includes a plurality of pixel regions arranged in an array. Each pixel region includes a pixel electrode, and the pixel electrode includes a plurality of second domain regions. The first domain regions and the second domain regions are disposed opposite each other. The pixel electrode and the first common electrode are used to form an electric field to drive the display medium layer to perform image display.

[0010] In one embodiment of this application, the pixel electrode is formed with a plurality of second slits, and the extension directions of the second slits in two adjacent second domain regions are different.

[0011] In one embodiment of this application, the pixel electrode between two adjacent second domain regions further includes a second main electrode, the pixel electrode within the second domain region includes a plurality of second branch electrodes, the second branch electrodes are connected to the second main electrode, and a second slit is included between two adjacent second branch electrodes.

[0012] In one embodiment of this application, a first branch electrode and a second branch electrode are disposed opposite to each other, and the projection of the first branch electrode along the positive direction onto the array substrate overlaps with the second branch electrode; a first slit and a second slit are disposed opposite to each other, and the projection of the first slit along the positive direction onto the array substrate overlaps with the second slit.

[0013] Thirdly, embodiments of this application provide a display device including the aforementioned display panel. Additionally, the display device may further include a power module, wherein the power module is used to provide driving power for image display on the display panel.

[0014] Compared to the problems of the prior art, in this embodiment, each common electrode in the first domain region of the opposing substrate has a first slit, thereby reducing the area occupied by the first common electrode, thus effectively reducing the reflectivity of the first common electrode to incident ambient light, and also effectively reducing the resistance of the first common electrode.

[0015] Furthermore, in this embodiment, after the opposing substrate and the array substrate are combined, the slits of the pixel electrode and the common electrode are arranged facing each other, and each has a different extension risk. The pixel electrode, in cooperation with the first common electrode, generates an inclined electric field to induce the liquid crystal molecules in different electrode regions to rotate in different directions, thereby realizing multi-domain display. This makes the effect seen from each direction tend to be average and consistent. At the same time, since the display angle in each domain is different, a wide viewing angle range can be achieved. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0017] Figure 1 A schematic diagram of the structure of a display device provided in this application;

[0018] Figure 2 for Figure 1 A schematic diagram of the side structure of the central display panel;

[0019] Figure 3 for Figure 2 The diagram shows the planar layout structure of the display panel.

[0020] Figure 4 for Figure 3 A schematic diagram of the side structure of any pixel unit shown.

[0021] Figure 5 for Figure 4 The diagram shows the electrode layout of the pixel unit.

[0022] Figure 6 For Figure 4 The equivalent circuit diagram of any pixel unit shown is shown.

[0023] Figure 7 For example Figure 4 The diagram shows a planar structure of a pixel electrode in a pixel unit.

[0024] Figure 8 For example Figure 4 The diagram shows a planar structure corresponding to the first common electrode in a pixel unit.

[0025] Explanation of reference numerals in the attached figures:

[0026] Display device-100, display panel-10, display area-10a, non-display area-10b, pixel unit-P, backlight module-10f, array substrate-10c, display dielectric layer-10e, opposing substrate-10d, first direction-F1, second direction-F2, data lines-D1~Dm, data lines-Di, scan lines-G1~Gn, first display capacitor-Cr1, second display capacitor-Cr2, storage capacitor-Cc, first common voltage-CF-COM, second common voltage-AF-COM, transistor-T, timing control circuit-11, data drive module-12, scan drive circuit-13, data drive circuit-200, etc. Output terminal - DBi, Data signal - Data, Main pixel area - PM, Sub-pixel area - PS, First domain area - D1, Second domain area - D2, First substrate - 101, First common electrode - 102, First main electrode - 1021, First branch electrode - 1022, First slit - PS1, Filter layer - 103, First polarizer - 104, Second substrate - 201, Second polarizer - 202, Pixel electrode - 203, Second common electrode - 204, Pixel electrode - 203, Main pixel electrode - Pe1, Sub-pixel electrode - Pe2, Second main electrode - 2031, Second branch electrode - 2032, Second slit - PS2. Detailed Implementation

[0027] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the disclosure of this application.

[0028] The following descriptions of the embodiments are based on the accompanying illustrations and are used to illustrate specific embodiments in which this application can be implemented. The component designations used herein, such as "first," "second," etc., are merely for distinguishing the described objects and do not have any sequential or technical meaning. Unless otherwise specified, the terms "connection" and "linkage" used in this application include both direct and indirect connections (linkages). Directional terms used in this application, such as "up," "down," "front," "rear," "left," "right," "inner," "outer," "side," etc., are merely for reference to the accompanying drawings. Therefore, the use of directional terms is for better and clearer explanation and understanding of this application, and does not indicate or imply that the referred device or element must have a specific orientation, or be constructed and operated in a specific orientation; therefore, they should not be construed as limitations on this application.

[0029] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal communication between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances. It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this application are used to distinguish different objects, not to describe a specific order.

[0030] Furthermore, the terms "comprising," "may include," "include," or "may include" used in this application indicate the presence of the corresponding functions, operations, elements, etc., disclosed, but do not limit the inclusion of one or more other functions, operations, elements, etc. Additionally, the terms "comprising" or "include" indicate the presence of the corresponding features, numbers, steps, operations, elements, components, or combinations thereof disclosed in the specification, but do not exclude the presence or addition of one or more other features, numbers, steps, operations, elements, components, or combinations thereof, and are intended to cover non-exclusive inclusion. Furthermore, when describing embodiments of this application, "may" is used to mean "one or more embodiments of this application." And the term "exemplary" is intended to refer to examples or illustrations.

[0031] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.

[0032] Please see Figure 1 , Figure 1 This is a schematic diagram of a display device provided in this application. The display device 100 includes a display panel 10 and a power module (not shown). The display panel 10 and the power module are fixed in a support frame (not shown). The power module is located on the back of the display panel 10, which is the non-display surface of the display panel 10. The power module provides power voltage for the display panel 10 to display images, and the support frame provides fixation and protection for the display panel 10 and the power module 20.

[0033] It is understood that the display device 100 also includes other functional modules, such as data ports, motherboards, speakers, and heat dissipation modules, to cooperate with the display panel 10 to perform image display and facilitate user operation. These will not be described in detail in this embodiment.

[0034] Please see Figure 2 , Figure 2 for Figure 1A schematic diagram of the side structure of the display panel, as shown below. Figure 2 As shown, the display panel 10 includes an array substrate 10c and a counter substrate 10d, and a display medium layer 10e sandwiched between the array substrate 10c and the counter substrate 10d. Driving elements are disposed on the array substrate 10c and the counter substrate 10d to generate corresponding electric fields according to data signals, thereby driving the display medium layer 10e to emit light of corresponding brightness to perform image display. It can be understood that the surface of the counter substrate 10d away from the array substrate 10c is the image display surface, which is the side of the display panel 10 facing the user, while the side of the array substrate 10c is the non-image display side of the display panel 10, which is the side of the display panel 10 away from the user.

[0035] Taking a liquid crystal display panel (LCD) as an example, the display panel 10 may also include a backlight module 10f (BM). The backlight module 10f is used to provide light for display to the display area (not shown) of the display panel 10. The display panel 10 emits corresponding light according to the image signal to be displayed to perform image display. The non-display area (not shown) is located around the display area and is used to set the functional circuits that drive the pixel units in the display area.

[0036] Specifically, the opposing substrate 10d includes a first substrate 101, a first common electrode 102, a filter layer 103, and a first polarizer 104. The first polarizer 104 is disposed on the side surface of the first substrate 101 away from the array substrate 10c, the first common electrode 102 and the filter layer 103 are sequentially disposed on the side surface of the first substrate 101 adjacent to the array substrate 10c, and the light-shielding layer 105 is partially disposed between the first common electrode 102 and the first substrate 101.

[0037] The array substrate 10c includes a second substrate 201, a second polarizer 202, a pixel electrode 203, and a second common electrode 204 stacked together. The second polarizer 202 is disposed on the surface of the second substrate 201 away from the opposing substrate 10d, the pixel electrode 203 is disposed on a portion of the surface of the second substrate 201 adjacent to the opposing substrate 10d, and the second common electrode 204 is stacked with a data line on the surface of the second substrate 201 adjacent to the opposing substrate 10d.

[0038] In this embodiment, the first substrate 101 and the second substrate 201 can be transparent glass. The first common electrode 102, the second common electrode 204, and the pixel electrode 203 can be transparent indium tin oxide (ITO). In this embodiment, the second common electrode 204 is spaced at a predetermined distance rather than being a single layer; in other words, the second common electrode 204 is positioned corresponding to non-pixel units. In this embodiment, the first common electrode 102 and the pixel electrode 203 are directly opposite each other, and the first common electrode 102 and the pixel electrode 203 have the same pattern shape to reduce the reflectivity of the image display opening area to incident ambient light.

[0039] The first polarizer 104 and the second polarizer 202 are used to polarize the incident light, allowing some light with a preset polarization angle to pass through, thereby filtering out some light.

[0040] The filter layer 103 is a colored photoresist used to filter out different colors of light, so that the light emitted by the display panel 10 as a whole is colored light. In this embodiment, the filter layer 103 includes red photoresist, green photoresist, and blue photoresist for the location of the pixel unit, thereby enabling the display panel 10 to emit colored light and display colored images. In this embodiment, the opposing substrate 10d also includes a light-shielding layer (not shown), which is disposed on the same layer as the filter layer 103. It is disposed between the photoresist and is used to block ambient light entering from the opposing substrate 10d and the backlight module 10f from the non-pixel area, preventing ambient light from being reflected due to incident on the layer structure, such as light incident on the second common electrode 204, and preventing light from being mixed by adjacent pixel units.

[0041] It should be noted that the display medium in the display medium layer 10e can be liquid crystal, wherein the liquid crystal can be vertically aligned (VA). By controlling the electric field formed between the pixel electrode 203 and the first common electrode 102, the liquid crystal molecules rotate at a preset angle to perform image display.

[0042] Please see Figure 3 , Figure 3 for Figure 2 The diagram shows the planar layout structure of the display panel 10.

[0043] like Figure 3 As shown, the display area 10a of the display panel 10 includes multiple m*n pixel units P arranged in a matrix, m data lines D1 to Dm, and n scan lines G1 to Gn, where m and n are natural numbers greater than 1. It should be noted that the location of each pixel unit P is defined as a pixel area. Correspondingly, the opposing substrate 10d and the array substrate 10c included in the display panel 10 correspond to the pixel units P comprising multiple arrayed pixel areas.

[0044] Among them, the n scan lines G1 to Gn extend along the first direction F1 and are mutually insulated and arranged in parallel along the second direction F2, and the m data lines D1 to Dm extend along the second direction F2 and are mutually insulated and arranged in parallel along the first direction F1, with the first direction F1 and the second direction F2 being perpendicular to each other.

[0045] Corresponding to the non-display area 10b of the display panel 10, the display device 100 further includes a timing control circuit 11 for driving the pixel unit P to display images, a data driving module 12, and a scan driving circuit 13 disposed in the display panel 10.

[0046] The timing control circuit 11 is electrically connected to the data driving module 12 and the scan driving circuit 13. It is used to receive RGB encoded image data signals from the outside and output corresponding clock signals, synchronization signals and decoded data signals (Data) to the data driving module 12 and the scan driving circuit 13 respectively to control their working timing. Specifically, the timing control circuit 11 outputs corresponding timing control signals to the data driving module 12 and the scan driving circuit 13 to control when the scan driving circuit 13 outputs the corresponding scan signal and when the data driving module 12 outputs the corresponding data signal (Data).

[0047] The data driving module 12 is electrically connected to the m data lines D1 to Dm, and is used to transmit the data signal (Data) to be displayed to multiple pixel units P in the form of data voltage corresponding to the analog data signal through the m data lines D1 to Dm.

[0048] The scan drive circuit 13 is electrically connected to the n scan lines G1 to Gn, and is used to output scan signals to the pixel unit P through the n scan lines G1 to Gn to control when the pixel unit P receives the data signal Data. Specifically, the scan drive circuit 13 outputs scan signals sequentially from the n scan lines G1 to Gn arranged in positional order, according to the temporally consecutive scan periods Gt1, Gt2, ..., Gtn within each frame of image display time, from the scan lines G1, G2, ..., Gn.

[0049] Please refer to the following: Figures 4-5 , Figure 4 for Figure 3 The diagram shows the side view of any pixel unit P. Figure 5 for Figure 4The diagram shows the electrode layout of pixel unit P. Pixel unit P includes a main pixel region PM and a secondary pixel region PS. The main pixel region PM includes the main pixel electrode Pe1 in pixel electrode 203, and the secondary pixel region PS includes the secondary pixel electrode Pe2 in pixel electrode 203. In other words, for a pixel unit P, pixel electrode 203 includes a main pixel electrode Pe1 and a secondary pixel electrode Pe2, with the main pixel electrode Pe1 located within the main pixel region PM and the secondary pixel region PS located within the secondary pixel region PS. Simultaneously, the main pixel electrode Pe1 and the secondary pixel electrode Pe2 are positioned directly opposite the first common electrode 102.

[0050] Please continue reading. Figure 6 , Figure 6 for Figure 4 The diagram shows the equivalent circuit diagram for any pixel unit P. Figure 6 As shown, the pixel unit P includes a transistor T, a first display capacitor Cr1, a first display capacitor Cr2, and a storage capacitor Cc. The gate of transistor T is connected to the i-th scan line Gi, used to control whether transistor T is turned on or off. The source of transistor T is connected to the i-th data line Di, and the drain of transistor T is connected to the main pixel electrode - Pe1 and the secondary pixel electrode - Pe2 in pixel electrode 203, so that under the control of the i-th scan line Gi, transistor T receives data signals from the i-th data line Di and transmits them to the pixel electrode IT.

[0051] In this embodiment, the first display capacitors Cr1 and Cr2 and the storage capacitor Cc are connected in parallel. The storage capacitor Cc is used to maintain the electric field between the first display capacitors Cr1 and Cr2 between the pixel electrode IT and the common electrode before the next data signal is loaded. It can be understood that the first display capacitors Cr1 and Cr2 are respectively composed of the main pixel electrode-Pe1 and the secondary pixel electrode-Pe2 in the pixel electrode 203, the liquid crystal molecules as the display medium layer 10e, and the first common electrode 102. The storage capacitor Cc is composed of the pixel electrode 203, the liquid crystal molecules or the insulating material layer, and the second common electrode 204. The first common electrode 102 is used to provide a first common voltage CF-COM to the pixel unit P, and the second common electrode 204 is used to provide a second common voltage AF-COM to the pixel unit P.

[0052] In this embodiment, each pixel unit P controls the image display of 8 domain regions through 1 thin-film transistor TFT, that is, forming an 8-domain display.

[0053] For more details, please refer to the following: Figures 7-8 ,in, Figure 7 For example Figure 4The diagram shows a planar structure of the pixel electrode 203 in a pixel unit P. Figure 8 For example Figure 4 The diagram shows a planar structure of the first common electrode 102 in a pixel unit P.

[0054] like Figures 7-8 As shown, in the main pixel region PM and the sub-pixel region PS, the first common electrode 102 includes multiple first domain regions D1. In this embodiment, the first common electrode 102 includes eight first domain regions D1. Within each first domain region D1, the common electrode 102 includes multiple first slits PS1, and the extension directions of the first slits PS1 in adjacent first domain regions D1 are different. Correspondingly, the pixel electrode 203 includes multiple second domain regions D2. Within each second domain region D2, the pixel electrode 203 forms multiple second slits PS2, and the extension directions of the second slits PS2 in adjacent second domain regions D2 are different. The first domain regions D1 and second domain regions D2 are arranged facing each other, and the first slits PS1 and second slits PS2 are arranged facing each other.

[0055] More specifically, such as Figure 7 As shown, in the main pixel region PM and the sub-pixel region PS, the pixel electrode 203 includes two second main electrodes 2031 that intersect in different directions. In this embodiment, the two second main electrodes 2031 are arranged in a cross shape. The four second domain regions D2 are located in the four adjacent regions formed by the two second main electrodes 2031.

[0056] Within each second domain region D2, the pixel electrode includes multiple second branch electrodes 2032. These multiple second branch electrodes 2032 are arranged side-by-side at a predetermined distance and are respectively connected to two adjacent second main electrodes 2031. It can be understood that the multiple second branch electrodes 2032 within each second domain region D2 have different lengths but extend in the same direction. A second slit PS2 is provided between two adjacent second branch electrodes 2032. It can be understood that each second slit PS2 is a hollow structure with at least one closed end.

[0057] like Figure 8 As shown, the first common electrode 102 includes two first main electrodes 1021 that intersect in different directions. In this embodiment, the two first main electrodes 1021 are arranged in a cross shape. Four first domain regions D1 are located in four adjacent regions formed by the two first main electrodes 1021.

[0058] Within each first domain region D1, the pixel electrode includes multiple first branch electrodes 1022. These multiple first branch electrodes 1022 are arranged side-by-side at a predetermined distance and are respectively connected to two adjacent first main electrodes 1021. It can be understood that the multiple first branch electrodes 1022 within each first domain region D1 have different lengths but extend in the same direction. A first slit PS1 is provided between two adjacent first branch electrodes 1022. In this embodiment, the first slit PS1 is a hollow structure closed at both ends.

[0059] In this embodiment, as Figure 4 As shown, for the display panel 10, that is, after the opposing substrate 10d and the array substrate 10c are combined, the extension directions of the second branch electrodes 2032 contained in the four second domain regions D2 are different, and the extension directions of the second slits PS2 contained in the four second domain regions D2 are also different. At the same time, the first domain region D1 and the second domain region D2 are arranged opposite each other, or in other words, the projection of the first domain region D1 on the array substrate 10c in the forward direction overlaps with the second domain region D2. Furthermore, the first branch electrode 1022 and the second branch electrode 2032 are also arranged opposite each other, or in other words, the projection of the first branch electrode 1022 on the array substrate 10c in the forward direction overlaps with the second branch electrode 2032. Correspondingly, the first slit PS1 and the second slit PS2 are also arranged opposite each other, or in other words, the projection of the first slit PS1 on the array substrate 10c in the forward direction overlaps with the second slit PS2.

[0060] In this embodiment, the extension directions of the first branch electrodes 1022 in the four first domain regions D1 of the substrate 10d are different, and correspondingly, the extension directions of the second branch electrodes 2032 in the four second domain regions D2 are different. This allows the first common electrode 102 and the pixel electrode 203 to generate a tilted electric field that induces different rotation directions of liquid crystal molecules in different electrode regions, achieving an 8-domain display. This makes the effect seen from all directions more average and consistent. Simultaneously, because the display angle is different in each domain, a wide viewing angle range can be achieved.

[0061] Furthermore, since the first common electrode 102 has a first slit PS1, the area occupied by the first common electrode 102 is reduced, thereby effectively reducing the reflectivity of the first common electrode 102 to incident ambient light, and also effectively reducing the resistance of the first common electrode 102.

[0062] It should be understood that the application of this application is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

Claims

1. A counter substrate, characterized by, The opposite substrate comprises: a first substrate, comprising a plurality of pixel regions arranged in an array; a first common electrode disposed on the first substrate, corresponding to each pixel region, comprising a plurality of first domain regions, and in each first domain region, the first common electrode comprises a plurality of first slits, and the extension directions of the first slits in adjacent first domain regions are different.

2. The counter substrate according to claim 1, wherein The first common electrode between adjacent two first domain regions further comprises a first trunk electrode, and the first common electrode in the first domain region comprises a plurality of first branch electrodes connected to the first trunk electrode, and the first slits are between adjacent two first branch electrodes.

3. The counter substrate according to claim 2, wherein The opposite substrate further comprises a first polarizer disposed on the side of the first substrate away from the first common electrode.

4. The counter substrate according to claim 3, wherein An opaque layer is disposed on the surface of the first substrate adjacent to the first common electrode and corresponding to the position between adjacent two pixel regions.

5. The opposite substrate according to any one of claims 1-4, wherein The opposite substrate further comprises a filter layer disposed on the side of the first common electrode away from the first substrate, and the filter layer is disposed corresponding to the pixel region and used for filtering light of different colors.

6. A display panel, characterized by, The display device comprises the display panel according to any one of claims 6-9. The array substrate comprises a second substrate comprising a plurality of pixel regions arranged in an array, and the second substrate corresponding to the pixel region comprises a pixel electrode comprising a plurality of second domain regions, wherein the first domain region and the second domain region are disposed opposite to each other, and the pixel electrode and the first common electrode are used to form an electric field to drive the display medium layer to perform image display.

7. The display panel of claim 6, wherein, In each second domain region, the pixel electrode forms a plurality of second slits, and the extension directions of the second slits in adjacent two second domain regions are different.

8. The display panel of claim 7, wherein, The pixel electrode between adjacent two second domain regions further comprises a second trunk electrode, and the pixel electrode in the second domain region comprises a plurality of second branch electrodes connected to the second trunk electrode, and the second slits are between adjacent two second branch electrodes.

9. The display panel of claim 8, wherein, The first branch electrode and the second branch electrode are disposed opposite to each other, and the projection of the first branch electrode along the normal direction on the array substrate overlaps with the second branch electrode; the first slit and the second slit are disposed opposite to each other, and the projection of the first slit along the normal direction on the array substrate overlaps with the second slit.

10. A display device, characterized by comprising: The display device comprises the display panel according to any one of claims 6-9.

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