Optical chip test objective table and optical chip test system
By designing a stage with multi-sized loading areas and a slotted structure, the problem of insufficient adsorption capacity of existing optical chip testing stages for small-sized and edge-coupled chips is solved, and stable adsorption and efficient testing of chips of different sizes are achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2026-02-12
- Publication Date
- 2026-03-27
AI Technical Summary
Existing optical chip testing stages have weak adsorption capabilities for small-sized and edge-coupled chips, limiting their applicability.
A stage for testing optical chips has been designed, which includes loading areas and adsorption holes of different sizes. The grooved design is used to increase the adsorption area and strength, making it suitable for chips of different types and sizes.
It achieves stable adsorption of chips of different sizes, improves testing accuracy and efficiency, has a wide range of applications, and is suitable for testing edge-coupled chips.
Smart Images
Figure CN224052275U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to a stage for optical chip testing and an optical chip testing system. BACKGROUND
[0002] The stage used in the optical chip testing base station at present is fixed in size, with a length of 50 mm and a width of 26 mm, and the suction holes are located at the center position. It can be suitable for the suction of vertical coupling chips and larger size chips (for example, chips with a length and width greater than 5 mm), but for small size chips (especially less than 5 mm) and edge coupling chips, the suction capacity is weak, and the scope of application is narrow.
[0003] For example, the Taiwan new patent TWM499556U proposes a bearing plate for optical detection equipment, which can be suitable for large size test boards above 24x26 inches, but not for small size optical chip testing.
[0004] Therefore, there is an urgent need for a stage for optical chip testing with a wide range of applications. CONTENT OF THE INVENTION
[0005] In view of the defects of the prior art, the present application provides a stage for optical chip testing and an optical chip testing system, which is suitable for placing various types of chips.
[0006] In one aspect, the embodiments of the present application provide a stage for optical chip testing, which comprises a table body with an upper surface and a lower surface, a vacuum suction channel is arranged inside the table body, and the upper surface is provided with a stage area for placing optical chips to be tested.
[0007] The stage area comprises a first stage area, a second stage area and a third stage area arranged in sequence along the length direction of the table body. The width of the second stage area is greater than that of the first stage area, and the width of the third stage area is greater than that of the second stage area.
[0008] In addition, at least one first suction hole is provided in the first stage area, which is in communication with the vacuum suction channel, at least one second suction hole is provided in the second stage area, which is in communication with the vacuum suction channel, and at least one third suction hole is provided in the third stage area, which is in communication with the vacuum suction channel. The aperture of the first suction hole, the second suction hole and the third suction hole is the same.
[0009] And, the second loading area is provided with a first slot corresponding to the second adsorption hole, the minimum size of the opening of the first slot is greater than the hole diameter, and the opening of the second adsorption hole is located in the first slot.
[0010] In some embodiments, the cross section of the second slot is greater than the cross section of the first slot; or the depth of the second slot is greater than the depth of the first slot.
[0011] In some embodiments, the overall size of the table body is 50mm in length and 20mm in width. The size of the first loading area is 15mm in length and 3mm in width; the size of the second loading area is 15mm in length and 8mm in width; and the size of the third loading area is 20mm in length and 20mm in width.
[0012] In some embodiments, along the length direction of the table body, the first loading area is close to the first side edge of the table body, the third loading area is close to the second side edge of the table body, the first side edge is opposite to the second side edge, and the second loading area is located between the first loading area and the third loading area.
[0013] In some embodiments, the diameter of the first adsorption hole, the second adsorption hole and the third adsorption hole is 1.5mm.
[0014] In some embodiments, the first slot and the second slot are long slots or round slots.
[0015] In some embodiments, the length of the first slot is 3mm and the depth is 0.2mm. In some embodiments, the length of the second slot is 4.5mm and the depth is 0.2mm.
[0016] In some embodiments, the interface of the vacuum adsorption channel is arranged on the side surface or the lower surface of the table body, and is used for connecting an external vacuum generating device.
[0017] In another aspect, the embodiment of the utility model provides a kind of optical chip test system, it includes the optical chip test loading table described in any one embodiment herein.
[0018] It should be understood that although the utility model uses specific numerical values to limit some dimensions of the product, it should be understood that there will be design tolerances to allow some deviations in the manufacturing and assembly process, so the utility model is not limited to the above specific numerical values, and also includes the reasonable error range generated in the production, measurement or calculation process that can be identified by those skilled in the art.
[0019] According to the embodiments of the utility model, at least the following beneficial effects can be realized.
[0020] The object table for optical chip testing has object carrying areas of different sizes, so as to be suitable for chips of different types or different sizes, and has the advantage of wide application range. In particular, the first object carrying area is suitable for chips with a length and a width less than 3 mm. Moreover, each object carrying area has at least two side edges same as the long side of the table body, and in combination with the different widths of different object carrying areas, chips of different sizes can be placed in different object carrying areas with one side edge close to the side edge of the object carrying area, so that the testing of edge coupling chips can be realized.
[0021] In addition, part of the object carrying areas of the utility model are provided with long grooves (for example, the first groove and the second groove), so as to increase the adsorption area and enhance the adsorption strength. The same size of aperture can be arranged in different object carrying areas to achieve the effect of different adsorption capacity, simplify the process, and be conducive to stably adsorbing chips of different sizes, facilitate the testing operation, and improve the testing efficiency and testing accuracy. Moreover, according to the utility model, the first groove and the second groove are formed on the surface of the object table through the groove process, and the adsorption holes of the same aperture are formed in the first groove and the second groove, so that the adsorption space volume of the bottom of the chip can be increased through a simple process, the air pressure difference is increased, and the chip is stably adsorbed on the object table.
[0022] Each aspect, feature, advantage and the like of the utility model will be described in detail below in combination with the drawings, and will become more apparent. BRIEF DESCRIPTION OF DRAWINGS
[0023] Figure 1 is a three-dimensional schematic view showing an example of the object table for optical chip testing of the utility model.
[0024] Figure 2 is a plane schematic view showing the object table for optical chip testing of the utility model. DETAILED DESCRIPTION
[0025] Before the exemplary embodiments of the utility model are described in more detail in combination with the drawings, it should be noted that the utility model can be implemented in various forms, and is not limited to the specific embodiments described or shown in the drawings.
[0026] The descriptions of the positions of the elements (such as "top", "bottom", "above", "below", "left side", "right side", etc.) in this document are only used to indicate the relative directions of the elements in the drawings. These descriptions are only exemplary and not limiting. In other exemplary embodiments, the directions of the elements can be different, and these changes are also included in the scope of the disclosure herein.
[0027] In addition, the terms "substantially", "about", "approximately", and the like are used as descriptive terms, not as exact limitations. These terms are intended to encompass a reasonable range of error or variation in the production, measurement, or computation of the described processes. The terms "comprise", "include", and "have" and the like are used synonymously to denote the presence of stated features, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, steps, operations, elements, components, or groups thereof. The terms "first", "second", and the like, do not denote any sort of precedence or order, but are used simply to distinguish different elements in the description.
[0028] The exemplary embodiments of the present application will be described below with reference to the accompanying drawings. Figure 1 and Figure 2 The exemplary embodiments of the present application will be described below with reference to the accompanying drawings.
[0029] According to the exemplary embodiments, the present application provides a stage for testing optical chips, which comprises a stage body 1000 having an upper surface 1001 and a lower surface 1002. The stage body 1000 is internally provided with a vacuum suction channel (not shown in the figure), and the upper surface 1001 comprises at least three loading areas for loading optical chips to be tested, wherein the at least three loading areas are provided with suction holes in communication with the vacuum suction channel, and the at least three loading areas have different sizes.
[0030] In the exemplary embodiments, the at least three loading areas can comprise a first loading area 1100, a second loading area 1200, and a third loading area 1300. The sizes of the second loading area 1200 and the first loading area 1100 are both smaller than the size of the third loading area 1300, and the width W2 of the second loading area 1200 is greater than the width W1 of the first loading area 1100. It should be understood that the present application is not limited thereto, and the length of the second loading area 1200 can also be greater than the length of the first loading area. The sizes of the first loading area 1100, the second loading area 1200, and the third loading area 1300 can be arbitrarily set as needed.
[0031] In optional embodiments, in addition to the first loading area 1100, the second loading area 1200, and the third loading area 1300, a fourth loading area, a fifth loading area, and the like can also be provided as needed.
[0032] In the exemplary embodiment, the platform 1000 has a total size of about 50 mm in length L and about 20 mm in width W. The first loading area has a length L1 of about 15 mm and a width W1 of about 3 mm. The second loading area has a length L2 of about 15 mm and a width W2 of about 8 mm. The third loading area has a length L3 of about 20 mm and a width W3 of about 20 mm. Those skilled in the art should understand that the sizes of the platform and the loading areas are exemplified herein, but the present application is not limited to the specific values described herein, and they can be properly set according to actual needs.
[0033] In the exemplary embodiment, the first loading area 1100 is located near a first side edge (right side in the figure) of the platform 1000 in the length direction, the third loading area 1300 is located near a second side edge (left side in the figure) of the platform 1000, and the first side edge is opposite to the second side edge. The second loading area 1200 is located between the first loading area 1100 and the third loading area 1300.
[0034] In the exemplary embodiment, at least one first suction hole 1101 is formed in the first loading area 1100, at least one second suction hole 1201 is formed in the second loading area 1200, and at least one third suction hole 1301 is formed in the third loading area 1300. The first suction hole 1101, the second suction hole 1201, and the third suction hole 1301 have the same hole diameter of about 1.5 mm. Alternatively, some of the first suction holes 1101, the second suction holes 1201, and the third suction holes 1301 have the same hole diameter. For example, the first suction holes 1101 and the second suction holes 1201 have the same hole diameter, or the second suction holes 1201 and the third suction holes 1301 have the same hole diameter, or the first suction holes 1101 and the third suction holes 1301 have the same hole diameter. Alternatively, the hole diameters of the respective suction holes in the plurality of first suction holes 1101, the plurality of second suction holes 1201, or the plurality of third suction holes 1301 are the same. In other embodiments, the first suction hole 1101, the second suction hole 1201, and the third suction hole 1301 have different hole diameters.
[0035] In the exemplary embodiment, the plurality of first suction holes 1101 are arranged at equal intervals, the plurality of second suction holes 1201 are arranged at equal intervals, and the plurality of third suction holes 1301 are arranged at equal intervals. Alternatively, all or part of the suction holes can be arranged at unequal intervals.
[0036] In the exemplary embodiment, the second loading area 1200 is provided with at least one first slot 1202, and the second slot 1202 is provided with the second adsorption hole 1201; the third loading area 1300 is provided with at least one second slot 1302, and the second slot 1302 is provided with the third adsorption hole 1301. The minimum opening size of the slot is greater than the hole diameter of the corresponding adsorption hole. In the alternative embodiment, either the second loading area 1200 or the third loading area 1300 is provided with a slot.
[0037] In some embodiments, the cross section of the second slot 1302 is greater than the cross section of the first slot 1202. In the exemplary embodiment, the width W3 of the third loading area 1300 is about 20 mm, the length of the second slot 1302 is about 4.5 mm, and the depth is about 0.2 mm, so that it can be suitable for loading a chip with a length greater than 4.5 mm and less than 20 mm. The width W2 of the second loading area 1200 is about 8 mm, the length of the first slot 1202 is about 3.0 mm, and the depth is about 0.2 mm, so that it can be suitable for loading a chip with a length greater than 3 mm and less than 8 mm. Alternatively, the depth of the second slot 1302 can be greater than the depth of the first slot 1202.
[0038] According to the above embodiments, since the second loading area and the third loading area are generally used to load larger size chips, by the slot design, the adsorption area can be increased, the adsorption effect can be enhanced, so that the optical chip can be stably loaded on the corresponding loading area, and stable test operation can be performed, thereby the test precision and test efficiency can be improved.
[0039] In some embodiments, the width W1 of the first loading area is about 3 mm, and the diameter of the first adsorption hole 1101 is about 1.5 mm, so that it can be suitable for loading a chip with a length greater than 1.5 mm and less than 3 mm.
[0040] It should be understood that the present application is not limited thereto, and the first loading area 1100 which adsorbs smaller chips can also be provided with a slot corresponding to the first adsorption hole. Alternatively, the third loading area 1300 or the second loading area 1200 can also not be provided with the slot. In the exemplary embodiment, the third loading area 1300 and the second loading area 1200 are provided with a slot corresponding to each adsorption hole. Alternatively, a slot can be provided corresponding to part of the adsorption holes. For example, a slot is provided corresponding to every other adsorption hole. In addition, although the exemplary embodiment limits specific values for the length and depth of the slot, it should be understood that these values can be changed according to actual needs.
[0041] In some embodiments, the above slot is a long slot or a circular slot. The utility model is not limited to this, and the slot can also have other shapes. Instead of the slot, a plurality of adsorption holes can be arranged along the length of the slot. For example, a plurality of adsorption holes in the form of an array can be arranged in the object loading area, and the technical effect of the slot, i.e., enhancing the adsorption of the optical chip, can also be achieved.
[0042] In the example embodiment, as shown in Figure 2 The slot and the adsorption hole are arranged at the approximate central part of the corresponding object loading area. Alternatively, the slot and the adsorption hole can be arranged at other parts of the corresponding object loading area or throughout the object loading area. Although four adsorption holes are arranged in each object loading area, the utility model is not limited to this, and more than one or any appropriate number of adsorption holes can be arranged in the object loading area. For example, a plurality of adsorption holes can be arranged in the form of an array to enhance the adsorption force.
[0043] In addition, in some embodiments, an interface (not shown) of the vacuum adsorption channel is arranged on the side surface or the lower surface of the table body 100, so as to be connected to an external vacuum generating device (not shown) through a connecting pipe.
[0044] The above description of the object loading table for testing an optical chip according to the utility model is combined with the accompanying drawings.
[0045] The embodiment of the utility model further provides an optical chip testing system, which comprises the object loading table for testing an optical chip according to any one of the embodiments.
[0046] Those skilled in the art should understand that the above disclosure is only an example of the embodiment of the utility model, and the scope of the patent protection requested by the present application is not limited to this. Various modifications, changes, replacements, etc. can be made to the embodiments disclosed herein without departing from the purpose of the utility model, and these changes are within the scope of the claims of the present application.
Claims
1. A stage for optical chip testing, characterized by, The table body comprises an upper surface and a lower surface, The table body is internally provided with a vacuum suction channel, The upper surface is provided with a loading area for loading the optical chip to be tested; The loading area comprises a first loading area, a second loading area and a third loading area arranged in sequence along the length direction of the table body; The width of the second loading area is greater than that of the first loading area, and the width of the third loading area is greater than that of the second loading area; At least one first suction hole in communication with the vacuum suction channel is formed in the first loading area, at least one second suction hole in communication with the vacuum suction channel is formed in the second loading area, and at least one third suction hole in communication with the vacuum suction channel is formed in the third loading area, and the aperture of the first suction hole, the second suction hole and the third suction hole is the same; The second loading area is provided with a first slot corresponding to the second suction hole, the minimum size of the opening of the first slot is greater than the aperture, and the opening of the second suction hole is located in the first slot, The third loading area is provided with a second slot corresponding to the third suction hole, the minimum size of the opening of the second slot is greater than the aperture, and the opening of the third suction hole is located in the second slot.
2. The optical chip testing loading table according to claim 1, wherein The cross section of the second slot is greater than that of the first slot; or The depth of the second slot is greater than that of the first slot.
3. The object table for optical chip testing according to claim 1, wherein The overall size of the table body is 50mm in length and 20mm in width.
4. The optical chip testing loading table according to claim 3, wherein The size of the first loading area is 15mm in length and 3mm in width; The size of the second loading area is 15mm in length and 8mm in width; The size of the third loading area is 20mm in length and 20mm in width.
5. The object table for optical chip testing according to claim 1, wherein The first slot and the second slot are long slots or round slots.
6. The object table for optical chip testing according to claim 1, wherein The diameter of the first suction hole, the second suction hole and the third suction hole is 1.5mm.
7. The object table for optical chip testing according to claim 6, wherein The length of the first slot is 3mm, and the depth is 0.2mm.
8. The object table for optical chip testing according to claim 6, wherein The length of the second slot is 4.5mm, and the depth is 0.2mm.
9. The object table for optical chip testing according to claim 1, wherein The interface of the vacuum suction channel is arranged on the side surface or the lower surface of the table body, and is used for connecting an external vacuum generating device.
10. An optical chip testing system, characterized by, The optical chip testing loading table according to any one of claims 1 to 9.