Triode-triggered integrated silicon controlled rectifier
By using a transistor-triggered integrated thyristor structure, the current amplified by the transistor is used as the gate current, combined with current limiting and two-stage amplification, which solves the application problem of micro-triggered and strong-triggered thyristors in high-precision control systems and realizes a low-complexity and high-stability circuit design.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-30
- Publication Date
- 2026-03-31
AI Technical Summary
Existing micro-triggered thyristors have low trigger current and high sensitivity, but it is difficult to achieve high-precision control. Strong-triggered thyristors have high trigger current, but their circuit complexity and cost are high, making them difficult to apply to high-precision control systems.
The integrated thyristor structure is triggered by a transistor. The current amplified by the transistor is used as the gate current of the thyristor. Combined with the current limiting of the POLY resistor, the conduction of the large current thyristor is controlled by a small current. The two-stage amplification is achieved by combining optocouplers and transistors, avoiding the electrical connection between the signal source and the transistor-triggered thyristor.
It achieves high-precision control under low input current, reduces the complexity and cost of drive circuits, and improves the stability and anti-interference capability of the circuit, making it suitable for precision micro-control systems.
Smart Images
Figure CN224069036U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of semiconductor technology, specifically to an integrated thyristor triggered by a transistor. Background Technology
[0002] Micro-triggered thyristors typically require only a small trigger current to conduct, usually in the microamp level. They have high trigger sensitivity, enabling precise control and reducing the complexity of the trigger circuit and lowering costs. Strong-triggered thyristors, on the other hand, typically have trigger currents in the milliamp level. They offer higher anti-interference capabilities, better current handling and voltage withstand capabilities, and can control high-power systems. However, their trigger circuits are more complex, cost is higher, and they are less suitable for use in high-precision control systems. Utility Model Content
[0003] The purpose of this invention is to provide an integrated thyristor triggered by a transistor to solve the problems mentioned in the background art.
[0004] To achieve the above objectives, this utility model provides the following technical solution: a transistor-triggered integrated thyristor, comprising an N-type silicon substrate, wherein a front-side P-type short base region of the thyristor and a P-type base region of the transistor are disposed near the upper surface of the N-type silicon substrate, and a back-side P-type short base region of the thyristor is disposed near the lower surface of the N-type silicon substrate. The front-side P-type short base region of the thyristor is provided with an N+-type emitter region of the thyristor and a cathode electrode disposed on the N+-type emitter region of the thyristor. A gate metal of the thyristor is disposed near the P-type base region of the transistor. An N+-type emitter region of the transistor and a transistor emitter metal disposed on the surface of the N+-type emitter region are disposed on one side of the P-type base region of the transistor. A gate electrode is disposed on the other side of the P-type base region of the transistor. The transistor emitter metal and the thyristor gate metal are connected by a POLY resistor.
[0005] Preferably, a thyristor P-type field ring is provided on the outer side of the short base region of the front side of the thyristor, and a transistor P-type field ring is provided on the outer side of the base region of the transistor.
[0006] Preferably, the N-type silicon substrate is provided with a transistor N-type collector region connecting the transistor P-type base region and a thyristor N-type long base region connecting the thyristor front-side P-type short base region.
[0007] Preferably, a P-type through-ring is provided on the outer side of the P-type short base region on the front side of the thyristor.
[0008] Preferably, an anode electrode is disposed at the bottom of the N-type silicon substrate.
[0009] Preferably, the thyristor's front P-type short base region and the transistor's P-type base region are respectively provided with a thyristor N+ type cutoff ring and a transistor N+ type cutoff ring.
[0010] Preferably, a surface passivation layer is disposed on the upper surface of the N-type silicon substrate.
[0011] Preferably, the resistivity of the N-type silicon substrate is 50 to 70 Ω·cm.
[0012] Preferably, the junction depth of the front P-type short base region of the thyristor, the back P-type short base region of the thyristor, and the P-type base region of the transistor is 28–33 μm.
[0013] Preferably, the junction depth of the thyristor P-type field ring and the transistor P-type field ring is 60-70 μm.
[0014] Compared with the prior art, the beneficial effects of this utility model are:
[0015] 1. This transistor-triggered integrated thyristor uses the current amplified by the transistor as the gate current of the thyristor, which can realize the control of the large current thyristor by a small current. The small input current can reduce the complexity of the drive circuit design and reduce the design cost. The thyristor itself is a strong triggering thyristor with better anti-interference ability and lower requirements for external protection circuits, which can reduce application costs.
[0016] 2. This is a transistor-triggered integrated thyristor, which can be combined with an optocoupler transistor to achieve two-stage amplification for use in more precise micro-control systems. The input and output sides of the optocoupler transistor are electrically isolated, which can avoid direct electrical connection between the signal source and the transistor-triggered thyristor, reduce mutual interference, and further improve the stability and anti-interference capability of the entire circuit system. Attached Figure Description
[0017] Figure 1 This is a top view of the overall structure of this utility model;
[0018] Figure 2 This is a schematic diagram of the cross-section at point AB of this utility model;
[0019] Figure 3 This is the equivalent circuit diagram of the present invention;
[0020] Figure 4 This is the application circuit diagram of this utility model;
[0021] In the figure: 1. N-type silicon substrate; 21. Front P-type short base region of the thyristor; 22. Back P-type short base region of the thyristor; 3. P-type base region of the transistor; 4. N+ type emitter region of the thyristor; 5. Cathode electrode; 6. Gate metal of the thyristor; 7. N+ type emitter region of the transistor; 8. Emitter metal of the transistor; 9. Gate electrode; 10. POLY resistor; 11. P-type field ring of the thyristor; 12. P-type field ring of the transistor; 13. N-type collector region of the transistor; 14. N-type long base region of the thyristor; 15. P-type punch-through ring of the thyristor; 16. Anode electrode; 17. N+ type cut-off ring of the thyristor; 18. N+ type cut-off ring of the transistor; 19. Surface passivation layer. Detailed Implementation
[0022] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.
[0023] In the description of this utility model, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.
[0024] In the description of this patent, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "setting" should be interpreted broadly. For example, they can refer to a fixed connection or setting, a detachable connection or setting, or an integrated connection or setting. Those skilled in the art can understand the specific meaning of the above terms in this patent according to the specific circumstances.
[0025] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this utility model, "several" means two or more, unless otherwise explicitly specified.
[0026] Example
[0027] Please see Figure 1-4 As shown, this utility model provides a transistor-triggered integrated thyristor technology solution: It includes an N-type silicon substrate 1, with a surface passivation layer 19 disposed on the upper surface of the N-type silicon substrate 1. The resistivity of the N-type silicon substrate 1 is 50–70 Ω·cm. A thyristor front-side P-type short base region 21 and a transistor P-type base region 3 are disposed near the upper surface of the N-type silicon substrate 1. A thyristor back-side P-type short base region 22 is disposed near the lower surface of the N-type silicon substrate 1. The junction depth of the thyristor front-side P-type short base region 21, the thyristor back-side P-type short base region 22, and the transistor P-type base region 3 is 28–33 μm. A thyristor N+ type emitter region 4 and a cathode electrode 5 disposed on the thyristor N+ type emitter region 4 are disposed on the thyristor N+ type emitter region 4. An anode electrode 16 is disposed at the bottom of the N-type silicon substrate 1. A thyristor gate electrode is disposed near the transistor P-type base region 3 on the thyristor front-side P-type short base region 21. Metal 6, N+ type emitter 7 and emitter metal 8 are disposed on the surface of the N+ type emitter 7 of the transistor on one side of the P-type base region 3 of the transistor, and gate electrode 9 is disposed on the other side of the P-type base region 3 of the transistor. The emitter metal 8 of the transistor and the gate metal 6 of the thyristor are connected by a POLY resistor 10 with a resistance value of 5kΩ. The POLY resistor 10 acts as a current limiter to prevent the current output from the transistor to the gate of the thyristor from being too large and burning out the thyristor chip. The current amplified by the transistor is used as the gate current of the thyristor, which can realize the conduction of the thyristor with a small current. The small input current can reduce the complexity of the drive circuit design and reduce the design cost. The thyristor itself is a strong trigger thyristor with better anti-interference ability and lower requirements for external protection circuits, which can reduce application costs.
[0028] Furthermore, a thyristor P-type field ring 11 is provided outside the P-type short base region 21 on the front side of the thyristor, and a transistor P-type field ring 12 is provided outside the P-type base region 3 of the transistor. The junction depth of the thyristor P-type field ring 11 and the transistor P-type field ring 12 is 60-70 μm. The N-type silicon substrate 1 is provided with a transistor N-type collector region 13 connecting the transistor P-type base region 3 and a thyristor N-type long base region 14 connecting the thyristor P-type short base region 21 on the front side of the thyristor. A thyristor P-type through-ring 15 is provided outside the P-type short base region 21 on the front side of the thyristor. A thyristor N+ type cutoff ring 17 and a transistor N+ type cutoff ring 18 are respectively provided outside the P-type short base region 21 on the front side of the thyristor and the transistor P-type base region 3.
[0029] Furthermore, according to it Figure 3As shown, a thyristor is equivalently replaced by two transistors whose bases and collectors are connected. When the gate G is supplied with input, the transistors conduct and are in amplification mode. At this time, ie = (1+β)ib, where ie is the emitter current of the transistor, ib is the base current of the transistor, and β is the current amplification factor of the transistor. The current ie will serve as the gate current of the thyristor, triggering it to conduct. Due to the amplification effect of the transistors, a strong triggering thyristor can be achieved by controlling the conduction of a low input signal. In some circuits with high triggering accuracy requirements, such as precision power supply voltage regulation circuits or motor speed control circuits, triggering the thyristor through transistors can achieve more precise output control and improve the stability and reliability of circuit performance.
[0030] Furthermore, according to it Figure 4 As shown, a transistor-triggered thyristor can be combined with an optocoupler transistor to achieve two-stage amplification, which can be used in more precise micro-control systems. The input and output sides of the optocoupler transistor are electrically isolated, which can avoid direct electrical connection between the signal source and the transistor-triggered thyristor, reduce mutual interference, and further improve the stability and anti-interference capability of the entire circuit system.
[0031] The working principle of this utility model is as follows:
[0032] In this embodiment, the transistor-triggered integrated thyristor uses the current amplified by the transistor as the gate current of the thyristor, which enables a small current to control the conduction of a large current thyristor. The small input current reduces the complexity of the drive circuit design and lowers the design cost. Furthermore, the thyristor itself is a strongly triggered thyristor with better anti-interference capabilities and lower requirements for external protection circuits, thus reducing application costs.
[0033] The foregoing has shown and described the basic principles, main features, and advantages of this utility model. Those skilled in the art should understand that this utility model is not limited to the above embodiments. The embodiments and descriptions in the specification are merely preferred examples and are not intended to limit the utility model. Various changes and modifications can be made to this utility model without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claimed utility model. The scope of protection of this utility model is defined by the appended claims and their equivalents.
Claims
1. A triac triggered integrated thyristor comprising an N-type silicon substrate (1), characterized in that: The N-type silicon substrate (1) is provided with a thyristor front P-type short base region (21) and a triode P-type base region (3) near the upper surface, a thyristor back P-type short base region (22) near the lower surface, a thyristor N+ type emitter region (4) in the thyristor front P-type short base region (21), a cathode electrode (5) provided in the thyristor N+ type emitter region (4), a thyristor gate metal (6) provided in the thyristor front P-type short base region (21) near the triode P-type base region (3), a triode N+ type emitter region (7) provided on one side of the triode P-type base region (3), a triode emitter metal (8) provided on the surface of the triode N+ type emitter region (7), a gate electrode (9) provided on the other side of the triode P-type base region (3), and the triode emitter metal (8) and the thyristor gate metal (6) are connected through a POLY resistor (10).
2. The triac triggered integrated thyristor according to claim 1, characterized in that: A thyristor P-type field ring (11) is provided outside the thyristor front P-type short base region (21), and a triode P-type field ring (12) is provided outside the triode P-type base region (3).
3. The triac triggered integrated thyristor according to claim 1, characterized in that: The N-type silicon substrate (1) is provided with a triode N-type collector region (13) connected to the triode P-type base region (3) and a thyristor N-type long base region (14) connected to the thyristor front P-type short base region (21).
4. The triac triggered integrated thyristor according to claim 1, characterized in that: A thyristor P-type through ring (15) is provided outside the thyristor front P-type short base region (21).
5. The triac triggered integrated thyristor according to claim 1, characterized in that: An anode electrode (16) is provided at the bottom of the N-type silicon substrate (1).
6. The triac triggered integrated thyristor according to claim 1, characterized in that: A thyristor N+ type cutoff ring (17) and a triode N+ type cutoff ring (18) are respectively provided outside the thyristor front P-type short base region (21) and the triode P-type base region (3).
7. The triac triggered integrated thyristor according to claim 1, characterized in that: A surface passivation layer (19) is provided on the upper surface of the N-type silicon substrate (1).
8. The triac triggered integrated thyristor of claim 1, wherein: The resistivity of the N-type silicon substrate (1) is 50-70 Ω·cm.
9. The triac triggered integrated thyristor of claim 1, wherein: The junction depth of the thyristor front P-type short base region (21), the thyristor back P-type short base region (22) and the triode P-type base region (3) is 28-33 um.
10. The triac triggered integrated thyristor of claim 2, wherein: The junction depth of the thyristor P-type field ring (11) and the triode P-type field ring (12) is 60-70 um.