Load fault detection device

Abstract

The utility model discloses a load fault detection device which comprises a logic unit, a power supply signal sampling unit, a driving signal sampling unit and a load signal sampling unit. The power signal sampling unit is electrically connected with a power supply end of the load and is used for sampling a power signal of a power supply of the load; the driving signal sampling unit is electrically connected with a control signal end of a driving device of the load and is used for driving signal sampling of the driving device; the load signal sampling unit is electrically connected with a sampling end of a load and is used for sampling a working state signal of the load; and the logic unit is electrically connected with the power supply signal sampling unit, the driving signal sampling unit and the load signal sampling unit, and is used for outputting a load fault signal according to a logical operation result of the power supply signal, the driving signal and the working state signal.

Description

Technical Field

[0001] This utility model relates to the field of electronic circuit technology, and in particular to a load fault detection device. Background Technology

[0002] In modern electronic devices, the load, as a critical actuator, directly affects the performance and reliability of the entire system. However, loads are highly susceptible to failure due to various factors during operation. Instability in the power supply, such as voltage fluctuations or momentary power outages followed by recovery, can cause abnormal load operation; deviations in the control signals of the drive device, such as signal loss, incorrect frequency or duty cycle, can prevent the load from operating as expected; and the load itself may develop short circuits or open circuits due to prolonged use.

[0003] Traditional load fault detection methods are prone to false positives and false negatives, and the detection devices are expensive, complex in structure, and not very stable. Utility Model Content

[0004] This invention provides a load fault detection device to address at least one defect in the prior art.

[0005] This utility model provides a load fault detection device, including: a logic unit, a power signal sampling unit, a drive signal sampling unit, and a load signal sampling unit;

[0006] The power signal sampling unit is electrically connected to the power supply terminal of the load and is used for sampling the power signal of the power supply of the load.

[0007] The drive signal sampling unit is electrically connected to the control signal terminal of the drive device of the load, and is used for sampling the drive signal of the drive device;

[0008] The load signal sampling unit is electrically connected to the sampling terminal of the load and is used for sampling the working status signal of the load.

[0009] The logic unit is electrically connected to the power signal sampling unit, the drive signal sampling unit, and the load signal sampling unit. The logic unit is used to output a load fault signal based on the logical operation results of the power signal, the drive signal, and the operating status signal.

[0010] The load signal sampling unit includes at least a voltage divider sampling circuit and a first diode. The cathode of the first diode is electrically connected to the power supply terminal, and the anode of the first diode is electrically connected to the voltage divider sampling point of the voltage divider sampling circuit.

[0011] The logic unit is electrically connected to the voltage divider sampling point, and the working status signal is obtained through the voltage divider sampling point.

[0012] Optionally, the driving device includes a driving chip and a switching transistor;

[0013] The drive signal output terminal of the driver chip is electrically connected to the control terminal of the switching transistor, and the drive signal input terminal of the driver chip serves as the control signal terminal.

[0014] Optionally, the power supply terminal is electrically connected to the first terminal of the switching transistor through the load, and the second terminal of the switching transistor is electrically connected to the reference terminal;

[0015] The first terminal of the switching transistor also serves as the sampling terminal.

[0016] Optionally, the logic unit includes logic operation circuits;

[0017] When the power signal is 1, the drive signal is 0, and the working status signal is 0, the logic operation circuit outputs a first level signal;

[0018] When the power signal is 1, the drive signal is 1, and the working status signal is 1, the logic operation circuit outputs a first level signal;

[0019] When the power signal is 1, the drive signal is 1, and the working status signal is 0, the logic operation circuit outputs a second level signal;

[0020] When the power signal is 1, the drive signal is 0, and the working status signal is 1, the logic operation circuit outputs a second level signal;

[0021] The first level signal indicates that the load is faulty, and the second level signal indicates that the load is normal.

[0022] Optionally, it also includes a controller, which is connected to the logic unit;

[0023] The controller is configured to receive logic operation signals output by the logic unit and determine the fault of the load based on the logic operation signals.

[0024] Optionally, the drive signal output terminal is electrically connected to the control terminal of the switching transistor through a first resistor;

[0025] The control terminal and the second terminal of the switching transistor are also connected in parallel with a second resistor.

[0026] Optionally, the switching transistor may include a MOSFET or a bipolar transistor.

[0027] Optionally, the controller is also used to output a drive signal for the drive device.

[0028] Optionally, a second diode is connected in parallel to the first and second ends of the load, with the negative terminal of the second diode electrically connected to the first end of the load and the positive terminal of the second diode electrically connected to the second end of the load.

[0029] Optionally, the load is a power-adjustable load.

[0030] Compared with existing technologies, the advantages of this invention are as follows: This invention proposes a load fault detection device, which includes a logic unit, a power signal sampling unit, a drive signal sampling unit, and a load signal sampling unit. Each module is independently designed and has a clear division of labor, reducing the overall complexity of the detection device design. The detection device uses multiple sampling units to sample load-related signals from different aspects: the power signal sampling unit monitors the power supply, the drive signal sampling unit focuses on the drive device, and the load signal sampling unit focuses on the load itself. The logic unit integrates these signals for calculation and judgment. This multi-dimensional monitoring method can provide a more comprehensive understanding of the load's operating status. Compared with single-signal detection, it greatly improves the accuracy of fault detection and the stability of the system, reducing the possibility of false positives and false negatives. Attached Figure Description

[0031] Figure 1 This is a schematic diagram of the load fault detection device in the embodiment;

[0032] Figure 2 This is a schematic diagram of the load signal sampling unit structure in the embodiment. Detailed Implementation

[0033] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not the entire structure.

[0034] Figure 1 This is a schematic diagram of the load fault detection device in the embodiment, for reference. Figure 1 The load fault detection device includes: a logic unit 100, a power signal sampling unit 200, a drive signal sampling unit 300, and a load signal sampling unit 400.

[0035] The power signal sampling unit 200 is electrically connected to the power supply terminal of the load 11 and is used for sampling the power signal of the power supply of the load 11.

[0036] The drive signal sampling unit 300 is electrically connected to the control signal terminal of the drive device 12 of the load 11 and is used for sampling the drive signal of the drive device 12.

[0037] The load signal sampling unit 400 is electrically connected to the sampling terminal of the load 11 and is used for sampling the working status signal of the load 11.

[0038] The logic unit 100 is electrically connected to the power signal sampling unit 200, the drive signal sampling unit 300, and the load signal sampling unit 400. The logic unit 100 is used to output a load fault signal based on the logical operation results of the power signal, drive signal, and operating status signal.

[0039] For example, in this solution, the power signal can exist in two states: "0" (no power supply) and "1" (power supply). This power signal indicates whether the power supply to the load is normal. If the power signal is in the state of "0", it means that the load is not receiving power input, and the load cannot be turned on due to the lack of power supply. When the power signal is in the state of "1", the power supply is normally supplying power to the load. In this case, the drive signal and the operating status signal can be combined to determine whether the load has malfunctioned.

[0040] For example, in this solution, the power signal sampling unit 200 may include a voltage comparator circuit. When the power supply to the load 11 is operating normally, the supply voltage reaches or exceeds the minimum threshold voltage. At this time, the voltage signal collected by the power signal sampling unit 200 is conditioned and input to the voltage comparator. The comparator compares the input signal with a reference voltage. Since the input signal is higher than the reference voltage, the comparator outputs a high-level signal, which can be represented as "1" in digital logic. Conversely, when the load is not connected to the power supply or the power supply fails, causing the voltage to be lower than the reference voltage, the comparator outputs a low-level signal, i.e., "0".

[0041] For example, in this solution, the driving signal can be a PWM (Pulse Width Modulation) signal. The duty cycle of the PWM signal is adjustable, and the power of the load can be adjusted by changing the duty cycle of the PWM signal.

[0042] For example, in this solution, the drive signal sampling unit 300 may include an isolation sampling circuit, an operational amplifier circuit, and a comparator circuit.

[0043] The isolation sampling circuit is used for isolated sampling of signals. It can be designed to connect the PWM control signal of the drive device 12 to an isolation device (e.g., an optocoupler), and the output of the isolation device is connected to the operational amplifier circuit.

[0044] Operational amplifier circuits are used to amplify input signals by setting a certain amplification factor. Simultaneously, they utilize the characteristics of operational amplifiers to shape the signal, making the waveform more regular. The output of the operational amplifier circuit is connected to a comparator circuit.

[0045] The comparator circuit is used to output a high level when the input signal is greater than the threshold voltage and a low level when the input signal is less than the threshold voltage.

[0046] For example, in this solution, the operating status signal represents an electrical signal that reflects the real-time operating status of the load 11. This signal is the electrical signal corresponding to the load's current and voltage. By analyzing these signals, it is possible to determine whether the load is operating normally and whether there are faults such as open circuits or short circuits.

[0047] Taking a motor as a load as an example, the operating status signal may be the current signal when the motor is working. When the motor is running normally, the current is within a certain range; if the motor stalls (similar to a short circuit fault), the current will increase sharply. This changed current signal is the signal that reflects the operating status of the motor.

[0048] For example, in this solution, the load signal sampling unit 400 may include a voltage sensor and an operational amplifier. Specifically, a resistor divider voltage sensor may be used. By appropriately selecting the resistance value of the voltage divider resistor, the sampled voltage is proportionally converted to a suitable range.

[0049] Operational amplifiers can amplify weak signals. The amplification factor can be adjusted by changing the ratio of the feedback resistor to the input resistor, depending on the actual needs.

[0050] For example, in this solution, the logic unit 100 may include an FPGA (Field-Programmable Gate Array) and a load fault signal output circuit.

[0051] The FPGA is configured to design a state machine or logical expression based on the logical relationship between power signals, drive signals, and operating status signals. For example, when the power signal is normal (high level), the drive signal is valid (high level), and the load operating status signal is within the normal range (specific digital value), the load is determined to be normal; otherwise, a load fault signal is output.

[0052] The load fault signal output circuit outputs a load fault signal via GPIO. This signal can directly drive low-power devices, such as LED indicators, to indicate the load fault status.

[0053] For example, in this solution, the logic unit 100 can be designed based on logic gates (such as AND gates, NOT gates, XOR gates, etc.), and outputs a load fault signal through logic operations on power supply signals, drive signals and operating status signals.

[0054] If the signal level output by each sampling unit does not match the input level of the logic gate, a level conversion circuit is required to convert the level of the signal input to the logic gate. This level conversion circuit can be designed based on a level conversion chip.

[0055] In one possible implementation, the load signal sampling unit 400 is configured to include at least a voltage divider sampling circuit and a first diode. The first diode is electrically connected to the power supply terminal, and the positive terminal of the first diode is electrically connected to the voltage divider sampling point of the voltage divider sampling circuit. The logic unit 100 is electrically connected to the voltage divider sampling point and obtains the working status signal through the voltage divider sampling point.

[0056] For example, in this solution, the load signal sampling unit 400 can be connected in series in the loop of the load 11, and the voltage divider sampling circuit can include at least two voltage divider resistors. The current in the loop of the load 11 forms a working status signal at the voltage divider sampling point after passing through the voltage divider sampling circuit.

[0057] To prevent the voltage at the voltage divider sampling point from exceeding the input voltage range that the logic unit 100 can withstand, a first diode is designed. The first diode is used to limit the voltage of the operating status signal within a preset voltage threshold. This prevents excessively high voltage from damaging the logic unit 100.

[0058] This embodiment proposes a load fault detection device, which includes a logic unit, a power signal sampling unit, a drive signal sampling unit, and a load signal sampling unit. Each module is designed independently and has a clear division of labor, reducing the overall design complexity of the detection device.

[0059] In this solution, taking the load signal sampling unit as an example, the sampling of the load operating status signal and the protection of subsequent circuits are achieved using only a voltage divider sampling circuit and a first diode. The voltage divider sampling circuit uses the simple principle of resistor voltage division to obtain load-related voltage information, while the first diode acts as a clamp to prevent excessive voltage from damaging subsequent logic units. Multiple functions are achieved with fewer components, effectively simplifying the circuit.

[0060] In this scheme, the detection device employs multiple sampling units to sample load-related signals from different perspectives. The power signal sampling unit monitors the power supply, the drive signal sampling unit focuses on the drive device, and the load signal sampling unit focuses on the load itself. The logic unit integrates these signals for calculation and judgment. This multi-dimensional monitoring method provides a more comprehensive understanding of the load's operating status. Compared to single-signal detection, it significantly improves the accuracy of fault detection and the stability of the system, reducing the possibility of false positives and false negatives.

[0061] Based on the aforementioned solution, in one possible implementation, the driving device includes a driving chip and a switching transistor.

[0062] The drive signal output terminal of the driver chip is electrically connected to the control terminal of the switching transistor, and the drive signal input terminal of the driver chip serves as the control signal terminal.

[0063] In this scheme, the drive signal input terminal of the driver chip serves as the control signal terminal, receiving external control commands. Upon receiving the control signal, the driver chip generates a corresponding drive signal at the drive signal output terminal based on its internal logic and functions. This drive signal is transmitted to the control terminal of the switching transistor to control its on and off states.

[0064] From a fault detection perspective, the drive signal sampling unit is electrically connected to the control signal terminal (i.e., drive signal input terminal) of the drive chip, and can collect the control signals received by the drive chip in real time.

[0065] Drive signals are a crucial prerequisite for the normal operation of a load. If the drive signal is abnormal, even if the load itself is normal, it may still fail to function properly. Accurately acquiring drive signals and analyzing them in conjunction with other signals helps to promptly identify potential faults in the drive unit and load, enabling timely maintenance or repair measures to be taken.

[0066] Based on any of the aforementioned schemes, in one possible implementation scheme, the power supply terminal is electrically connected to the first terminal of the switching transistor through a load, and the second terminal of the switching transistor is electrically connected to the reference terminal; the first terminal of the switching transistor also serves as the sampling terminal.

[0067] In this design, the power supply terminal is electrically connected to the first terminal of the switching transistor via the load. Current flows from the power supply terminal, through the load, to the first terminal of the switching transistor, and then through the second terminal of the switching transistor to the reference terminal (usually the ground terminal), forming a complete circuit. When the switching transistor is turned on, the load is connected to the circuit and begins to work; when the switching transistor is turned off, the load is de-energized and stops working.

[0068] From a voltage perspective, the first terminal of the switching transistor also serves as the sampling terminal. The voltage at this point is directly related to the voltage across the load. When the load is operating normally, the voltage across its terminals is within a specific range, and the voltage at the first terminal of the switching transistor is also within the corresponding reasonable range.

[0069] If the load is open-circuited, the load resistance is infinite, the current is zero, and the voltage at the first terminal of the switching transistor will be close to the power supply voltage; if the load is short-circuited, the load resistance approaches zero, and the voltage at the first terminal of the switching transistor will drop significantly.

[0070] From the perspective of current, the current flowing through the load must pass through the first terminal of the switching transistor. By sampling the current at this point, it is possible to determine whether the load current is normal, and thus determine whether there are faults such as overload or short circuit in the load.

[0071] Based on any of the aforementioned schemes, in one possible implementation, the logic unit includes logic operation circuits.

[0072] When the power supply signal is 1, the drive signal is 0, and the working status signal is 0, the logic operation circuit outputs the first level signal.

[0073] When the power supply signal is 1, the drive signal is 1, and the working status signal is 1, the logic operation circuit outputs the first level signal.

[0074] When the power supply signal is 1, the drive signal is 1, and the working status signal is 0, the logic operation circuit outputs a second level signal.

[0075] When the power supply signal is 1, the drive signal is 0, and the working status signal is 1, the logic operation circuit outputs a second level signal.

[0076] The first level signal indicates a load fault, and the second level signal indicates a normal load.

[0077] For example, in this solution, logic gates can be used to design logic units so that the logic units can satisfy the above-mentioned logical relationships.

[0078] For example, in this scheme, let the power supply signal be A, the drive signal be B, the operating status signal be C, and the logic operation circuit output be Y. Two NOT gates can be used to invert B and C respectively, resulting in -B and -C. Then, two AND gates are used to implement B·C and -B·-C respectively. Next, an OR gate is used to perform an OR operation on B·C and -B·-C, resulting in B·C+-B·-C. Finally, an AND gate is used to perform an AND operation on A and B·C+-B·-C, obtaining the final output Y.

[0079] Based on any of the aforementioned schemes, the detection device also includes a controller, which is connected to the logic unit; the controller is configured to receive the logic operation signals output by the logic unit and determine the load fault based on the logic operation signals.

[0080] For example, in this solution, the controller is connected to the logic unit. The logic unit outputs logic operation signals based on the logic operation results of the power signal, drive signal and working status signal. These signals are directly transmitted to the controller to provide a basis for the controller to judge load faults.

[0081] The logic unit performs logical operations on the signals collected by each sampling unit according to preset logical rules, and outputs the operation results to the controller in the form of a level signal. Upon receiving this level signal, the controller determines whether a load fault has occurred based on preset rules.

[0082] Based on any of the aforementioned schemes, in one possible implementation scheme, the drive signal output terminal is electrically connected to the control terminal of the switching transistor through a first resistor; the control terminal and the second terminal of the switching transistor are also connected in parallel with a second resistor.

[0083] For example, in this solution, the first resistor serves as a drive current-limiting resistor, and the second resistor serves as a pull-down resistor.

[0084] Based on any of the aforementioned solutions, in one possible implementation, the switching transistor includes a MOSFET or a bipolar transistor.

[0085] Based on any of the aforementioned schemes, in one possible implementation, the controller is also used to output a drive signal for the drive device.

[0086] In this solution, the controller generates appropriate drive signals and sends them to the drive unit based on the load type, operating requirements, and preset parameters. For example, for a motor load, the controller outputs a PWM (Pulse Width Modulation) signal with a specific frequency and duty cycle to control the motor's speed and direction.

[0087] Integrating drive signal output and fault detection functions into the controller reduces the number of independent control modules in the system, thereby lowering system complexity and cost. Simultaneously, this integrated design allows the controller to gain a more comprehensive understanding of the load's operating status, enabling more accurate control decisions.

[0088] Based on any of the aforementioned schemes, in one possible implementation scheme, a second diode is connected in parallel to the first and second ends of the load. The negative terminal of the second diode is electrically connected to the first end of the load, and the positive terminal of the second diode is electrically connected to the second end of the load.

[0089] For example, in this solution, the second diode serves as a freewheeling diode and is used to protect the switching transistor and other circuit components from damage caused by excessive voltage.

[0090] In one possible implementation scheme, based on any of the aforementioned schemes, the load is a power-adjustable load.

[0091] Figure 2 This is a schematic diagram of the load signal sampling unit structure in the embodiment, for reference. Figure 1 and Figure 2 Based on any of the aforementioned solutions, in one possible implementation, the load fault detection device includes:

[0092] The system includes a logic unit 100, a power signal sampling unit 200, a drive signal sampling unit 300, and a load signal sampling unit 400.

[0093] The power signal sampling unit 200 is electrically connected to the power supply terminal of the load 11 and is used for sampling the power signal of the power supply of the load 11.

[0094] The driving device for load 11 includes a driving chip U101 and a switching transistor Q101; the driving signal output terminal of the driving chip U101 is electrically connected to the control terminal of the switching transistor Q101 through a first resistor R101; the control terminal and the second terminal of the switching transistor Q101 are also connected in parallel with a second resistor R102.

[0095] A second diode D101 is connected in parallel to the first and second terminals of the load 11. The negative terminal of the second diode D101 is electrically connected to the first terminal of the load 11, and the positive terminal of the second diode D101 is electrically connected to the second terminal of the load.

[0096] The drive signal input terminal (A) of the driver chip U101 serves as the control signal terminal. The drive signal sampling unit 300 is electrically connected to the control signal terminal.

[0097] The power supply terminal is electrically connected to the first terminal of the switching transistor Q101 through the load 11, and the second terminal of the switching transistor Q101 is electrically connected to the reference terminal (ground); the first terminal of the switching transistor Q101 also serves as the sampling terminal (B).

[0098] The load signal sampling unit 400 includes a voltage divider sampling circuit and a first diode D102. The voltage divider sampling circuit includes a third resistor R103 and a fourth resistor R104. The first end of the third resistor R103 is electrically connected to the sampling end, and the connection point of the third resistor R103 and the fourth resistor R104 serves as the voltage divider sampling point (C).

[0099] The cathode of the first diode D102 is electrically connected to the 3V3 power supply terminal, and the anode of the first diode D102 is electrically connected to the voltage division sampling point of the voltage divider sampling circuit.

[0100] It also includes a controller U102, which is electrically connected to the drive signal input terminal, the voltage divider sampling point, and the sampling terminal of the power signal sampling unit 200.

[0101] In this design, R101 is the drive current-limiting resistor, and R102 is the pull-down resistor. Q101 is a MOSFET, and D101 is a freewheeling diode. Load 11 is an external load with an adjustable operating voltage from 0 to the supply voltage. R103 and R104 are used to sample the current-limiting signal, which is then clamped to the 3V power supply via D102.

[0102] In this scheme, controller U102 is configured as logic unit 100. Controller U102 outputs a load fault signal based on the logical operation results of power supply signal, drive signal, and operating status signal.

[0103] For example, in this solution, the controller U102 can be configured to determine whether the load has failed and the type of failure based on the logical relationship in Table 1.

[0104] Table 1

[0105]

[0106] In this scheme, the controller U102 is also configured to output a drive signal to the driver chip U101. The resistance values ​​of R101 and R102 are adjusted to limit the load capacity of Q101 so as not to cause damage due to overcurrent in a short period of time.

[0107] U102 adjusts the duty cycle of the drive signal output to U101. The duty cycle D is related to the operating voltage of the load 11. The rated operating voltage of the load = supply voltage V * D. For example, if the supply voltage is 80V and the rated operating voltage of the load is 24V, the duty cycle D is 24 / 80 = 30%.

[0108] The power output load operating voltage can be adjusted by regulating the duty cycle. It is suitable for various load power supply requirements across the entire operating voltage range.

[0109] In this solution, the controller U102 can be configured to determine whether there is a fault by detecting the C-point potential of the drive signal over multiple cycles, thus avoiding misjudgment due to system instability.

[0110] In this solution, the controller U102 can be configured to detect the duty cycle and frequency of the PWM and detect the load status within the maximum peak current range of the MOSFET.

[0111] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of the present invention is determined by the scope of the appended claims.

Claims

1. A load fault detection apparatus characterized by comprising: include: Logic unit, power signal sampling unit, drive signal sampling unit and load signal sampling unit; The power signal sampling unit is electrically connected to the power supply terminal of the load and is used for sampling the power signal of the power supply of the load. The drive signal sampling unit is electrically connected to the control signal terminal of the drive device of the load, and is used for sampling the drive signal of the drive device; The load signal sampling unit is electrically connected to the sampling terminal of the load and is used for sampling the working status signal of the load. The logic unit is electrically connected to the power signal sampling unit, the drive signal sampling unit, and the load signal sampling unit. The logic unit is used to output a load fault signal based on the logical operation results of the power signal, the drive signal, and the operating status signal. The load signal sampling unit includes at least a voltage divider sampling circuit and a first diode. The cathode of the first diode is electrically connected to the power supply terminal, and the anode of the first diode is electrically connected to the voltage divider sampling point of the voltage divider sampling circuit. The logic unit is electrically connected to the voltage divider sampling point, and the working status signal is obtained through the voltage divider sampling point.

2. The load fault detection apparatus of claim 1, wherein The driving device includes a driving chip and a switching transistor; The drive signal output terminal of the driver chip is electrically connected to the control terminal of the switching transistor, and the drive signal input terminal of the driver chip serves as the control signal terminal.

3. The load fault detection apparatus of claim 2, wherein The power supply terminal is electrically connected to the first terminal of the switching transistor through the load, and the second terminal of the switching transistor is electrically connected to the reference terminal; The first terminal of the switching transistor also serves as the sampling terminal.

4. The load fault detection apparatus of claim 1, wherein The logic unit includes logic operation circuits; When the power signal is 1, the drive signal is 0, and the working status signal is 0, the logic operation circuit outputs a first level signal; When the power signal is 1, the drive signal is 1, and the working status signal is 1, the logic operation circuit outputs a first level signal; When the power signal is 1, the drive signal is 1, and the working status signal is 0, the logic operation circuit outputs a second level signal; When the power signal is 1, the drive signal is 0, and the working status signal is 1, the logic operation circuit outputs a second level signal; The first level signal indicates that the load is faulty, and the second level signal indicates that the load is normal.

5. The load fault detection device as described in claim 1, characterized in that, It also includes a controller, which is connected to the logic unit; The controller is configured to receive logic operation signals output by the logic unit and determine the fault of the load based on the logic operation signals.

6. The load fault detection apparatus of claim 2, wherein The drive signal output terminal is electrically connected to the control terminal of the switching transistor through a first resistor; The control terminal and the second terminal of the switching transistor are also connected in parallel with a second resistor.

7. The load fault detection apparatus of claim 2, wherein The switching transistor includes a MOSFET or a bipolar transistor.

8. The load fault detection apparatus of claim 5, wherein, The controller is also used to output drive signals for the drive device.

9. The load fault detection apparatus of claim 1, wherein A second diode is connected in parallel to the first and second ends of the load. The negative terminal of the second diode is electrically connected to the first end of the load, and the positive terminal of the second diode is electrically connected to the second end of the load.

10. The load fault detection apparatus of claim 1, wherein The load is a power-adjustable load.

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