RS485 bus structure with address allocation function

Abstract

The utility model discloses an RS485 bus structure with an address allocation function. The RS485 bus structure comprises a main control module; a first slave control module, wherein the master control module is connected with the first slave control module; the second slave control module is connected with the first slave control module; and the third slave control module is connected with the second slave control module and the master control module. The problems that manual address allocation operation is tedious, the error rate is high, and an original address allocation protocol has strict requirements for slave hardware connection can be solved.

Description

Technical Field

[0001] This utility model relates to the field of RS485 bus technology, and in particular to an RS485 bus structure with address allocation function. Background Technology

[0002] Using RS485 to implement a bus architecture for communication between one master and multiple slave devices is a common existing technical solution. Because each slave device on the bus has a unique address number, address assignment is required during bus initialization. There are currently two methods for implementing address assignment:

[0003] Manual hardware allocation: Address allocation is performed manually via DIP switches or external screens;

[0004] The host assigns addresses to the slave devices sequentially using a communication protocol.

[0005] However, the existing allocation method has the following problems:

[0006] Manual address allocation requires installers to manually assign different addresses to each device. Once the number of slave devices increases, there is a risk of missing or conflicting slave addresses. Moreover, the operation is cumbersome and prone to errors.

[0007] If the host assigns addresses via a protocol, the slave communication interface must be fixed. It must receive from communication port 1 and send from communication port 2, which imposes strict restrictions on the installation and wiring methods of the slave. Utility Model Content

[0008] To overcome at least one of the defects described in the prior art, this utility model provides an RS485 bus structure with address allocation function. This solves the problems of cumbersome and error-prone manual address allocation operations, as well as the strict requirements of the original address allocation protocol on slave hardware connections.

[0009] The technical solution adopted by this utility model to solve its problem is:

[0010] An RS485 bus structure with address allocation function includes: a master control module; a first slave control module connected to the master control module; a second slave control module connected to the first slave control module; and a third slave control module connected to the second slave control module and the master control module.

[0011] Furthermore, the main control module has a main control 485A1 interface, a main control 485B1 interface, a main control first PWR+ interface, a main control first PWR- interface, a main control IPA interface, a main control IMA interface, a main control IPB interface, a main control IMB interface, a main control second PWR+ interface, a main control second PWR- interface, and a main control...

[0012] Furthermore, the first slave control module has a first slave control 485A1 interface, a first slave control 485B1 interface, a first slave control first PWR+ interface, a first slave control first PWR- interface, a first slave control IPA interface, a first slave control IMA interface, a first slave control 485A2 interface, a first slave control 485B2 interface, a first slave control second PWR+ interface, a first slave control second PWR- interface, a first slave control IPB interface, and a first slave control IMA interface; wherein, the master control 485A1 interface is connected to the first slave control 485A1 interface, the master control 485B1 interface is connected to the first slave control 485B1 interface, the master control first PWR+ interface is connected to the first slave control first PWR+ interface, the master control first PWR- interface is connected to the first slave control first PWR- interface, the master control IPA interface is connected to the first slave control IPA interface, and the master control IMA interface is connected to the first slave control IMA interface.

[0013] Furthermore, the second slave control module has a second slave control 485A1 interface, a second slave control 485B1 interface, a second slave control first PWR+ interface, a second slave control first PWR- interface, a second slave control IPA interface, a second slave control IMA interface, a second slave control 485A2 interface, a second slave control 485B2 interface, a second slave control second PWR+ interface, a second slave control second PWR- interface, a second slave control IPB interface, and a second slave control IMB interface; wherein, the first slave control 485B2 interface is connected to the second slave control 485A1 interface, the first slave control 485B2 interface is connected to the second slave control 485B1 interface, the first slave control second PWR+ interface is connected to the second slave control first PWR+ interface, the first slave control second PWR- interface is connected to the second slave control first PWR- interface, the first slave control IPB interface is connected to the second slave control IPA interface, and the first slave control IMB interface is connected to the second slave control IMA interface.

[0014] Furthermore, the third slave control module has a third slave control 485A1 interface, a third slave control 485B1 interface, a third slave control first PWR+ interface, a third slave control first PWR- interface, a third slave control IPA interface, a third slave control IMA interface, a third slave control 485A2 interface, a third slave control 485B2 interface, a third slave control second PWR+ interface, a third slave control second PWR- interface, a third slave control IPB interface, and a third slave control IMA interface; wherein, the second slave control 485A2 interface is connected to the third slave control 485A1 interface, the second slave control 485B2 interface is connected to the third slave control 485B1 interface, the second slave control second PWR+ interface is connected to the third slave control first PWR+ interface, the second slave control second PWR- interface is connected to the third slave control first PWR- interface, the second slave control IPB interface is connected to the third slave control IPA interface, and the second slave control IMA interface is connected to the third slave control IMA interface.

[0015] Furthermore, the third slave control 485A2 interface is connected to the master control 485A2 interface, the third slave control 485B2 interface is connected to the master control 485B2 interface, the third slave control second PWR+ interface is connected to the master control IPB interface, the third slave control second PWR- interface is connected to the master control second PWR- interface, the third slave control IPB interface is connected to the master control IPB interface, and the third slave control IMB interface is connected to the master control IMB interface.

[0016] In summary, the RS485 bus structure with address allocation function provided by this utility model has the following technical effects:

[0017] 1. In this invention, before the host assigns an address to the slave, it will actively redefine the communication port direction of the slave. After the redefinition is completed, the slave address will be assigned. The wiring sequence of the slave's communication port is ignored, eliminating the need for manual intervention, reducing the risk of human error, and providing more space for the overall structural design. Attached Figure Description

[0018] Figure 1 This is a structural block diagram of an embodiment of the present utility model;

[0019] The meanings of the reference numerals in the attached diagram are as follows: 1. Master control module; 2. First slave control module; 3. Second slave control module; 4. Third slave control module. Detailed Implementation

[0020] To better understand and implement this invention, the technical solutions in the embodiments of this invention will be clearly and completely described and discussed below with reference to the accompanying drawings. Obviously, what is described here is only a part of the examples of this invention, not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the protection scope of this invention.

[0021] To facilitate understanding of the embodiments of this utility model, further explanations and descriptions will be provided below with reference to the accompanying drawings and specific embodiments. These embodiments do not constitute a limitation on the embodiments of this utility model.

[0022] In the description of this utility model, it should be noted that the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0023] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

[0024] See Figure 1 This utility model discloses an RS485 bus structure with address allocation function: including a master control module 1, a first slave control module 2, a second slave control module 3 and a third slave control module 4, wherein the master control module 1 is connected to the first slave control module 2, the second slave control module 3 is connected to the first slave control module 2, and the third slave control module 4 is connected to the second slave control module 3 and the master control module 1.

[0025] Specifically, the main control module 1 has a main control 485A1 interface, a main control 485B1 interface, a main control first PWR+ interface, a main control first PWR- interface, a main control IPA interface, a main control IMA interface, a main control IPB interface, a main control IMA interface, a main control second PWR+ interface, a main control second PWR- interface, a main control 485A2 interface, and a main control 485B2 interface. The first slave control module 2 has a first slave control 485A1 interface, a first slave control 485B1 interface, a first slave control first PWR+ interface, a first slave control first PWR- interface, a first slave control IPA interface, a first slave control IMA interface, a first slave control 485A2 interface, and a first slave control 485B2 interface. The system comprises a master control 485A1 interface, a master control 485B ... The system includes an 85A1 interface, a second slave control 485B1 interface, a second slave control first PWR+ interface, a second slave control first PWR- interface, a second slave control IPA interface, a second slave control IMA interface, a second slave control 485A2 interface, a second slave control 485B2 interface, a second slave control second PWR+ interface, a second slave control second PWR- interface, a second slave control IPB interface, and a second slave control IMB interface; wherein, the first slave control 485B2 interface is connected to the second slave control 485A1 interface, the first slave control 485B2 interface is connected to the second slave control 485B1 interface, and the first slave control second PWR+ interface is connected to the second slave control first PWR+ interface. The first slave control second PWR- interface is connected to the second slave control first PWR- interface, the first slave control IPB interface is connected to the second slave control IPA interface, and the first slave control IMB interface is connected to the second slave control IMA interface; the third slave control module 4 has a third slave control 485A1 interface, a third slave control 485B1 interface, a third slave control first PWR+ interface, a third slave control first PWR- interface, a third slave control IPA interface, a third slave control IMA interface, a third slave control 485A2 interface, a third slave control 485B2 interface, a third slave control second PWR+ interface, a third slave control second PWR- interface, a third slave control IPB interface, and a third slave control IMB interface;Specifically, the second slave control 485A2 interface is connected to the third slave control 485A1 interface; the second slave control 485B2 interface is connected to the third slave control 485B1 interface; the second slave control second PWR+ interface is connected to the third slave control first PWR+ interface; the second slave control second PWR- interface is connected to the third slave control first PWR- interface; the second slave control IPB interface is connected to the third slave control IPA interface; and the second slave control IMB interface is connected to the third slave control IMA interface. The third slave control 485A2 interface is connected to the master control 485A2 interface; the third slave control 485B2 interface is connected to the master control 485B2 interface; the third slave control second PWR+ interface is connected to the master control IPB interface; the third slave control second PWR- interface is connected to the master control second PWR- interface; the third slave control IPB interface is connected to the master control IPB interface; and the third slave control IMB interface is connected to the master control IMB interface.

[0026] In summary, the RS485 bus structure with address allocation function provided by this utility model has the following technical effects:

[0027] 1. In this invention, before the host assigns an address to the slave, it will actively redefine the communication port direction of the slave. After the redefinition is completed, the slave address will be assigned. The wiring sequence of the slave's communication port is ignored, eliminating the need for manual intervention, reducing the risk of human error, and providing more space for the overall structural design.

[0028] The technical means disclosed in this utility model are not limited to those disclosed in the above embodiments, but also include technical solutions composed of any combination of the above technical features. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principle of this utility model, and these improvements and modifications are also considered within the scope of protection of this utility model.

Claims

1. A RS485 bus structure with address assignment function, characterized by, It comprises: a master control module; a first slave control module connected with the master control module; a second slave control module connected with the first slave control module; a third slave control module connected with the second slave control module and the master control module.

2. The RS485 bus structure with address assignment function according to claim 1, characterized in that, The master control module has a master control 485A1 interface, a master control 485B1 interface, a master control first PWR+ interface, a master control first PWR- interface, a master control IPA interface, a master control IMA interface, a master control IPB interface, a master control IMB interface, a master control second PWR+ interface, a master control second PWR- interface, a master control 485A2 interface and a master control 485B2 interface.

3. A RS485 bus structure with address assignment function according to claim 2, characterized in that, The first slave control module has a first slave control 485A1 interface, a first slave control 485B1 interface, a first slave control first PWR+ interface, a first slave control first PWR- interface, a first slave control IPA interface, a first slave control IMA interface, a first slave control 485A2 interface, a first slave control 485B2 interface, a first slave control second PWR+ interface, a first slave control second PWR- interface, a first slave control IPB interface and a first slave control IMB interface. The master control 485A1 interface is connected with the first slave control 485A1 interface, the master control 485B1 interface is connected with the first slave control 485B1 interface, the master control first PWR+ interface is connected with the first slave control first PWR+ interface, the master control first PWR- interface is connected with the first slave control first PWR- interface, the master control IPA interface is connected with the first slave control IPA interface, and the master control IMA interface is connected with the first slave control IMA interface.

4. The RS485 bus structure with address assignment function according to claim 3, characterized in that, The second slave control module has a second slave control 485A1 interface, a second slave control 485B1 interface, a second slave control first PWR+ interface, a second slave control first PWR- interface, a second slave control IPA interface, a second slave control IMA interface, a second slave control 485A2 interface, a second slave control 485B2 interface, a second slave control second PWR+ interface, a second slave control second PWR- interface, a second slave control IPB interface and a second slave control IMB interface. The first slave control 485B2 interface is connected with the second slave control 485A1 interface, the first slave control 485B2 interface is connected with the second slave control 485B1 interface, the first slave control second PWR+ interface is connected with the second slave control first PWR+ interface, the first slave control second PWR- interface is connected with the second slave control first PWR- interface, the first slave control IPB interface is connected with the second slave control IPA interface, and the first slave control IMB interface is connected with the second slave control IMA interface.

5. A RS485 bus structure with address assignment function according to claim 4, characterized in that, The third slave control module has a third slave control 485A1 interface, a third slave control 485B1 interface, a third slave control first PWR+ interface, a third slave control first PWR- interface, a third slave control IPA interface, a third slave control IMA interface, a third slave control 485A2 interface, a third slave control 485B2 interface, a third slave control second PWR+ interface, a third slave control second PWR- interface, a third slave control IPB interface and a third slave control IMB interface; The second slave control 485A2 interface is connected with the third slave control 485A1 interface, the second slave control 485B2 interface is connected with the third slave control 485B1 interface, the second slave control second PWR+ interface is connected with the third slave control first PWR+ interface, the second slave control second PWR- interface is connected with the third slave control first PWR- interface, the second slave control IPB interface is connected with the third slave control IPA interface, and the second slave control IMB interface is connected with the third slave control IMA interface.

6. The RS485 bus structure with address assignment function according to claim 2, characterized in that, The third slave control 485A2 interface is connected with the master control 485A2 interface, the third slave control 485B2 interface is connected with the master control 485B2 interface, the third slave control second PWR+ interface is connected with the master control IPB interface, the third slave control second PWR- interface is connected with the master control second PWR- interface, the third slave control IPB interface is connected with the master control IPB interface, and the third slave control IMB interface is connected with the master control IMB interface.

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