Multi-chip connection module, GPU (Graphics Processing Unit) accelerator card module and server

Abstract

The embodiment of the utility model provides a multi-chip connection module, a GPU acceleration card module and a server. The multi-chip connection module comprises a first board card which comprises a first surface and a second surface which are opposite to each other, and the first surface comprises a PCIE switching chip and a first connection port; the first connecting port and the PCIE switching chip are both connected with a mainboard connecting end on the second surface; the second board card comprises a third surface and a fourth surface which are opposite to each other, the third surface comprises at least two chip areas, and each chip area is used for accessing one GPU chip; the fourth surface comprises a second connecting port; each chip area is connected with a second connection port of the connector; and the first board card is connected with the second connecting port on the second board card in a matched manner through the first connecting port, so that different chip areas on the second board card are connected with the PCIE switching chip through the connector. According to the module, the computing power of a single GPU chip module can be improved.

Description

Technical Field

[0001] This application relates to the field of artificial intelligence, and specifically, provides a multi-chip connection module, a GPU accelerator card module, and a server. Background Technology

[0002] The computing power for artificial intelligence can be provided by GPUs (Graphics Processing Units) and Open Accelerator Modules (OAMs). However, as the demand for computing power for artificial intelligence increases, the requirements for GPU accelerator cards also increase, and the current computing power of GPU accelerator cards is insufficient to meet the demand.

[0003] Servers impose size limitations on GPU accelerator cards, resulting in a limited board size. Furthermore, GPU accelerator card modules require the installation of GPU chips and associated circuitry, such as power supply and communication circuits. This further restricts the space on a single accelerator card module board, typically allowing only a single GPU chip to be placed. Consequently, the computing power of a single accelerator card module is determined by the performance of that single GPU chip, making further improvements difficult. Utility Model Content

[0004] In view of this, the embodiments of this application aim to provide a multi-chip connection module, a GPU accelerator card module, and a server to improve the computing performance of the accelerator card module.

[0005] In a first aspect, embodiments of this application provide a multi-chip connection module, comprising: a first board, including a first surface and a second surface opposite to each other; the first surface includes a high-speed serial computer expansion bus standard PCIe switch chip and a first connection port, the first connection port being connected to the PCIe switch chip; both the first connection port and the PCIe switch chip are connected to a motherboard connection terminal on the second surface; a second board, including a third surface and a fourth surface opposite to each other; the third surface includes at least two chip regions, each chip region being used to connect to a GPU chip; the fourth surface includes a second connection port; each chip region is connected to the second connection port; the first board is connected to the second connection port on the second board through the first connection port, so that different chip regions on the second board are connected to the PCIe switch chip.

[0006] In this embodiment, two boards are configured. The first board houses interconnecting circuitry for multiple GPU chips, such as a PCIe switch chip. The second board has multiple chip areas for different GPU chips. The first and second boards are connected via a first connection port and a second connection port, allowing different GPU chips to connect to the PCIe switch chip on the first board and interact through the PCIe switch chip, thus enabling different GPU chips to work collaboratively. This module uses two boards, effectively increasing the module's area and allowing for the placement of more GPU chips and associated circuitry. The increased number of GPU chips enhances the computing power of a single module, effectively improving its performance.

[0007] In one embodiment, the multi-chip connection module further includes a connector, wherein the first connection port and the second connection port are respectively connected to different terminals of the connector, and the first connection port and the second connection port are connected through the connector.

[0008] In this embodiment, the first connection port on the first board and the second connection port on the second board are connected through different terminals of the connector, so that the first board and the second board can be detachably connected through the connector. This facilitates the production and transportation of the multi-chip connection module, and the detachable connection also facilitates troubleshooting and replacement, effectively improving the practicality of the multi-chip connection module.

[0009] In one embodiment, the first board meets the preset size requirements of the device motherboard, and the size of the second board is less than or equal to that of the first board.

[0010] In this embodiment, the first board is connected to the device via a motherboard connector. Different types of devices have different size requirements for the connected module, including the GPU chip. Therefore, the first board needs to meet a preset size requirement to be able to connect to the device. The second board, used to house the GPU chip, does not need to be directly connected to the device's motherboard. Therefore, the second board does not need to meet the preset size requirement. To avoid the second board being too large and causing problems, its size must be smaller than the first board's size so that the multi-chip connection module can be compatible with the device.

[0011] In one embodiment, the size of the second board is equal to the size of the first board.

[0012] In this embodiment, when the size of the second board is equal to the size of the first board, the area of ​​the second board can be maximized, thereby allowing for more circuitry to be set up to improve the performance of the multi-chip interconnect module.

[0013] In one embodiment, the multi-chip connection module is a GPU accelerator card module, and the preset size requirement includes the server's size requirement for the GPU accelerator card module.

[0014] In this embodiment, configuring the multi-chip connection module as a GPU accelerator card module enables the GPU accelerator card module to be equipped with multiple GPU chips, thereby improving the computing power of the GPU accelerator card module and meeting the computing needs of more scenarios.

[0015] In one embodiment, the second board includes a core power supply circuit, which is connected to the second connection port; the core power supply circuit is connected to the motherboard connection terminal of the first board through the first connection port and the second connection port, so as to supply power to the processing core of the GPU chip on each chip area through the motherboard connection terminal.

[0016] In this embodiment, the core power supply circuit is placed on the second board, so that the core power supply circuit can provide more stable power to the processing core of the GPU chip, thereby enabling the multi-chip connection module to increase the overall computing power performance of the module without affecting the computing performance of the GPU chip.

[0017] In one embodiment, the first board further includes an auxiliary power supply circuit, which is connected to the second connection port and also to the motherboard connection port, so as to access power through the motherboard connection port and supply power to other modules in the GPU chip of each chip area except for the processing core through the second connection port and the first connection port.

[0018] In this embodiment, the auxiliary power supply circuit is set on the first board, reducing the occupation of the second board. At the same time, it does not affect the GPU chip's execution of computing tasks. Furthermore, the second board can be equipped with more GPU chips or other circuits that help improve overall performance.

[0019] In one embodiment, the multi-chip connection module further includes a heat sink disposed on the third surface. After the heat sink, the first board, and the second board are connected in the vertical direction, the sum of their heights meets a preset height requirement.

[0020] Compared to a single-board module, the dual-board module provided in this application is taller. Therefore, the overall height of the module can be kept constant by reducing the height of the heatsink, thus meeting the preset height requirements. Compared to using a heatsink to cool a single GPU, firstly, because multiple chip areas are provided, with different GPU chips configured on different chip areas of the board, the areas requiring heat dissipation are distributed across different locations, reducing the heat flux density of the chips. The heatsink can simultaneously cool multiple locations, resulting in higher heat dissipation efficiency. Secondly, when the module performs the same task, because multiple GPU chips are present, they can share the task, allowing each GPU chip to perform the task with less computing power, thus reducing the power consumption of each GPU chip. For these two reasons, even if the height of the heatsink is reduced, the overall heat dissipation performance of the module will not decrease, and may even improve.

[0021] In one embodiment, the multi-chip connection module is a GPU accelerator card module, and the preset height requirement is a 4U structure height design requirement.

[0022] In this embodiment, the 4U structure height design requirement is the height requirement of the server for the GPU accelerator card. Setting the preset height requirement as the 4U structure height design requirement enables the multi-chip connection module to be configured as a GPU accelerator card module, thereby connecting to the server to perform tasks.

[0023] Secondly, embodiments of this application provide a GPU accelerator card module, including: a multi-chip connection module as described in any of the first aspects; and a plurality of GPU chips, respectively disposed in different chip regions of the multi-chip connection module.

[0024] Thirdly, embodiments of this application provide a server, including: a motherboard; a GPU accelerator card module, including a multi-chip connection module as described in any of the first aspects, the multi-chip connection module being connected to the motherboard; and a plurality of GPU chips, respectively disposed in different chip areas on the multi-chip connection module. Attached Figure Description

[0025] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0026] Figure 1 This is a schematic diagram of a via structure in the prior art;

[0027] Figure 2This is a three-dimensional schematic diagram of a multi-chip interconnect module provided in an embodiment of this application;

[0028] Figure 3 This is a double-sided schematic diagram of a second board provided in an embodiment of this application;

[0029] Figure 4 This is a double-sided schematic diagram of a first board provided in an embodiment of this application;

[0030] Figure 5 This is a schematic diagram of the connection of a heat sink provided in an embodiment of this application.

[0031] Icons: First board 100; PCIe switch chip 110; First connection port 120; Motherboard connection port 130; Second board 200; Chip area 210; Second connection port 220; Heatsink 300. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0033] First, this application provides a multi-chip connectivity module capable of connecting multiple GPU chips. In the embodiments of this application, the multi-chip connectivity module can be configured as a GPU accelerator card module, or as other modules requiring interconnection of multiple GPU chips; no limitation is imposed here.

[0034] Please see Figure 1 , Figure 1 This is a structural block diagram of a multi-chip interconnect module provided in one embodiment of this application.

[0035] The multi-chip connection module includes: a first board 100 and a second board 200.

[0036] Please see Figure 2 , Figure 2 This is a three-dimensional schematic diagram of a multi-chip interconnect module provided in an embodiment of this application. A first board 100 includes opposing first and second surfaces. For example, the first surface may be the upper surface of the first board 100, and the second surface may be the lower surface of the first board 100. A second board 200 also includes opposing third and fourth surfaces. Similarly, the third surface may be the upper surface of the second board 200, and the fourth surface may be the lower surface.

[0037] Please see Figure 3 , Figure 3This is a double-sided schematic diagram of a second board 200 provided in an embodiment of this application. In the embodiment of this application, the third surface includes at least two chip regions 210, each chip region 210 being used to connect a GPU chip; the fourth surface includes a second connection port 220; each chip region 210 is connected to the second connection port 220.

[0038] Different application scenarios have different requirements for module size. In some larger modules, the third surface of the second board 200 can be configured with more chip areas 210 to accommodate more GPU chips. Please refer to [link / reference]. Figure 2 , Figure 2 This is a three-dimensional schematic diagram of a multi-chip interconnect module provided in one embodiment of this application. For GPU accelerator card modules, due to size limitations imposed by servers and the size limitations of GPU chips produced by current manufacturing processes, the width of a single board can only accommodate 2 to 3 GPU chips. Combined with other supporting circuitry, a single GPU accelerator card module board typically can only accommodate two GPU chips. However, with optimizations in circuitry and GPU chip manufacturing processes, the size of GPU chips and the required circuit area have decreased, allowing a single board to accommodate three or more GPU chips. Therefore, the number of chip regions 210 and the number of GPU chips that can be configured should not be considered limitations of this application.

[0039] In this embodiment, the multi-chip interconnect module includes two boards, increasing the board area from the area of ​​a single board to the combined area of ​​two boards. This allows for the inclusion of more circuitry within the multi-chip interconnect module, transferring circuitry from one board to another. For example, where the GPU chip and its corresponding circuitry were originally on one board, the multi-chip interconnect module allows for the placement of two or more GPU chips on a single board (second board 200), with the corresponding circuitry transferred to another board (first board 100). This increases the board area, enabling the installation of more GPU chips and enhancing the overall computing power of the module.

[0040] The first board 100 and the second board 200 need to be connected to enable the transmission of high-speed chips and the supply of power to the GPU chip and other modules. Please refer to [link / reference]. Figure 4 , Figure 4This is a double-sided schematic diagram of a first board 100 provided in an embodiment of this application. In this embodiment, the first board 100 includes a first connection port 120, and the second board 200 includes a second connection port 220. The first board 100 can be connected to the second board 200 through the first connection port 120, thereby realizing the transmission of signals and data between the first board 100 and the second board 200.

[0041] In the embodiments of this application, the first connection port 120 is disposed on the first surface, and the second connection port 220 is disposed on the fourth surface of the second board 200. The first surface of the first board 100 is the upper surface, and the fourth surface of the second board 200 is the lower surface. That is, the upper surface of the first board 100 is connected to the lower surface of the fourth board. This connection structure allows the chip area 210 to be on the upper surface of the entire multi-chip connection module, thereby facilitating the installation and replacement of the GPU chip and helping to dissipate heat from the GPU chip.

[0042] Meanwhile, since the first board 100 is located at the bottom, it needs to be connected to the motherboard of the device. For example, when the multi-chip connection module is a GPU accelerator card module, the first board 100 of the GPU accelerator card module needs to be connected to the motherboard of the server. Therefore, in the embodiments of this application, a motherboard connection terminal is also provided on the second surface (i.e., the lower surface) of the first board 100 to connect to the motherboard of the device.

[0043] In some embodiments of this application, the multi-chip connection module further includes a connector, wherein the first connection port 120 and the second connection port 220 are respectively connected to different terminals of the connector, and the first connection port 120 and the second connection port 220 are connected by the connector.

[0044] In embodiments of this application, the first board 100 and the second board 200 can be fixedly connected or connected via a connector. The connector includes different terminals, such as male and female terminals, which mate to achieve a connection. In this embodiment, the first connection port 120 and the second connection port 220 can be connected to different terminals of the connector, such as fixing each pin of the first connection port 120 to each pin of the male terminal of the connector, and fixing each pin of the second connection port 220 to each pin of the female terminal of the connector. Thus, the first connection port 120 and the second connection port 220 can be connected via the male and female terminals of the connector. In other embodiments, the first connection port 120 can be connected to the female terminal, and the second connection port can be connected to the male terminal; this is not a limitation.

[0045] The connection between the first board 100 and the second board 200 is detachable via a connector, which facilitates the production and transportation of multi-chip modules. It also facilitates troubleshooting of multi-chip interconnect modules; for example, if any board malfunctions, a new board can be connected to the original board for troubleshooting.

[0046] PCIe is an interface standard for connecting internal computer hardware. The PCIe switch chip 110 is a data transmission chip inside the computer. It can convert and distribute the instructions transmitted by the CPU (Central Processing Unit) into instructions that can be executed by the GPU chip, and distribute them to different GPU chips, so that the CPU's instructions can be executed by different GPU chips.

[0047] In current GPU accelerator card modules, only a single GPU chip is typically used. Therefore, the GPU chip and CPU chip can be directly interconnected without the need for an additional PCIe switch chip 110 for conversion. However, in this application, the multi-chip connection module needs to connect at least two GPU chips. Therefore, a PCIe switch chip 110 is required to distribute CPU instructions to different GPU chips, enabling the different GPU chips to work collaboratively.

[0048] Therefore, in the embodiments of this application, the first surface includes a high-speed serial computer expansion bus standard PCIe switch chip 110, which is connected to the first connection port 120.

[0049] In this embodiment of the application, the first connection port 120 is connected to the PCIe switch chip 110; both the first connection port 120 and the PCIe switch chip 110 are connected to the motherboard connection terminal on the second surface.

[0050] In the embodiments of this application, the PCIe switch chip 110 on the first board 100 is connected to the first connection port 120 via internal wiring, and both the PCIe switch chip 110 and the first connection port 120 are connected to the motherboard connection port via internal wiring. The chip area 210 on the second board 200 is connected to the second connection port 220 via internal wiring, and then connected to the first connection port 120 via the second connection port 220, thus achieving the connection between the chip area 210, the motherboard connection port, and the PCIe switch chip 110. Therefore, the instructions output by the multi-chip connection module of the device motherboard can be transmitted to the GPU chip to control the execution of each GPU chip.

[0051] like Figure 2As shown in the embodiments of this application, the first board 100 is a lower-level board and the second board 200 is an upper-level board through the connection of the first connection port 120 and the second connection port 220. The first board 100 is used to connect to the motherboard of the device that needs to use the GPU chip. Therefore, the size of the first board 100 needs to meet the preset size requirements, wherein the preset size requirements are the size requirements of the device for the connected module.

[0052] For example, if the multi-chip connection module is a GPU accelerator card module used to connect to a server, then the preset size requirement includes the server's size requirement for the GPU accelerator card module. If the multi-chip connection module is another type of GPU chip module used to connect to other types of devices, the preset size requirement can also be the size requirement of other devices, and this is not limited here.

[0053] Meanwhile, to avoid the situation where the size of the connected multi-chip module is too large, the size of the second board 200 should be less than or equal to the size of the first board 100.

[0054] In real-world scenarios, the larger the board size and area of ​​the module, the more circuits can be installed to improve the module's performance. Therefore, in some embodiments, the size of the second board 200 can be equal to the size of the first board 100 to maximize the board area of ​​the multi-chip connection module, thereby allowing for the layout of more circuits and improving the performance of the multi-chip connection module.

[0055] The multi-chip connectivity module also includes a power supply circuit, which includes circuitry for powering the GPU chip and circuitry for powering the PCIe switch chip 110. In embodiments of this application, the circuitry for powering the PCIe switch chip 110 may be located on the first board 100.

[0056] GPU chips have high power requirements, especially the processing cores within the GPU chip, which require a stable power supply. Therefore, in the embodiments of this application, the power supply circuit of the GPU chip can be divided into a core power supply circuit and an auxiliary power supply circuit. The core power supply circuit refers to the circuit that supplies power to the processing cores in the GPU chip, while the auxiliary power supply circuit refers to the circuit that supplies power to other modules in the GPU chip besides the processing cores.

[0057] Then, the second board 200 includes a core power supply circuit, which is connected to the second connection port 220. The core power supply circuit connects to the motherboard connection terminal of the first board 100 through the first connection port 120 and the second connection port 220, so as to supply power to the processing core of the GPU chip on each chip area 210 through the motherboard connection terminal.

[0058] In this embodiment, a core power supply circuit is provided on the second board 200 to reduce the path distance between the core power supply circuit and the GPU chip, which helps to reduce the occurrence of abnormal situations, such as reducing the occurrence of unstable power supply voltage due to abnormal connection between the first connection port 120 and the second connection port 220. As a result, the core power supply circuit can stably supply power to the processing core of the GPU chip, enabling the GPU chip to stably execute computing tasks.

[0059] Accordingly, in one embodiment, the first board 100 further includes an auxiliary power supply circuit, which is connected to the second connection port 220 and also connected to the motherboard connection terminal to access power through the motherboard connection terminal and to supply power to other modules in the GPU chip of each chip region 210 except for the processing core through the second connection port 220 and the first connection port 120.

[0060] In this embodiment, the auxiliary power supply circuit is set on the first board 100, reducing the area occupied by the second board 200, thereby allowing more GPU chips to be set on the second board 200, or to set up circuits that help improve the performance of the GPU chips.

[0061] The specific circuit structures of the core power supply circuit and the auxiliary power supply circuit can be referenced from existing technologies or implemented using existing technologies, and will not be elaborated here.

[0062] Please see Figure 5 , Figure 5 This is a schematic diagram illustrating the connection between the heat sink 300 and the circuit board according to an embodiment of this application. The first circuit board 100 and the second circuit board 200 have a certain height. Compared to existing single-circuit board modules, the multi-chip connection module provided in this application has a higher height in the vertical direction. Therefore, to reduce the possibility of the multi-chip connection module being unable to connect to a device due to its increased height, this embodiment of the application further includes a heat sink 300. The heat sink 300 is disposed on a third surface. After the heat sink 300, the first circuit board 100, and the second circuit board 200 are connected in the vertical direction, the sum of their heights meets a preset height requirement. The heat sink 300 can be an air-cooled, liquid-cooled, or semiconductor-cooled heat sink, etc., and is not limited here. Specific details can be found in the prior art.

[0063] When GPU chips operate under high load, they generate a lot of heat, which is usually dissipated by a heat sink 300. In this embodiment, the height of the heat sink 300 can be adjusted to reduce the height of the heat sink 300, so that the overall height of the heat sink 300, the first board 100, and the second board 200 remains unchanged, thus meeting the preset height requirements of the device, including the GPU chip module.

[0064] For example, in some embodiments, if the multi-chip connection module is a GPU accelerator card module, the preset height requirement is a 4U structural height design requirement. The 4U structural height is the height requirement of the server for the GPU accelerator card, and the specifics can be found in existing technologies, which will not be elaborated here. By adjusting the height of the heat sink 300, the overall GPU accelerator card module can meet the 4U structural height requirement, thereby enabling the GPU accelerator card module to be connected to the server like an existing single-layer board module.

[0065] Although the multi-chip connection module provided in this application reduces the height of the heat sink 300, the overall heat dissipation capacity of the multi-chip connection module will not decrease significantly, and may even improve the heat dissipation performance to a certain extent.

[0066] On the one hand, this application places multiple GPU chips on the upper surface of the second board 200, and the heat sink 300 can simultaneously dissipate heat from multiple GPU chips, which is equivalent to achieving simultaneous heat dissipation from multiple areas. Compared with the existing single-board, single-GPU-chip structure, which can only perform single-point heat dissipation, multi-area heat dissipation can significantly improve heat dissipation capacity and reduce the heat flux density of the chip.

[0067] On the other hand, when performing the same task, the multi-GPU chip architecture can distribute the task to different GPU chips for execution, with each GPU consuming less power and generating less heat, while the single-GPU chip architecture can only be executed by a single GPU chip, which will generate more power consumption and heat.

[0068] For both reasons mentioned above, the multi-chip connectivity module generates less heat and has better heat dissipation performance when performing the same task. Furthermore, due to the presence of multiple GPU chips, this multi-chip connectivity module can perform tasks with higher computing power requirements after connecting multiple GPU chips, supporting designs with higher power consumption limits.

[0069] In this embodiment, two boards are configured. The first board 100 has interconnecting circuitry for multiple GPU chips, such as a PCIe switch chip 110. The second board 200 has multiple chip areas 210 for different GPU chips. The first board 100 and the second board 200 are connected via a first connection port 120 and a second connection port 220. This allows different GPU chips to connect to the PCIe switch chip 110 on the first board 100 through the first and second connection ports 120 and 220, enabling interaction and collaborative operation between the different GPU chips. This module uses two boards, effectively increasing the module's area and allowing for the placement of more GPU chips and associated circuitry. The increased number of GPU chips increases the computing power of a single module, effectively improving its performance.

[0070] Based on the same inventive concept, this application also provides a GPU accelerator card module, which may include the multi-chip connection module and multiple GPU chips provided in the foregoing embodiments, with the multiple GPU chips respectively disposed in different chip areas 210 of the multi-chip connection module.

[0071] An example GPU accelerator card module is provided herein for illustration, but this example should not be construed as limiting this application.

[0072] The GPU accelerator card module includes: a first board 100 and a second board 200.

[0073] The second board 200 includes two chip regions 210, a second connection port 220, and a core power supply circuit. The core power supply circuit is connected to each chip region 210, and the core power supply circuit and chip regions 210 are connected to the second connection port 220. Each chip region 210 is equipped with a GPU chip, and the GPU chip is connected to the second connection port 220 through the chip region 210. The second connection port 220 can be a terminal of a connector.

[0074] The first surface of the first board 100 includes a PCIe switching chip 110, a first connection port 120, and an auxiliary power supply circuit. The second surface includes a motherboard connection terminal. The PCIe switching chip 110 and the first connection port 120 are connected to the motherboard connection terminal. The auxiliary power supply circuit is connected to both the first connection port 120 and the motherboard connection terminal. The first connection port 120 is connected to the other terminal of a connector.

[0075] The first board 100 and the second board 200 are connected through the cooperation of different terminals of the connector, so that the GPU chip is connected to the PCIe switch chip 110 for signal transmission, and the core power supply circuit is connected to the motherboard connection terminal for power supply.

[0076] The first board 100 and the second board 200 are the same size and both meet the server's requirements for the board size in the GPU accelerator card module.

[0077] The GPU accelerator card module also includes a heatsink 300, which is connected to the first board 100 and the second board 200. The overall height meets the design requirements of a 4U structure.

[0078] Based on the same inventive concept, embodiments of this application also provide a server, the server comprising:

[0079] Motherboard, GPU accelerator card module and multiple GPU chips.

[0080] The GPU accelerator card module includes the multi-chip connection module provided in any of the foregoing embodiments. The multi-chip connection module is connected to the motherboard through the motherboard connection terminal on the second surface of the first board 100.

[0081] Multiple GPU chips are respectively located in different chip areas 210 on the multi-chip connection module.

[0082] The motherboard can also be used to install CPU, power module, communication module, etc., without any restrictions.

[0083] The above embodiments can be combined with each other without conflict to obtain new embodiments, and these combined embodiments are also within the protection scope of this application.

[0084] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0085] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or device. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or device that includes said element.

Claims

1. A multi-chip interconnect module, characterized in that, include: The first board includes a first surface and a second surface opposite to each other. The first surface includes a high-speed serial computer expansion bus standard PCIe switch chip and a first connection port. The first connection port is connected to the PCIe switch chip. Both the first connection port and the PCIe switch chip are connected to the motherboard connection terminal on the second surface. The second board includes a third surface and a fourth surface opposite to each other. The third surface includes at least two chip regions, each of which is used to connect a GPU chip. The fourth surface includes a second connection port. Each chip region is connected to the second connection port. The first board connects to the second board via the first connection port, so that different chip areas on the second board can be connected to the PCIe switching chip.

2. The multi-chip interconnect module according to claim 1, characterized in that, The multi-chip connection module further includes a connector, wherein the first connection port and the second connection port are respectively connected to different terminals of the connector, and the first connection port and the second connection port are connected through the connector.

3. The multi-chip interconnect module according to claim 1, characterized in that, The first board meets the preset size requirements, and the size of the second board is less than or equal to that of the first board.

4. The multi-chip interconnect module according to claim 3, characterized in that, The size of the second board is equal to the size of the first board.

5. The multi-chip interconnect module according to claim 3, characterized in that, The multi-chip connection module is a GPU accelerator card module, and the preset size requirements include the server's size requirements for the GPU accelerator card module.

6. The multi-chip interconnect module according to claim 1, characterized in that, The second board includes a core power supply circuit, which is connected to the second connection port. The core power supply circuit is connected to the motherboard of the first board through the first connection port and the second connection port, so as to supply power to the processing core of the GPU chip on each chip area through the motherboard connection port.

7. The multi-chip interconnect module according to claim 6, characterized in that, The first board also includes an auxiliary power supply circuit, which is connected to the second connection port and also to the motherboard connection port, so as to access power through the motherboard connection port and supply power to other modules in the GPU chip of each chip area except for the processing core through the second connection port and the first connection port.

8. The multi-chip interconnect module according to any one of claims 1-7, characterized in that, The multi-chip connection module further includes a heat sink, which is disposed on the third surface. After the heat sink, the first board, and the second board are connected in the vertical direction, the sum of their heights meets a preset height requirement.

9. The multi-chip interconnect module according to claim 8, characterized in that, The multi-chip connection module is a GPU accelerator card module, and the preset height requirement is a 4U structure height design requirement.

10. A GPU accelerator card module, characterized in that, include: The multi-chip connectivity module as described in any one of claims 1-9; Multiple GPU chips are respectively located in different chip areas of the multi-chip connection module.

11. A server, characterized in that, include: Motherboard; The GPU accelerator card module includes a multi-chip connection module as described in any one of claims 1-9, wherein the multi-chip connection module is connected to the motherboard; Multiple GPU chips are respectively located in different chip areas on the multi-chip connection module.

Images