Dense grid line structure of solar cell
By adjusting the grid line structure of the solar cell, and using a first grid line with a disconnected and staggered arrangement and a second grid line with an added loop, the problems of shading area and silver paste consumption caused by the increase in the number of grid lines were solved, resulting in a denser grid line design and improved current collection efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- HUAIAN JIETAI NEW ENERGY TECHNOLOGY CO LTD
- Filing Date
- 2025-05-14
- Publication Date
- 2026-05-08
AI Technical Summary
Increasing the number of grid lines leads to a decrease in on-state voltage, an increase in silver paste consumption, and an increase in the shading area, making it impossible to achieve the expected result of a denser grid line design.
Adjust the gate line structure layout so that the first sub-gates between the main gates are disconnected to form a gap area and are staggered, and add a second sub-gate parallel to the main gate direction to form a loop, thereby reducing the contact area between a single first sub-gate and the silicon substrate.
It achieves a denser grid design, reduces the shading area and silver paste usage, reduces metal composites, reduces on-state voltage loss, and improves current collection efficiency and welding reliability.
Smart Images

Figure CN224218758U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of solar cells, and in particular to a dense grid structure for solar cells. Background Technology
[0002] In solar cell manufacturing, increasing the number of grid lines typically shortens the current collection path and reduces contact resistance, thereby improving conversion efficiency. However, increasing the number of grid lines leads to increased metal recombination, resulting in reduced on-state voltage. When the number of grid lines exceeds a certain threshold, the loss from reduced on-state voltage outweighs the gains from improved short-circuit current and fill power, leading to a decrease in module power and failure to meet design expectations. Furthermore, increasing the number of grid lines increases the shading area, affecting light collection; metal recombination increases with the contact area, further reducing on-state voltage. It also increases silver paste consumption, meaning the efficiency gains may not offset the increased cost due to higher silver paste consumption. Therefore, simply increasing the number of grid lines is no longer sufficient to achieve the desired denser grid design. Utility Model Content
[0003] In order to reduce the negative impacts of reduced on-state voltage, increased silver paste consumption, and increased shading area caused by the increase in the number of grid lines, this application provides a dense grid line structure for solar cells.
[0004] In a first aspect, this application provides a dense grid line structure for a solar cell, employing the following technical solution:
[0005] A dense grid structure for a solar cell includes multiple main grids spaced apart on a silicon substrate and multiple first sub-grids perpendicular to the main grids. The first sub-grids have multiple discontinuous spacing regions along their length. The spacing regions between adjacent first sub-grids are staggered. There are at least two second sub-grids between two adjacent first sub-grids for forming a loop. The second sub-grids are parallel to the length direction of the main grids.
[0006] By adopting the above technical solution and adjusting the structural layout of the gate lines, the first sub-gates between the main gates are disconnected to form a gap area and are staggered, and a second sub-gate parallel to the main gate direction is added to form a loop. This reduces the contact area between a single first sub-gate and the silicon substrate. After the number of gate lines increases to a certain extent, the light-shielding area and the amount of silver paste used can be reduced. The reduced contact area between the gate lines and the silicon substrate reduces metal recombination and lowers on-state voltage loss, enabling a denser gate line design.
[0007] Optionally, the length S1 of the spacing region on the first sub-gate is 3-1 mm.
[0008] Optionally, the spacing regions on adjacent first sub-gates in the vertical direction are staggered and the spacing regions are distributed relative to the center line of the main gate.
[0009] Optionally, the distance between two adjacent first sub-gates is the same as the length of the second sub-gate, the length of which is 0.8-1.15 mm.
[0010] Optionally, the silicon substrate includes a front side and a back side disposed opposite to each other, wherein a portion of the first sub-gate on the front side of the silicon substrate is a continuous gate line structure, and the partially continuous first sub-gates are disposed at equal intervals on the front side of the silicon substrate.
[0011] By adopting the above technical solution, the conventional continuous gate line structure is retained on the first sub-gate on the front side of the silicon substrate to ensure the effect of laser-assisted sintering.
[0012] Optionally, the main grids are arranged at equal intervals, and the number of main grids is 10-20, with a width of 30-70μm.
[0013] Optionally, both ends of the main grid and the two ends that are disconnected in the middle are equipped with harpoons, and the opening spacing of the harpoons is 1.53-2.83mm.
[0014] Optionally, it also includes outer frame lines located at both ends of the first sub-gate and pads located on the main gate, wherein the pads on the front side of the silicon substrate are staggered with the pads on the back side of the silicon substrate.
[0015] By adopting the above technical solution, the "harpoon" refers to an expanded structure resembling a harpoon at the end of the main or sub-grid during the printing process. This is typically used to increase the contact area between the electrode and the solar cell, reduce contact resistance, and thus improve current collection efficiency. Simultaneously, the harpoon structure also facilitates better bonding with the solder strip during subsequent welding, improving the strength and reliability of the weld.
[0016] In the photovoltaic (PV) screen printing industry, solder pads refer to specific areas on the busbar used for welding the solder ribbon to the solar cell. In terms of shape and location, busbar solder pads are generally located at specific positions on the busbar, such as at both ends or in the middle. Their shape can be rectangular, circular, elliptical, etc., depending on the solar cell design and welding process requirements. Solder pads typically possess good solderability and sufficient mechanical strength to ensure a good electrical connection and a strong mechanical bond between the solder ribbon and the solar cell. Their presence allows current to be effectively transferred to other solar cells or external circuits when solar cells are connected in series or parallel, making them a crucial part of achieving the electrical performance and mechanical stability of PV modules.
[0017] In summary, this application has the following beneficial effects:
[0018] 1. By adjusting the structural layout of the gate lines, the first sub-gates between the main gates are disconnected to form a gap area and are staggered, and a second sub-gate parallel to the main gate direction is added to form a loop. This reduces the contact area between a single first sub-gate and the silicon substrate. After the number of gate lines increases to a certain extent, it can also reduce the light-shielding area and the amount of silver paste used. Due to the reduced contact area between the gate lines and the silicon substrate, metal recombination is reduced, the on-state voltage loss is reduced, and a denser gate line design can be achieved. Attached Figure Description
[0019] Figure 1 This is a diagram of the grid line structure on the back side of the silicon substrate of the solar cell in Embodiment 1 of this application.
[0020] Figure 2 This is a grid line structure diagram of the front side of the silicon substrate of the solar cell in Embodiment 1 of this application.
[0021] Figure 3 The grid line structure on the front side of the silicon substrate of the solar cell in Embodiment 1 of this application is in Figure 2 A magnified view of a portion of point A in the middle.
[0022] Figure 4 This is a grid line structure diagram of the front or back side of the silicon substrate of the solar cell in Comparative Example 1.
[0023] Figure 5 For Comparative Example 1, the grid structure on the front or back of the silicon substrate of the solar cell is shown in... Figure 4 A magnified view of a section at point B.
[0024] Explanation of reference numerals in the attached diagram: 1. Main gate; 2. First sub-gate; 21. Spacing area; 3. Second sub-gate; 4. Harpoon; 5. Outer frame line; 6. Pad; 7. Fine sub-gate. Detailed Implementation
[0025] The following is in conjunction with the appendix Figure 1-4 This application will be described in further detail.
[0026] Example 1
[0027] This application discloses a dense grid line structure for solar cells.
[0028] Reference Figure 1 and Figure 2 A dense grid structure for a solar cell includes multiple main grids 1 spaced apart and vertically arranged on the front or back side of a silicon substrate. The number of main grids 1 can be 10-20, and in this embodiment, the number of main grids 1 is 16. The main grids 1 are equally spaced apart, and the spacing between adjacent main grids 1 is 10.8±0.15mm. The width of the main grid 1 can be 30-70μm, and in this embodiment, the width of the main grid 1 is 40μm.
[0029] Reference Figure 2and Figure 3 On the front or back of the silicon substrate, there are also multiple first sub-gates 2 perpendicular to the main gate 1 and second sub-gates 3 parallel to the main gate 1. The first sub-gates 2 are horizontally arranged. The first sub-gates 2 on the front of the silicon substrate are continuous gate lines. The remaining first sub-gates 2 on the front of the silicon substrate and the first sub-gates 2 on the back of the silicon substrate are all equipped with multiple discontinuous spacing regions 21. The spacing regions 21 are spaced apart along the length direction of the first sub-gates 2, and the spacing regions 21 between adjacent first sub-gates 2 are staggered in the vertical direction. The spacing regions 21 are distributed on both sides of the main gate 1. The length S1 of the spacing region 21 on the first sub-gate 2 is 3-1mm, and in this embodiment it is 2mm. The second sub-gate 3 is used to connect two adjacent first sub-gates 2 to form a loop. The length of the second sub-gate 3 is the same as the distance between two adjacent first sub-gates 2. The length of the second sub-gate 3 on the front of the silicon substrate is 1.057mm, and the length of the second sub-gate 3 on the back of the silicon substrate is 1.045mm.
[0030] The light-blocking area of the first sub-gate 2 and the second sub-gate 3 is 786 mm². 2 The silver paste consumption for printing is 67mg / tablet.
[0031] The main gate 1 has harpoons 4 at both ends and the two ends that are broken in the middle. The opening spacing of the harpoons 4 is 2.18mm. The front and back sides of the silicon substrate are provided with outer frame lines 5. The outer frame lines 5 are located outside the two ends of the first sub-gate 2 and are continuous gate lines. Multiple pads 6 are also fixed at intervals on the main gate 1. The position of the pads 6 on the front side of the silicon substrate does not coincide with the position of the pads 6 on the back side of the silicon substrate.
[0032] The implementation principle of a dense grid structure for a solar cell according to an embodiment of this application is as follows: By adjusting the layout of the first sub-grid 2 and the second sub-grid 3, the first sub-grid 2 between the main grid 1 is staggered and disconnected, and the vertical second sub-grid 3 is increased to form a loop. A portion of conventional continuous grid lines are retained on the front side to ensure the effect of laser-assisted sintering. This reduces the printing length of a single first sub-grid 2, thereby reducing the contact area between the grid line and the solar cell, and reducing the shading area and the amount of silver paste used. The reduced contact area between a single grid line and the solar cell, the reduction of metal composites, and the decrease in open-circuit voltage loss allow for a denser grid line design.
[0033] Comparative Example 1
[0034] Reference Figures 4-5 A dense grid structure for a solar cell differs from Embodiment 1 in that multiple spaced main grids 1 and fine sub-grids 7 perpendicular to the main grids 1 are provided on both the front and back sides of the silicon substrate. Both the main grids 1 and the fine sub-grids 7 are continuous grid lines. The number of fine sub-grids 7 on the back side of the silicon substrate is less than that on the front side, and the pads 6 on the back side of the silicon substrate do not overlap with the pads 6 on the front side. The light-shielding area of the fine sub-grids 7 in Comparative Embodiment 1 is 829 mm².2 The silver paste consumption for printing is 70mg / tablet.
[0035] Performance testing experiment
[0036] The batteries of Example 1 and Comparative Example 1 were subjected to performance testing, and the electrical performance test parameters are shown in Table 1.
[0037] Table 1
[0038]
[0039] Tests showed that the light-blocking area of the secondary grid in Comparative Example 1 was 829 mm². 2 The silver paste consumption for printing is 70 mg / sheet, while the light-shielding area of the first and second sub-gates in Example 1 is 786 mm². 2 The printing silver paste consumption is 67mg / piece, the light-blocking area is reduced by 5.2%, and the silver paste consumption is reduced by 4.3%.
[0040] The conversion efficiency of the solar cell in Example 1 is 0.002% lower than that of Comparative Example 1, and the efficiencies are basically the same. However, Example 1 shows an increase of 0.26mV in turn-on voltage, an increase of 9mA in current, and a decrease of 0.1% in fill power. The performance parameters of the electrical cells are consistent with the decrease in the sub-busbar printing area (light-shielding area).
[0041] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.
Claims
1. A dense grid line structure for a solar cell, characterized in that: It includes multiple main gates (1) spaced on a silicon substrate and multiple first sub-gates (2) perpendicular to the main gates (1), and the first sub-gates (2) have multiple broken intervals (21) along their length direction. The intervals (21) between adjacent first sub-gates (2) are staggered. There are at least two second sub-gates (3) between two adjacent first sub-gates (2) for forming a loop. The second sub-gates (3) are parallel to the length direction of the main gates (1). The spacing regions (21) on the adjacent first sub-gates (2) in the vertical direction are staggered and the spacing regions (21) are distributed relative to the center line of the main gate (1).
2. The dense grid structure of a solar cell according to claim 1, characterized in that: The length S1 of the spacing region (21) on the first sub-gate (2) is 3-1mm.
3. The dense grid structure of a solar cell according to claim 1, characterized in that: The distance between two adjacent first sub-gates (2) is the same as the length of the second sub-gate (3), the length of which is 0.8-1.15mm.
4. The dense grid line structure of a solar cell according to claim 3, characterized in that: The silicon substrate includes a front side and a back side disposed opposite to each other. The portion of the first sub-gate (2) on the front side of the silicon substrate is a continuous gate line structure, and the partially continuous first sub-gate (2) is disposed at equal intervals on the front side of the silicon substrate.
5. The dense grid structure of a solar cell according to claim 1, characterized in that: The main grids (1) are arranged at equal intervals, and the number of main grids (1) is 10-20, and the width of the main grids (1) is 30-70μm.
6. The dense grid structure of a solar cell according to claim 1, characterized in that: The main gate (1) is equipped with harpoons (4) at both ends and the two ends that are broken in the middle, and the opening spacing of the harpoons (4) is 1.53-2.83mm.
7. A dense grid line structure for a solar cell according to claim 5, characterized in that: It also includes outer frame lines (5) located at both ends of the first sub-gate (2) and pads (6) located on the main gate (1), wherein the pads (6) on the front side of the silicon substrate and the pads (6) on the back side of the silicon substrate are staggered.