A voltage clamping circuit and an HVDC power supply system

Abstract

This utility model discloses a voltage clamping circuit and an HVDC power supply system. The voltage clamping circuit includes a first transistor, a second transistor, a first resistor, a second resistor, a third resistor, and at least one voltage regulator. The first terminal of the first transistor is electrically connected to the first terminal of the second resistor, serving as a first terminal. The control terminal of the first transistor is electrically connected to the second terminal of the second resistor, the first terminal of the third resistor, and the first terminal of the second transistor. The control terminal of the second transistor is electrically connected to the first terminal of the first resistor, and the second terminal of the second transistor is electrically connected to the second terminal of the first resistor and the second terminal of the third resistor, serving as a second terminal. At least one voltage regulator is connected between the second terminal of the first transistor and the first terminal of the first resistor. The first terminal is electrically connected to the positive busbar, and the second terminal is electrically connected to the ground terminal, or the second terminal is electrically connected to the negative busbar, and the first terminal is electrically connected to the ground terminal.

Description

Technical Field

[0001] This utility model relates to the field of high voltage DC system technology, and in particular to a voltage clamping circuit and an HVDC power supply system. Background Technology

[0002] With increasing demands for energy efficiency and advancements in power electronics technology, High Voltage Direct Current (HVDC) power supply systems are gradually becoming the mainstream power supply solution in data centers, industrial power supplies, and high-power applications due to their advantages of low transmission loss, high power density, and ease of integration with renewable energy sources. Compared to traditional AC power supply systems, HVDC power supply systems significantly reduce system complexity and energy loss by eliminating multiple AC-DC conversion stages, making them particularly suitable for long-distance power transmission and high-power load scenarios.

[0003] In HVDC power supply systems, the insulation resistance of the load to ground causes a shift in the neutral potential, which in turn leads to an increase in the voltage between the positive and negative busbars and ground, further increasing the requirements for safety distances. Therefore, how to reduce safety distances while ensuring electrical safety has become an urgent problem to be solved in the design of high-voltage DC power supply systems. Utility Model Content

[0004] This utility model provides a voltage clamping circuit and an HVDC power supply system to solve the problem of how to reduce the safety distance in a high-voltage DC power supply system while ensuring electrical safety.

[0005] In a first aspect, this utility model provides a voltage clamping circuit for use in an HVDC power supply system, comprising: a first transistor, a second transistor, a first resistor, a second resistor, a third resistor, and at least one voltage regulator.

[0006] The first terminal of the first transistor is electrically connected to the first terminal of the second resistor, serving as the first terminal of the voltage clamping circuit. The control terminal of the first transistor is electrically connected to the second terminal of the second resistor, the first terminal of the third resistor, and the first terminal of the second transistor.

[0007] The control terminal of the second transistor is electrically connected to the first terminal of the first resistor, and the second terminal of the second transistor is electrically connected to the second terminal of the first resistor and the second terminal of the third resistor, serving as the second terminal of the voltage clamping circuit;

[0008] The at least one voltage regulator is connected between the second terminal of the first transistor and the first terminal of the first resistor;

[0009] Wherein, the first terminal is electrically connected to the positive bus of the HVDC power supply system, and the second terminal is electrically connected to the grounding terminal, or the second terminal is electrically connected to the negative bus of the HVDC power supply system, and the first terminal is electrically connected to the grounding terminal.

[0010] In one possible implementation, the first transistor is a first bipolar junction transistor (BJT), the control terminal of the first BJT is the base, the first terminal of the first BJT is the collector, and the second terminal of the first BJT is the collector.

[0011] In one possible implementation, the voltage regulator is a Zener diode, and the first transistor is a PNP transistor;

[0012] In the case of including a Zener diode, the anode of the Zener diode is electrically connected to the emitter of the PNP transistor, and the cathode of the Zener diode is electrically connected to the first terminal of the first resistor;

[0013] In the case of at least two Zener diodes, the at least two Zener diodes are connected in series, the cathode of the first-stage Zener diode is electrically connected to the anode of the second-stage Zener diode, the anode of the first-stage Zener diode is electrically connected to the emitter of the PNP transistor, and the cathode of the last-stage Zener diode is electrically connected to the first terminal of the first resistor.

[0014] In one possible implementation, the voltage regulator is a Zener diode, and the first transistor is an NPN transistor;

[0015] In the case of including a Zener diode, the cathode of the Zener diode is electrically connected to the emitter of the NPN transistor, and the anode of the Zener diode is electrically connected to the first terminal of the first resistor;

[0016] In the case of at least two Zener diodes, the at least two Zener diodes are connected in series, the cathode of the first Zener diode is electrically connected to the anode of the second Zener diode, the cathode of the last Zener diode is electrically connected to the emitter of the NPN transistor, and the anode of the first Zener diode is electrically connected to the first terminal of the first resistor.

[0017] In one possible implementation, the first transistor is a first MOSFET, the control terminal of the first MOSFET is the gate, the first terminal of the first MOSFET is the drain, and the second terminal of the first MOSFET is the source.

[0018] In one possible implementation, the voltage regulator is a Zener diode, and the first MOSFET is a P-type MOSFET;

[0019] In the case of including a Zener diode, the anode of the Zener diode is electrically connected to the source of the P-type MOSFET, and the cathode of the Zener diode is electrically connected to the first terminal of the first resistor;

[0020] In the case of at least two Zener diodes, the at least two Zener diodes are connected in series, the cathode of the first-stage Zener diode is electrically connected to the anode of the second-stage Zener diode, the anode of the first-stage Zener diode is electrically connected to the source of the P-type MOSFET, and the cathode of the last-stage Zener diode is electrically connected to the first terminal of the first resistor.

[0021] In one possible implementation, the voltage regulator is a Zener diode, and the first MOSFET is an N-type MOSFET;

[0022] In the case of including a Zener diode, the cathode of the Zener diode is electrically connected to the source of the N-type MOSFET, and the anode of the Zener diode is electrically connected to the first terminal of the first resistor;

[0023] In the case of at least two Zener diodes, the at least two Zener diodes are connected in series, the cathode of the first Zener diode is electrically connected to the anode of the second Zener diode, the cathode of the last Zener diode is electrically connected to the source of the N-type MOSFET, and the anode of the first Zener diode is electrically connected to the first terminal of the first resistor.

[0024] In one possible implementation, the second transistor is a second triode, the control terminal of the second triode is the base, the first terminal of the second triode is the collector, and the second terminal of the second triode is the emitter.

[0025] In one possible implementation, the second transistor is a second MOSFET, the control terminal of the second MOSFET is the gate, the first terminal of the second MOSFET is the drain, and the second terminal of the second MOSFET is the source.

[0026] In one possible implementation, when the first terminal is electrically connected to the positive bus of the HNDC power supply system and the second terminal is electrically connected to the ground terminal, the circuit further includes a first diode;

[0027] The anode of the first diode serves as the first terminal, and the cathode of the first diode is electrically connected to the first terminal of the first transistor and the first terminal of the second resistor.

[0028] In one possible implementation, when the second terminal is electrically connected to the negative bus of the HVDC power supply system and the first terminal is electrically connected to the ground terminal, the circuit further includes a second diode.

[0029] The cathode of the second diode serves as the second terminal, and the anode of the second diode is electrically connected to the second terminal of the first resistor, the second terminal of the second transistor, and the second terminal of the third resistor.

[0030] In a second aspect, this utility model provides an HVDC power supply system, including at least two voltage clamping circuits as described in any of the first aspects;

[0031] For each voltage clamping circuit:

[0032] The voltage clamping circuit is connected between the positive bus and the grounding terminal of the HVDC power supply system. The voltage clamping circuit is used to clamp the positive bus voltage to ground within a first preset range; or

[0033] The voltage clamping circuit is connected between the negative busbar and the grounding terminal of the HVDC power supply system. The voltage clamping circuit is used to clamp the voltage of the negative busbar to ground within a second preset range.

[0034] The beneficial effects of this utility model are as follows:

[0035] This utility model discloses a voltage clamping circuit and an HVDC power supply system. The voltage clamping circuit is applied to an HVDC system and includes a first transistor, a second transistor, a first resistor, a second resistor, a third resistor, and at least one voltage regulator. The first terminal of the first transistor is electrically connected to the first terminal of the second resistor, serving as a first terminal. The control terminal of the first transistor is electrically connected to the second terminal of the second resistor, the first terminal of the third resistor, and the first terminal of the second transistor. The control terminal of the second transistor is electrically connected to the first terminal of the first resistor, and the second terminal of the second transistor is electrically connected to the second terminal of the first resistor and the second terminal of the third resistor, serving as a second terminal. At least one voltage regulator is connected between the second terminal of the first transistor and the first terminal of the first resistor. The first terminal is electrically connected to the positive busbar, and the second terminal is electrically connected to the ground terminal, or the second terminal is electrically connected to the negative busbar, and the first terminal is electrically connected to the ground terminal. In this invention, by adding a voltage clamping circuit between the positive bus and ground of the HVDC power supply system, and / or adding a voltage clamping circuit between the negative bus and ground of the HVDC power supply system, the positive voltage to ground and the negative voltage to ground can be clamped within a small voltage range when the neutral voltage deviates, thereby reducing the safety distance and improving the design flexibility and power density of the system. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 A schematic diagram of an HVDC power supply system provided for related technologies;

[0038] Figure 2 A schematic diagram of another HVDC power supply system provided for related technologies;

[0039] Figure 3 A schematic diagram of a voltage clamping circuit provided in an embodiment of this utility model;

[0040] Figure 4A A schematic diagram of the application of a voltage clamping circuit provided in an embodiment of this utility model;

[0041] Figure 4B A schematic diagram illustrating the application of another voltage clamping circuit provided in this embodiment of the present invention;

[0042] Figure 4C A schematic diagram illustrating the application of another voltage clamping circuit provided in this embodiment of the present invention;

[0043] Figure 5 A schematic diagram of a voltage clamping circuit provided for an embodiment of this utility model;

[0044] Figure 6 A schematic diagram of another voltage clamping circuit provided for an embodiment of this utility model;

[0045] Figure 7 A schematic diagram of another voltage clamping circuit provided for an embodiment of this utility model;

[0046] Figure 8A A circuit diagram of another voltage clamping circuit provided for an embodiment of this utility model;

[0047] Figure 8B A circuit diagram of another voltage clamping circuit provided for an embodiment of this utility model;

[0048] Figure 8C A schematic diagram of another HVDC power supply system provided in this embodiment of the present utility model. Detailed Implementation

[0049] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.

[0050] It should be noted that the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this utility model are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this utility model described herein can be implemented in orders other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this utility model. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this utility model as detailed in the appended claims.

[0051] like Figure 1 The diagram shown is a structural schematic of an HVDC power supply system provided by related technologies. Figure 2 The diagram shown illustrates another HVDC power supply system provided by related technologies. In an HVDC power supply system, the loads (RL, RL1, RL2) are typically powered via a positive bus A and a negative bus C. When insulation resistance to ground occurs from the load, refer to... Figure 1 and Figure 2 The resistor R+ is the insulation resistance of the positive busbar to ground, and the resistor R- is the insulation resistance of the negative busbar to ground. The insulation resistance of the load to ground may cause the neutral voltage to deviate, which in turn increases the voltage between the positive busbar and the negative busbar to ground. Therefore, in order to ensure the safety of equipment and personnel, it is necessary to increase the safety distance of the system, which leads to an increase in the system area and manufacturing costs.

[0052] To address the aforementioned problems, this utility model provides a voltage clamping circuit for use in HVDC power supply systems, such as... Figure 3 The diagram shown is a structural schematic of a voltage clamping circuit provided in an embodiment of the present invention, including: a first transistor Q1, a second transistor Q2, a first resistor R1, a second resistor R2, a third resistor R3, and at least one voltage regulator 13;

[0053] The first terminal of the first transistor Q1 is electrically connected to the first terminal of the second resistor R2, serving as the first terminal 11. The control terminal of the first transistor Q1 is electrically connected to the second terminal of the second resistor R2, the first terminal of the third resistor R3, and the first terminal of the second transistor Q2.

[0054] The control terminal of the second transistor Q2 is electrically connected to the first terminal of the first resistor R1, and the second terminal of the second transistor Q2 is electrically connected to the second terminal of the first resistor R1 and the second terminal of the third resistor R3, serving as the second terminal 12.

[0055] At least one voltage regulator 13 is connected between the second terminal of the first transistor Q1 and the first terminal of the first resistor R1;

[0056] The first terminal 11 can be electrically connected to the positive bus of the HVDC power supply system, and the second terminal 12 can be electrically connected to the grounding terminal, that is, the voltage clamping circuit is connected between the positive bus of the HVDC power supply system and the grounding terminal; the first terminal 11 can also be electrically connected to the grounding terminal, and the second terminal 12 can be electrically connected to the negative bus of the HVDC system, that is, the voltage clamping circuit is connected between the negative bus of the HVDC power supply system and the grounding terminal.

[0057] In specific implementation, such as Figure 4A As shown, an additional [feature] is added between the positive bus and the grounding terminal of the HVDC power supply system. Figure 3 The voltage clamping circuit shown is used to clamp the voltage to ground within a small voltage range when the neutral voltage deviates; for example... Figure 4B As shown, an additional [feature] is added between the negative bus and the grounding terminal of the HVDC power supply system. Figure 3 The voltage clamping circuit shown is used to clamp the negative voltage to ground within a smaller voltage range when the neutral voltage deviates; for example... Figure 4C As shown, a connection is added between the positive busbar and the grounding terminal of the HVDC power supply system, and between the negative busbar and the grounding terminal of the HVDC power supply system. Figure 3 The voltage clamping circuit shown is used to clamp the positive voltage to ground within a smaller voltage range and the negative voltage to ground within a smaller voltage range when the neutral voltage deviates.

[0058] This utility model discloses a voltage clamping circuit applied to an HVDC system. The voltage clamping circuit includes a first transistor, a second transistor, a first resistor, a second resistor, a third resistor, and at least one voltage regulator. The first terminal of the first transistor is electrically connected to the first terminal of the second resistor, serving as a first terminal. The control terminal of the first transistor is electrically connected to the second terminal of the second resistor, the first terminal of the third resistor, and the first terminal of the second transistor. The control terminal of the second transistor is electrically connected to the first terminal of the first resistor, and the second terminal of the second transistor is electrically connected to the second terminal of the first resistor and the second terminal of the third resistor, serving as a second terminal. At least one voltage regulator is connected between the second terminal of the first transistor and the first terminal of the first resistor. The first terminal is electrically connected to the positive busbar, and the second terminal is electrically connected to the ground terminal, or the second terminal is electrically connected to the negative busbar, and the first terminal is electrically connected to the ground terminal. In this invention, by adding a voltage clamping circuit between the positive bus and ground of the HVDC power supply system, and / or adding a voltage clamping circuit between the negative bus and ground of the HVDC power supply system, the positive voltage to ground and the negative voltage to ground can be clamped within a small voltage range when the neutral voltage deviates, thereby reducing the safety distance and improving the design flexibility and power density of the system.

[0059] It should be noted that the voltage clamping circuit provided in this embodiment can be applied to a two-wire HVDC power supply system, for example, as... Figure 4A As shown in 4B and 4C, it can also be applied to a three-wire HVDC power supply system. Similar to its application in a two-wire HVDC power supply system, the voltage clamping circuit can be set between the positive bus and the grounding terminal of the three-wire HVDC power supply system, and also between the negative bus and the grounding terminal. Furthermore, a voltage clamping circuit can be set between the positive bus and the grounding terminal of the three-wire HVDC power supply system, and between the negative bus and the grounding terminal of the three-wire HVDC power supply system. This embodiment of the invention does not specifically limit the application in this regard.

[0060] In specific implementation, the first transistor Q1 can be a triode or a metal-oxide-semiconductor field-effect transistor (MOSFET). When the first transistor Q1 is a MOSFET, it can be an NPN type triode or a PNP type triode. When the first transistor Q1 is a MOSFET, it can be an N-type MOSFET or a P-type MOSFET.

[0061] like Figure 5 (A) Figure 5 (C) Figure 6 (A) Figure 6As shown in (D), the first transistor Q1 is the first triode, the first terminal of the first triode is the collector C, the second terminal of the first triode is the emitter E, and the control terminal of the first triode is the base B;

[0062] like Figure 5 (B) Figure 5 (D) Figure 6 (B) Figure 6 As shown in (C), the first transistor Q1 is the first MOSFET. The first terminal of the first MOSFET is the drain D, the second terminal of the first MOSFET is the source S, and the control terminal of the first MOSFET is the gate G.

[0063] The voltage stabilizing device in the voltage clamping circuit provided in this embodiment can be a Zener diode, and the number of Zener diodes can be one or at least two.

[0064] The first transistor Q1 is described in detail below as a PNP type transistor, an NPN type transistor, an N-type MOSFET, and a P-type MOSFET.

[0065] like Figure 6 (A) and Figure 6 As shown in (D), the first transistor Q1 is a PNP transistor, and at least one voltage regulator 13 includes a voltage regulator diode Z1. The anode of the voltage regulator diode Z1 is electrically connected to the emitter C of the PNP transistor, and the cathode of the voltage regulator diode Z1 is electrically connected to the first end of the first resistor R1.

[0066] like Figure 7 As shown in (A), the first transistor Q1 is a PNP transistor, and at least one voltage regulator device 13 includes at least two Zener diodes (Z1, Z2, ..., Zn, where n is a positive integer greater than or equal to 2). The at least two Zener diodes are connected in series. The cathode of the Zener diode of the previous stage is electrically connected to the anode of the Zener diode of the next stage. The anode of the Zener diode of the first stage is electrically connected to the emitter of the PNP transistor, and the cathode of the Zener diode of the last stage is electrically connected to the first terminal of the first resistor.

[0067] Figure 7 In (A), Zener diode Z1 is the first-stage Zener diode, Zener diode Zn is the last-stage Zener diode, Zener diode Z1 is the Zener diode preceding Zener diode Z2, and the cathode of Zener diode Z1 is electrically connected to the anode of Zener diode Z2.

[0068] like Figure 5 (A) and Figure 5As shown in (C), the first transistor Q1 is an NPN transistor, and at least one voltage regulator 13 includes a voltage regulator diode Z1, in which the cathode of the voltage regulator diode Z1 is electrically connected and the anode of the voltage regulator diode Z1 is electrically connected to the first terminal of the first resistor R1.

[0069] like Figure 7 As shown in (B), the first transistor Q1 is an NPN transistor. At least one voltage regulator device 13 includes at least two voltage regulator diodes (Z1, Z2, ..., Zn, where n is a positive integer greater than or equal to 2). The at least two voltage regulator diodes are connected in series. The cathode of the first-stage voltage regulator diode is electrically connected to the anode of the next-stage voltage regulator diode. The cathode of the last-stage voltage regulator diode is electrically connected to the emitter of the NPN transistor. The anode of the first-stage voltage regulator diode is electrically connected to the first terminal of the first resistor.

[0070] Figure 7 In (B), Zener diode Z1 is the first-stage Zener diode, Zener diode Zn is the last-stage Zener diode, Zener diode Z1 is the Zener diode preceding Zener diode Z2, and the cathode of Zener diode Z1 is electrically connected to the anode of Zener diode Z2.

[0071] like Figure 6 (B) and Figure 6 As shown in (C), the first transistor Q1 is a P-type MOSFET. When at least one voltage regulator 13 includes a voltage regulator diode Z1, the anode of the voltage regulator diode Z1 is electrically connected to the source of the P-type MOSFET, and the cathode of the voltage regulator diode Z1 is electrically connected to the first terminal of the first resistor R1.

[0072] like Figure 7 As shown in (C), the first transistor Q1 is a P-type MOSFET. At least one voltage regulator device 13 includes at least two voltage regulator diodes (Z1, Z2, ..., Zn, where n is a positive integer greater than or equal to 2). The at least two voltage regulator diodes are connected in series. The cathode of the first-stage voltage regulator diode is electrically connected to the anode of the next-stage voltage regulator diode. The anode of the first-stage voltage regulator diode is electrically connected to the source of the P-type MOSFET. The cathode of the last-stage voltage regulator diode is electrically connected to the first terminal of the first resistor.

[0073] Figure 7 In (C), Zener diode Z1 is the first-stage Zener diode, Zener diode Zn is the last-stage Zener diode, Zener diode Z1 is the Zener diode preceding Zener diode Z2, and the cathode of Zener diode Z1 is electrically connected to the anode of Zener diode Z2.

[0074] like Figure 5 (B) and Figure 5As shown in (D), the first transistor Q1 is an N-type MOSFET. When at least one voltage regulator 13 includes a voltage regulator diode Z1, the cathode of the voltage regulator diode Z1 is electrically connected to the source of the N-type MOSFET, and the anode of the voltage regulator diode Z1 is electrically connected to the first terminal of the first resistor R1.

[0075] like Figure 7 As shown in (D), the first transistor Q1 is an N-type MOSFET. At least one voltage regulator device 13 includes at least two voltage regulator diodes (Z1, Z2, ..., Zn, where n is a positive integer greater than or equal to 2). The at least two voltage regulator diodes are connected in series. The cathode of the first-stage voltage regulator diode is electrically connected to the anode of the next-stage voltage regulator diode. The cathode of the last-stage voltage regulator diode is electrically connected to the source of the N-type MOSFET. The anode of the first-stage voltage regulator diode is electrically connected to the first terminal of the first resistor.

[0076] Figure 7 In (D), Zener diode Z1 is the first-stage Zener diode, Zener diode Zn is the last-stage Zener diode, Zener diode Z1 is the Zener diode preceding Zener diode Z2, and the cathode of Zener diode Z1 is electrically connected to the anode of Zener diode Z2.

[0077] The above describes the connection relationship between the first transistor and at least one voltage regulator in the embodiments of this utility model. The second transistor in the embodiments of this utility model will be described in detail below.

[0078] In specific implementation, the second transistor Q2 can be a transistor or a MOSFET. When the second transistor Q2 is a transistor, it can be an NPN transistor or a PNP transistor. When the second transistor Q2 is a MOSFET, it can be an N-type MOSFET or a P-type MOSFET.

[0079] like Figure 5 (A) Figure 5 (C) Figure 6 (A) and Figure 6 As shown in (C), the second transistor Q2 is a second transistor. The first terminal of the second transistor is the collector C, the second terminal of the second transistor is the emitter E, and the control terminal of the second transistor is the base B.

[0080] like Figure 5 (B) Figure 5 (D) Figure 6 (B) and Figure 6 As shown in (D), the second transistor Q2 is the second MOSFET. The first terminal of the second MOSFET is the drain D, the second terminal of the second MOSFET is the source S, and the control terminal of the second MOSFET is the gate G.

[0081] It should be noted that, in practical applications, the types of the first transistor and the second transistor can be flexibly selected. They can both be transistors, such as both NPN transistors or both PNP transistors; they can both be MOSFETs, such as both N-type MOSFETs or both P-type MOSFETs; or one transistor and the other a MOSFET can be combined. This embodiment of the present invention does not limit this.

[0082] Figure 5 , Figure 6 , Figure 7 This is merely an example of a voltage clamping circuit provided in an embodiment of the present invention. Voltage clamping circuits configured according to the type of the first transistor, the type of the second transistor, and the number of at least one voltage regulator device are all within the protection scope of this embodiment of the present invention.

[0083] In specific implementation, refer to Figure 4A When the first terminal 11 of the voltage clamping circuit 101 is electrically connected to the positive bus A of the HVDC power supply system, and the second terminal 12 of the voltage clamping circuit 101 is electrically connected to the ground terminal, the following can be used: Figure 5 The four voltage clamping circuits shown are, among which, Figure 5 (A) shows that both the first transistor Q1 and the second transistor Q2 are NPN transistors. Figure 5 (B) shows that both the first transistor Q1 and the second transistor Q2 are N-type MOSFETs. Figure 5 (C) shows that the first transistor Q1 is an NPN transistor and the second transistor Q2 is an N-type MOSFET. Figure 5 (D) shows that the first transistor Q1 is an N-type MOSFET and the second transistor Q2 is an NPN type transistor.

[0084] refer to Figure 4B When the second terminal 12 of the voltage clamping circuit 101 is electrically connected to the negative busbar B of the HVDC power supply system, and the first terminal 11 of the voltage clamping circuit 101 is electrically connected to the ground terminal, the following can be used: Figure 6 The four voltage clamping circuits shown are, among them, Figure 6 (A) shows that both the first transistor Q1 and the second transistor Q2 are PNP type transistors. Figure 6 (B) shows that both the first transistor Q1 and the second transistor Q2 are P-type MOSFETs. Figure 6 (C) shows that the first transistor Q1 is a PNP transistor and the second transistor Q2 is a PMOS transistor. Figure 6 (D) shows that the first transistor Q1 is a P-type MOSFET and the second transistor Q2 is a PNP-type transistor.

[0085] It should be noted that the above are just examples. All voltage clamping circuits disclosed in the embodiments of this utility model can be connected between the positive bus and the grounding terminal of the HVDC power supply system, or between the negative bus and the grounding terminal of the HVDC.

[0086] The following is combined Figure 4A The first terminal 11 of the voltage clamping circuit is electrically connected to the positive bus A of the HVDC power supply system, and the second terminal 12 of the voltage clamping circuit is electrically connected to the ground terminal. The voltage regulator Z1 includes a Zener diode. Taking the positive bus voltage as an example, the principle of the voltage clamping circuit provided in this embodiment of the utility model will be explained.

[0087] In the voltage clamping circuit provided in this embodiment of the present invention, the first resistor R1 is a shunt resistor used to detect the current through the Zener diode Z1, the first transistor Q1 is used to limit the current through the Zener diode Z1, and the second transistor Q2 is used to determine whether the current limiting range is entered based on the voltage of the first resistor R1.

[0088] Specifically, when the positive bus voltage U is input to the first terminal 11, the second resistor R provides a pull-up bias voltage to the second terminal and the control terminal of the first transistor Q1. When the voltage between the second terminal and the control terminal of the first transistor Q1 is greater than or equal to the conduction threshold voltage of the first transistor Q1, Q1 is turned on.

[0089] Current flows through Zener diode Z1. When the voltage across Zener diode Z1 equals its breakdown voltage Uz, Zener diode Z1 begins to conduct. At this time, the output voltage at the second terminal 12 is... U Z R1 is the breakdown voltage of the Zener diode, R2 is the resistance of the second resistor, R3 is the resistance of the third resistor, and at this time, the voltage of the positive bus to ground is U+U1.

[0090] When the current through the first resistor R1 is greater than or equal to the limiting current Im, the second transistor Q2 turns on. Among them, U BE2 The voltage between the control terminal and the second terminal of the second transistor Q2 (i.e., the voltage across the first resistor R1) is the resistance value of the first resistor. After the second transistor Q2 is turned on, the voltage at its first terminal rises, causing the voltage at the control terminal of the first transistor Q1 to drop. The voltage between the second terminal and the control terminal of the first transistor Q1 decreases, causing the first transistor Q1 to exit the saturation region and enter the linear amplification region. This limits the current through the Zener diode Z1, allowing the first transistor Q1 to operate in the saturation region below the current limit Im. The Zener diode Z1 is used to stabilize the circuit voltage at the set voltage value.

[0091] For example, refer to Figure 5 (D) The disclosed circuit diagram shows that the first transistor Q1 is an N-type MOSFET, the second transistor Q2 is an NPN transistor, the first terminal of the first transistor Q1 is the drain D, the second terminal is the source S, the control terminal is the gate G, the threshold voltage Vth1 of the first transistor Q1 is 0.7V, and the breakdown voltage Uz of the Zener diode Z1 is 0.3V; the first terminal of the second transistor Q2 is the collector C, the second terminal of the second transistor Q2 is the emitter E, and the control terminal of the second transistor Q2 is the base B.

[0092] At this time, the output voltage at the second terminal 12 is The voltage of the positive busbar to ground is

[0093] In another embodiment, combined Figure 4B The second terminal 12 of the voltage clamping circuit 101 is electrically connected to the negative bus C of the HVDC power supply system, and the first terminal 11 of the voltage clamping circuit 101 is electrically connected to the ground terminal. The voltage regulator Z1 includes a Zener diode, and the negative bus voltage is -U. The principle of the voltage clamping circuit provided in this embodiment of the present invention will be explained.

[0094] When the negative bus voltage -U is input to the second terminal 12, the second resistor R provides a pull-up bias voltage to the second terminal and the control terminal of the first transistor Q1. When the voltage between the second terminal and the control terminal of the first transistor Q1 is greater than or equal to the conduction threshold voltage of the first transistor Q1, Q1 is turned on.

[0095] When the voltage across Zener diode Z1 equals its breakdown voltage Uz, Zener diode Z1 begins to conduct. At this time, the output voltage at the second terminal 12 is... Among them, U Z R1 is the breakdown voltage of Zener diode Z1, R2 is the resistance of the second resistor, R3 is the resistance of the third resistor, and at this time, the voltage of the positive bus to ground is U+U1.

[0096] When the current through the first resistor R1 is greater than or equal to the limiting current Im, the second transistor Q2 turns on. U BE2 The voltage between the control terminal and the second terminal of the second transistor Q2 (i.e., the voltage across the first resistor R1) is the resistance value of the first resistor. After the second transistor Q2 is turned on, the voltage at its first terminal rises, causing the voltage at the control terminal of the first transistor Q1 to drop. The voltage between the second terminal and the control terminal of the first transistor Q1 decreases, causing the first transistor Q1 to exit the saturation region and enter the linear amplification region. This limits the current through the Zener diode Z1, allowing the first transistor Q1 to operate in the saturation region below the current limit Im. The Zener diode Z1 is used to stabilize the circuit voltage at the set voltage value.

[0097] For example, refer to Figure 6 (D) The disclosed circuit diagram shows that the first transistor Q1 is a P-type MOSFET, the second transistor Q2 is a PNP-type transistor, the first terminal of the first transistor Q1 is the source S, the second terminal is the drain D, the control terminal is the gate G, the threshold voltage Vth1 of the first transistor Q1 is 0.7V, and the breakdown voltage Uz of the Zener diode Z1 is 0.3V; the first terminal of the second transistor Q2 is the emitter E, the second terminal of the second transistor Q2 is the collector C, and the control terminal of the second transistor Q2 is the base B.

[0098] At this time, the output voltage at the second terminal 12 is The voltage of the positive busbar to ground is -U-U1.

[0099] The voltage clamping circuit disclosed in this embodiment of the utility model, such as Figure 8A The diagram shown is a structural schematic of another voltage clamping circuit provided in an embodiment of the present invention. When the first terminal 11 is electrically connected to the positive bus of the HNDC power supply system and the second terminal 12 is electrically connected to the grounding terminal, the voltage clamping circuit further includes a first diode D1.

[0100] The anode of the first diode D1 serves as the first terminal 11, and the cathode of the first diode D1 is electrically connected to the first terminal of the first transistor Q1 and the first terminal of the second resistor R2.

[0101] Figure 8A In the circuit, the anode of the first diode D1 is electrically connected to the positive bus A, and the cathode of the first diode D1 is electrically connected to the first terminal of the first transistor Q1 and the first terminal of the second resistor R2. The first diode D1 is used to protect the circuit and prevent current reverse flow.

[0102] like Figure 8B The diagram shown is a structural schematic of another voltage clamping circuit provided in an embodiment of the present invention. When the second terminal 12 is electrically connected to the negative bus of the HVDC power supply system and the first terminal 11 is electrically connected to the ground terminal, the voltage clamping circuit also includes a second diode D2.

[0103] The cathode of the second diode D2 serves as the second terminal 12, and the anode of the second diode D2 is electrically connected to the second terminal of the first resistor R1, the second terminal of the second transistor Q2, and the second terminal of the third resistor R3.

[0104] Figure 8B In the circuit, the cathode of the second diode D2 is electrically connected to the negative bus, and the anode of the second diode D2 is electrically connected to the second terminal of the first resistor R1, the second terminal of the second transistor Q2, and the second terminal of the third resistor R3. The second diode D2 is used to protect the circuit and prevent current reverse flow.

[0105] Based on the same concept, this utility model embodiment provides an HVDC power supply system, including at least one voltage clamping circuit as described above. The implementation of the HVDC power supply system can refer to the implementation of the voltage clamping circuit, and the repeated parts will not be described again.

[0106] This utility model provides an HVDC power supply system, including at least one voltage clamping circuit as described above.

[0107] For each voltage clamping circuit:

[0108] The voltage clamping circuit is connected between the positive bus and the ground terminal of the HVDC power supply system. This voltage clamping circuit is used to clamp the positive bus voltage to ground within a first preset range; or

[0109] The voltage clamping circuit is connected between the negative busbar of the HVDC power supply system and the grounding terminal. The voltage clamping circuit is used to clamp the voltage of the negative busbar to ground within a second preset range.

[0110] In this embodiment of the present invention, the first preset range can be U to U+U1, and the second preset range can be -U to -(U+U1).

[0111] In a specific embodiment, when the HVDC power supply system includes a voltage clamping circuit, refer to Figure 8A The first terminal 11 of the voltage clamping circuit is electrically connected to the positive busbar, and the second terminal 12 of the voltage clamping circuit is electrically connected to the ground terminal, or

[0112] refer to Figure 8B The second terminal 12 of the voltage clamping circuit is electrically connected to the negative busbar, and the first terminal 11 of the voltage clamping circuit is electrically connected to the grounding terminal.

[0113] When the HVDC power supply system includes two voltage clamping circuits, such as Figure 8C The diagram shown is a structural schematic of another HVDC power supply system provided by an embodiment of the present invention, including a first voltage clamping circuit 101-1 and a second voltage clamping circuit 101-2. The first terminal 11 of the first voltage clamping circuit 101-1 is electrically connected to the positive bus A, the second terminal 12 of the first voltage clamping circuit 101-1 is electrically connected to the ground terminal, the second terminal 12 of the second voltage clamping circuit 101-2 is electrically connected to the negative bus C, and the first terminal 11 of the second voltage clamping circuit 101-2 is electrically connected to the ground terminal.

[0114] When the HVDC power supply system includes two or more voltage clamping circuits, multiple voltage clamping circuits can be set in parallel between the positive bus and the ground terminal, or multiple voltage clamping circuits can be set in parallel between the negative bus and the ground terminal, or multiple voltage clamping circuits can be set in parallel between the positive bus and the ground terminal, and also between the negative bus and the ground terminal. This utility model embodiment does not limit this.

[0115] This utility model discloses a voltage clamping circuit and an HVDC power supply system. The voltage clamping circuit is applied to an HVDC system and includes a first transistor, a second transistor, a first resistor, a second resistor, a third resistor, and at least one voltage regulator. The first terminal of the first transistor is electrically connected to the first terminal of the second resistor, serving as a first terminal. The control terminal of the first transistor is electrically connected to the second terminal of the second resistor, the first terminal of the third resistor, and the first terminal of the second transistor. The control terminal of the second transistor is electrically connected to the first terminal of the first resistor, and the second terminal of the second transistor is electrically connected to the second terminal of the first resistor and the second terminal of the third resistor, serving as a second terminal. At least one voltage regulator is connected between the second terminal of the first transistor and the first terminal of the first resistor. The first terminal is electrically connected to the positive bus and the second terminal is electrically connected to the ground terminal, or the second terminal is electrically connected to the negative bus and the first terminal is electrically connected to the ground terminal. In this invention, by adding a voltage clamping circuit between the positive bus and ground of the HVDC power supply system, and / or adding a voltage clamping circuit between the negative bus and ground of the HVDC power supply system, the positive voltage to ground and the negative voltage to ground can be clamped within a small voltage range when the neutral voltage deviates, thereby reducing the safety distance and improving the design flexibility and power density of the system.

[0116] Those skilled in the art can make various modifications and variations to this utility model without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this utility model and their equivalents, this utility model also intends to include these modifications and variations.

Claims

1. A voltage clamping circuit, characterized in that, Applied to HVDC power supply systems, including: a first transistor, a second transistor, a first resistor, a second resistor, a third resistor, and at least one voltage regulator; The first terminal of the first transistor is electrically connected to the first terminal of the second resistor, serving as the first terminal of the voltage clamping circuit. The control terminal of the first transistor is electrically connected to the second terminal of the second resistor, the first terminal of the third resistor, and the first terminal of the second transistor. The control terminal of the second transistor is electrically connected to the first terminal of the first resistor, and the second terminal of the second transistor is electrically connected to the second terminal of the first resistor and the second terminal of the third resistor, serving as the second terminal of the voltage clamping circuit; The at least one voltage regulator is connected between the second terminal of the first transistor and the first terminal of the first resistor; Wherein, the first terminal is electrically connected to the positive bus of the HVDC power supply system, and the second terminal is electrically connected to the grounding terminal, or the second terminal is electrically connected to the negative bus of the HVDC power supply system, and the first terminal is electrically connected to the grounding terminal.

2. The circuit according to claim 1, characterized in that, The first transistor is a first triode, the control terminal of the first triode is the base, the first terminal of the first triode is the collector, and the second terminal of the first triode is the collector.

3. The circuit according to claim 2, characterized in that, The voltage regulator is a Zener diode, and the first transistor is a PNP transistor; In the case of including a Zener diode, the anode of the Zener diode is electrically connected to the emitter of the PNP transistor, and the cathode of the Zener diode is electrically connected to the first terminal of the first resistor; In the case of at least two Zener diodes, the at least two Zener diodes are connected in series, the cathode of the first-stage Zener diode is electrically connected to the anode of the second-stage Zener diode, the anode of the first-stage Zener diode is electrically connected to the emitter of the PNP transistor, and the cathode of the last-stage Zener diode is electrically connected to the first terminal of the first resistor.

4. The circuit according to claim 2, characterized in that, The voltage regulator is a Zener diode, and the first transistor is an NPN transistor; In the case of including a Zener diode, the cathode of the Zener diode is electrically connected to the emitter of the NPN transistor, and the anode of the Zener diode is electrically connected to the first terminal of the first resistor; In the case of at least two Zener diodes, the at least two Zener diodes are connected in series, the cathode of the first Zener diode is electrically connected to the anode of the second Zener diode, the cathode of the last Zener diode is electrically connected to the emitter of the NPN transistor, and the anode of the first Zener diode is electrically connected to the first terminal of the first resistor.

5. The circuit according to claim 1, characterized in that, The first transistor is a first MOSFET, the control terminal of the first MOSFET is the gate, the first terminal of the first MOSFET is the drain, and the second terminal of the first MOSFET is the source.

6. The circuit according to claim 5, characterized in that, The voltage regulator is a Zener diode, and the first MOSFET is a P-type MOSFET; In the case of including a Zener diode, the anode of the Zener diode is electrically connected to the source of the P-type MOSFET, and the cathode of the Zener diode is electrically connected to the first terminal of the first resistor; In the case of at least two Zener diodes, the at least two Zener diodes are connected in series, the cathode of the first-stage Zener diode is electrically connected to the anode of the second-stage Zener diode, the anode of the first-stage Zener diode is electrically connected to the source of the P-type MOSFET, and the cathode of the last-stage Zener diode is electrically connected to the first terminal of the first resistor.

7. The circuit according to claim 5, characterized in that, The voltage regulator is a Zener diode, and the first MOSFET is an N-type MOSFET; In the case of including a Zener diode, the cathode of the Zener diode is electrically connected to the source of the N-type MOSFET, and the anode of the Zener diode is electrically connected to the first terminal of the first resistor; In the case of at least two Zener diodes, the at least two Zener diodes are connected in series, the cathode of the first Zener diode is electrically connected to the anode of the second Zener diode, the cathode of the last Zener diode is electrically connected to the source of the N-type MOSFET, and the anode of the first Zener diode is electrically connected to the first terminal of the first resistor.

8. The circuit according to claim 1, characterized in that, The second transistor is a second triode, with the control terminal of the second triode being the base, the first terminal of the second triode being the collector, and the second terminal of the second triode being the emitter.

9. The circuit according to claim 1, characterized in that, The second transistor is a second MOSFET, the control terminal of the second MOSFET is the gate, the first terminal of the second MOSFET is the drain, and the second terminal of the second MOSFET is the source.

10. The circuit according to any one of claims 1 to 9, characterized in that, When the first terminal is electrically connected to the positive bus of the HVDC power supply system and the second terminal is electrically connected to the ground terminal, the circuit further includes a first diode; The anode of the first diode serves as the first terminal, and the cathode of the first diode is electrically connected to the first terminal of the first transistor and the first terminal of the second resistor.

11. The circuit according to any one of claims 1 to 9, characterized in that, When the second terminal is electrically connected to the negative bus of the HVDC power supply system and the first terminal is electrically connected to the ground terminal, the circuit further includes a second diode; The cathode of the second diode serves as the second terminal, and the anode of the second diode is electrically connected to the second terminal of the first resistor, the second terminal of the second transistor, and the second terminal of the third resistor.

12. An HVDC power supply system, characterized in that, Includes at least one voltage clamping circuit as described in any one of claims 1 to 11; For each voltage clamping circuit: The voltage clamping circuit is connected between the positive bus and the grounding terminal of the HVDC power supply system. The voltage clamping circuit is used to clamp the positive bus voltage to ground within a first preset range; or The voltage clamping circuit is connected between the negative busbar and the grounding terminal of the HVDC power supply system. The voltage clamping circuit is used to clamp the voltage of the negative busbar to ground within a second preset range.

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