A blind via misalignment detection module for circuit boards

Abstract

This utility model belongs to the field of PCB technology and discloses a blind via misalignment detection module for circuit boards. It is installed in a non-product area of ​​the circuit board and is characterized by including at least one detection unit. Each detection unit includes a blind via for detection and a marking area on the outer layer of the circuit board. The bottom surface of the blind via is exposed. By simply identifying the difference between the actual distance and the designed distance from the blind via to the marking frame using AOI scanning, the extent of misalignment of the blind via relative to the marking frame can be determined. This misalignment data can be extrapolated to the misalignment of blind vias in the product area relative to the outer layer of the product area. The misalignment inspection of this utility model can avoid large-scale rework and scrap caused by undetected misalignments. Problems in the production process can be corrected in a timely manner, saving costs, optimizing the production process, and improving production efficiency.

Description

Technical Field

[0001] This utility model relates to the field of PCB technology, and in particular to a blind via misalignment detection module for circuit boards. Background Technology

[0002] AOI (Automated Optical Inspection) is a high-speed, high-precision optical imaging inspection system that uses machine vision as the inspection standard technology. It overcomes the shortcomings of traditional manual inspection using optical instruments and is widely used in the PCB industry. Conventional through-hole circuit boards and blind via circuit boards in the unfilled stage can be directly observed using AOI or a microscope to determine whether blind vias are misaligned, providing a direct reference standard to determine the accuracy of through-hole position. For example, Chinese invention patent application CN202211700191.3 discloses a blind via misalignment detection board and method for HDI printed circuit boards: before laser-drilling the blind vias, at least one set of detection modules is formed in the non-processing unit area; blind vias of the same diameter are simultaneously laser-drilled on the bottom pads of the processing unit area and the circular detection pads in the detection modules in the non-processing unit area; and a microscope is used to check the misalignment of the blind vias in at least one set of the detection modules.

[0003] However, these existing methods can only detect the misalignment of blind vias relative to inner layer traces, but cannot monitor the misalignment of blind vias relative to outer layer traces. After the outer layer traces are printed, the surface of the blind via is obscured by the outer layer pads, making it impossible to accurately determine the misalignment of the blind via based on the relative position of the blind via and the pads. It is impossible to effectively detect the alignment deviation between the blind via layer and the outer layer traces directly using circuit AOI or microscopy. It can only be detected when the deviation of the blind via relative to the outer layer traces is so severe that the outer layer pads cannot completely cover the blind via. This situation can seriously affect product reliability and may lead to performance degradation, short circuits, and other problems during product use. Utility Model Content

[0004] The technical problem to be solved by this utility model is to propose a blind via misalignment detection module for circuit boards that can detect the misalignment of blind vias relative to the outer layer lines, in light of the above-mentioned technical status.

[0005] The technical solution adopted by this utility model to solve the technical problem is: a blind hole offset detection module for a circuit board, which is set in the non-product area of ​​the circuit board. The module is characterized by including at least one detection unit, and each detection unit includes a detection blind hole and a marking area set on the outer layer of the circuit board. The detection blind hole is designed with the bottom surface of the hole exposed.

[0006] By simply identifying the difference between the actual distance from the blind via to the marked area and the designed distance through AOI scanning, it is possible to determine how much the blind via has shifted relative to the marked area, and this shift data can be extrapolated to the shift of blind vias in the product area relative to the outer layer of the product area.

[0007] Preferably, the marking area is a marking frame surrounding the detection blind hole, making the offset identification more intuitive.

[0008] Furthermore, the center of the detection blind hole is designed to coincide with the center of the outer frame of the marker corresponding to the same detection unit. With this scheme, the offset of the detection blind hole relative to the center of the marker frame can be directly determined, without needing to calculate the actual distance and design distance from the detection blind hole to the marker frame.

[0009] The shape of the marker frame is not limited, but in order to make it easier to identify the misalignment, the marker frame is preferably annular.

[0010] Furthermore, the distance from the outer ring of the detected blind via to the inner ring of the marking frame is the blind via offset tolerance of the circuit board product. Under this scheme, the engagement of the detected blind via with the marking frame indicates that the blind via offset exceeds the tolerance, making the judgment more intuitive and convenient. If the product has high precision requirements, the designed distance from the outer ring of the detected blind via to the inner ring of the marking frame can be used; conversely, the designed distance can be increased.

[0011] Theoretically, the more detection units, the better. Different design distances can be specified for the blind vias to the outer frame of the markings. The positions of the detection units can also be adjusted according to the wiring, such as a distributed rectangular array, which can effectively detect local misalignments, meaning it can detect instances of blind via offset or stepped offset in parts of the circuit board. Considering both the detection effect and the layout of non-product areas, it is preferable to have two detection units on each of the front and back sides of the circuit board.

[0012] Specifically, the two detection units on the front of the circuit board each have a blind hole diameter of 75μm, and the inner diameters of the marking frame are 155μm and 175μm, respectively.

[0013] Specifically, the aperture of the detection blind hole of the two detection units on the reverse side of the circuit board and the inner diameter of the marking frame are the same as those on the front side.

[0014] Preferably, the blind via misalignment detection module further includes an auxiliary unit, which includes an auxiliary blind via. The auxiliary blind via is filled with copper and forms an outer layer circuit pad on top. The bottom surface of the auxiliary blind via is an inner layer circuit pad of the circuit board, and the outer layer circuit pad is connected to the inner layer circuit pad.

[0015] Compared with existing technologies, this invention has the following advantages: In the product area, after blind vias are filled with copper, they are covered by outer layer circuit pads, making it impossible to identify the misalignment of the blind vias relative to the outer layer circuits using AOI scanning. This invention provides exposed bottom-side inspection blind vias in non-product areas. These blind vias are specifically for inspection and are not filled with copper. A marking area, which can be made of copper traces, is provided outside the inspection blind via and is printed on the circuit board along with the traces in the product area. By simply identifying the difference between the actual distance from the inspection blind via to the marking area and the designed distance using AOI scanning, the extent of the misalignment of the inspection blind via relative to the marking area can be determined, and this misalignment data can be extrapolated to the misalignment of blind vias in the product area relative to the outer layer circuits in the product area. This misalignment inspection method avoids large-scale rework and scrap caused by undetected misalignments, allowing problems in the production process to be corrected promptly, saving costs, optimizing the production process, and improving production efficiency. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the structure of an embodiment of the present utility model;

[0017] Figure 2 for Figure 1 Enlarged view of point A in the middle;

[0018] Figure 3 for Figure 1 Enlarged view of point B in the middle;

[0019] Figure 4 for Figure 1 Enlarged view of point C in the middle;

[0020] Figure 5 This is a front view of the detection unit of this utility model embodiment when the blind hole is not offset relative to the outer layer circuit;

[0021] Figure 6 This is a cross-sectional view of the detection unit of this utility model embodiment when the blind via is not offset relative to the outer layer circuit.

[0022] Figure 7 This is a front view of the detection unit of this utility model embodiment when the blind via is offset relative to the outer layer circuit;

[0023] Figure 8 This is a cross-sectional view of the detection unit of this utility model embodiment when the blind via is offset relative to the outer layer circuit;

[0024] Figure 9 This is a schematic diagram illustrating the determination of blind hole misalignment using loudness testing in an embodiment of this utility model.

[0025] Figures 10-12This is a schematic diagram of the preparation process of an embodiment of the present invention, wherein (a) is drilling, (b) is lamination, (c) is exposure, (d) is development, (e) is electroplating, (f) is film removal, and (g) is flash etching. Detailed Implementation

[0026] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0027] like Figures 1-12 The figure shows a preferred embodiment of the preparation method and detection method of a blind via misalignment detection module for a circuit board according to the present invention.

[0028] Circuit boards typically have a product area (Region 1) and a non-product area (Region 2). Product area 1 is the area on the circuit board used for mounting and connecting electronic components. These areas usually contain the main functional parts of the circuit, such as processors, memory, and power management circuits. Their design and layout directly affect the performance and functionality of the circuit board. Non-product area 2 consists of other areas on the circuit board besides product area 1. These areas usually do not contain electronic components, but may contain some auxiliary circuits or markings, such as test points, calibration circuits, silkscreen markings, etc.

[0029] like Figure 1 As shown, the blind via misalignment detection module in this embodiment is located in the non-product area 2 of the circuit board, including at least one detection unit 4 specifically used to detect whether the blind via 3 of the circuit board is misaligned and the degree of misalignment. Each detection unit 4 includes a detection blind via 41 and a marking frame 42 set on the surface of the circuit board. The detection blind via 41 is designed with its bottom surface exposed and located within the marking frame 42 corresponding to the same detection unit 4.

[0030] In product area 1, the blind via 3 connects the outer layer circuitry 5 and the inner layer circuitry 6 of the circuit board via copper filling within the via. Figure 2 As shown, after the blind via 3 is filled with copper, it will be covered by the outer layer circuit pad 51, making it impossible to directly identify the offset of the blind via 3 relative to the outer layer circuit 5 in product area 1 using AOI scanning. Please refer to... Figure 3 In this embodiment, a detection blind hole 41 is provided in the non-product area 2, which is specifically used for detection and is not filled with copper. A marking frame 42 is provided outside the detection blind hole 41. This marking frame 42 can be made of copper circuitry and is printed on the circuit board together with the outer layer circuitry 5 of the product area.

[0031] By simply identifying the difference between the actual distance and the designed distance between the blind hole 41 and the marked outer frame 42 through AOI scanning, it is possible to determine how much offset the blind hole 41 has relative to the marked outer frame 42. Furthermore, this offset data can be extrapolated to the offset of the product blind hole 3 in product area 1 relative to the outer layer circuit 5. In other words, by using the AOI scanning detection unit 4 to determine the offset information of the blind hole 41, the offset information of the product blind hole 3 in product area 1 can be indirectly obtained.

[0032] To facilitate easier identification of misalignment, the outer frame 42 of the marker in this embodiment is designed as a ring, and the center of the detection blind hole 41 is designed to coincide with the center of the outer frame 42 corresponding to the same detection unit 4. Under this scheme, the misalignment of the blind hole can be intuitively determined simply by judging the offset of the detection blind hole 41 relative to the center of the outer frame 42, without needing to calculate the actual distance and design distance from the detection blind hole 41 to the outer frame 42. However, the shape of the outer frame 42 is not limited to a ring and can be flexibly adjusted according to the actual product.

[0033] This embodiment further designs the distance from the outer ring of the detection blind hole 41 to the inner ring of the marking frame 42 to meet the blind hole offset tolerance of the circuit board product. The detection blind hole 41 is engaged with or extends beyond the marking frame 42, such as... Figure 7 As shown, this indicates that the deviation of blind hole 3 exceeds the tolerance, making the judgment more intuitive. If the product has high precision requirements, the design distance from the outer ring of the blind hole 41 to the inner ring of the marking frame 42 can be reduced; conversely, the design distance from the outer ring of the blind hole 41 to the inner ring of the marking frame 42 can be increased.

[0034] The more detection units 4 there are in theory, the better. Different design distances can be set for detecting blind holes 41 to the outer frame 42 of the marking. The position of the detection units 4 can also be adjusted according to the wiring. It can be a distributed rectangular array, etc. It can effectively detect local deviations. That is to say, it can detect the deviation between the blind hole and the normal part of the circuit layer (referring to the part where the circuit accuracy is not a problem, because when deviation occurs, there are two situations. It may be that the blind hole has been deviated, or it may be that the blind hole is positive but the outer circuit has been deviated due to accuracy problems) or the step-like deviation.

[0035] This solution can be flexibly applied to the detection of blind hole misalignment in different types of products. In this embodiment, taking Coil products as an example, considering both the detection effect and the layout of the non-product area 2, the detection unit 4 is designed to have two units on each of the front and back sides of the circuit board. The two detection units 4 on the front side of the circuit board have blind hole 41 diameters of 75μm, and the inner diameters of the marking frame 42 are 155μm and 175μm, respectively; the two detection units 4 on the back side of the circuit board are the same as those on the front side.

[0036] However, AOI scanning can only identify the surface, and it cannot detect the cross-sectional sidewall of the blind hole 41. Therefore, to avoid missed detections, the blind hole misalignment detection module in this embodiment also includes an auxiliary unit 7, such as... Figure 4 As shown. The auxiliary unit 7 is disposed adjacent to a detection unit 4. The auxiliary unit 7 includes an auxiliary blind hole 71. The hole of the auxiliary blind hole 71 is filled with copper and an outer layer circuit pad 51 is formed on top. The bottom surface of the auxiliary blind hole 71 is the inner layer circuit pad 61 of the circuit board. The outer layer circuit pad 51 is connected to the inner layer circuit pad 61 through the auxiliary blind hole 71.

[0037] like Figures 10-11 The diagram shows a partial fabrication process of the circuit board testing module area. The testing blind via 41 in the upper half of the circuit board is offset relative to the outer circuit 5, while the testing blind via 41 in the lower half is not offset.

[0038] The preparation method of this embodiment includes the following steps:

[0039] S1, the circuit board is fabricated layer by layer using the conventional process of existing technology, which will not be elaborated here, until the outermost blind via needs to be fabricated.

[0040] S2, an insulating layer 8 is laminated onto the outer side of the inner layer circuit 6. Simultaneously, product blind holes 41 and auxiliary blind holes 71 are drilled on the insulating layer 8, and a seed layer 10 is deposited. Figure 10 (a)), the bottom surface of the blind via 41 is the inner layer circuit pad 61.

[0041] S3, continue pressing the dry film layer 9 on the outside. Figure 10 (b) The area in dry film layer 9 corresponding to the pattern of outer circuit layer 5 is not exposed. Figure 10 (c)), the unexposed areas are removed by development. Figure 11 (d)), the exposed area 91 is retained, and then the outer layer circuit 5 and the marking frame 42 are made by electroplating. Figure 11 (e)), the coating will fill the areas not covered by the dry film layer 9, and then the remaining dry film will be removed to obtain the final product. Figure 11 The circuit board shown in (f) is finally flash-etched to remove the exposed seed layer 10. Figure 12 (g)).

[0042] When the blind hole 41 is not misaligned or the misalignment does not exceed the tolerance, such as Figure 5 , Figure 6 ,as well as Figure 10 , Figure 11 and Figure 12 As shown in the lower half of the circuit board, the blind via 41 is covered with a dry film layer 9, which is not filled with copper due to electroplating.

[0043] However, when the deviation of the blind hole 41 exceeds the tolerance, such as Figure 7 , Figure 8 ,as well as Figure 10 , Figure 11 and Figure 12 As shown in the upper half of the circuit board, the blind via 41 overlaps with the circuit pattern corresponding to the marked outline 42, causing the dry film layer 9 above it to be partially removed during development. Because the blind via 41 is not completely covered by the dry film, copper plating inside the via is unavoidable. Therefore, operators can use equipment such as a multimeter or a flying probe microanalyzer to check the via. Figure 9 As shown, the positive and negative terminals are connected to the outer layer circuit pad 51 of the auxiliary unit 7 and the marking frame 42 of the detection unit 4, respectively. If a circuit is detected, it indicates that there is copper on the sidewall of the blind via 41, and the blind via 41 is offset relative to the outer layer circuit 5. Since not all via offsets will lead to a short circuit, this embodiment uses electrical performance testing as a supplement to AOI scanning, rather than using it as the sole detection method.

[0044] The blind via misalignment detection method in this embodiment is as follows: the misalignment of the blind via 41 relative to the marked outer frame 42 is detected by AOI scanning, and then the misalignment of the blind via 3 is verified by whether the outer layer circuit pad 51 above the auxiliary blind via 71 of the test auxiliary unit 7 is conductive with the marked outer frame 42 of the detection unit 4.

[0045] In addition, AOI scanning can also be performed after development is complete. Figure 11 (d) This is done in advance. By identifying the area covered by the dry film and the relative position of the detection blind hole 41, it can be determined whether there is any deviation. Although there is a dry film covering the detection blind hole 41 at this stage, since the dry film is transparent, the relative position of the detection blind hole 41 and the dry film can be seen directly. This allows for the detection of deviation earlier, and if there is any deviation, it can be adjusted in time.

[0046] Electrical performance testing can be performed using a multimeter or a flying probe tester to test whether the outer circuit pad 51 above the auxiliary blind hole 71 of the auxiliary unit 7 is conductive to the marking frame 42 of the detection unit 4. If conductive, the multimeter or flying probe tester will emit a beep, and the loudness of the beep will be tested to automatically record whether the blind hole 3 is misaligned.

Claims

1. A blind via misalignment detection module for a circuit board, disposed in a non-product area (2) of the circuit board, characterized in that, It includes at least one detection unit (4), each of the detection units (4) includes a detection blind hole (41) and a marking area disposed on the outer layer of the circuit board, the detection blind hole (41) is designed with the bottom surface of the hole exposed.

2. The blind hole misalignment detection module according to claim 1, characterized in that, The marking area is a marking frame (42) set around the detection blind hole (41).

3. The blind hole misalignment detection module according to claim 2, characterized in that, The center of the detection blind hole (41) is designed to coincide with the center of the marking frame (42) corresponding to the same detection unit (4).

4. The blind hole misalignment detection module according to claim 3, characterized in that, The outer frame (42) of the marker is circular.

5. The blind hole misalignment detection module according to claim 4, characterized in that, The distance from the outer ring of the detection blind hole (41) to the inner ring of the marking frame (42) is the blind hole offset tolerance of the circuit board product.

6. The blind hole misalignment detection module according to claim 5, characterized in that, Two detection units (4) are provided on each of the front and back sides of the circuit board.

7. The blind hole misalignment detection module according to claim 2, characterized in that, The two detection units (4) on the front of the circuit board have blind holes (41) with a diameter of 75μm, and the inner diameters of the marking frames (42) are 155μm and 175μm, respectively.

8. The blind hole misalignment detection module according to claim 7, characterized in that, The aperture of the detection blind hole (41) of the two detection units (4) on the reverse side of the circuit board and the inner diameter of the marking frame (42) are the same as those on the front side.

9. The blind hole misalignment detection module according to claim 1, characterized in that, It also includes an auxiliary unit (7), which includes an auxiliary blind hole (71). The hole of the auxiliary blind hole (71) is filled with copper and an outer layer circuit pad (51) is formed on top. The bottom surface of the hole of the auxiliary blind hole (71) is the inner layer circuit pad (61) of the circuit board. The outer layer circuit pad (51) and the inner layer circuit pad (61) are connected.

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