A power management integrated circuit device with heat dissipation fin structure

Abstract

The utility model belongs to the technical field of electronic device heat management, disclose a kind of power management integrated circuit device with radiating fin structure, including base, chip main body and lower heat-conducting sheet, chip main body and lower heat-conducting sheet are connected in the top of base, the scheme is through optimizing heat dissipation structure, using the combination of integrally formed lower heat-conducting sheet, radiating fin and upper heat-conducting sheet, the thermal resistance between each component is effectively reduced, the efficiency that heat spreads and releases from chip main body outward is improved, make structure simplify and facilitate installation;Through using heat-conducting film, docking block and serpentine cooling channel etc. Design, further improve heat transfer efficiency and heat dissipation capacity;Through the connection with external cooling liquid circulating system, can actively assist heat dissipation, enhance the thermal stability and reliability under high-power operation, ensure that chip can work stably under high heat flux density condition, with significant heat dissipation performance and structural advantages.

Description

Technical Field

[0001] This utility model relates to the field of thermal management technology for electronic devices, and in particular to a power management integrated circuit device with a heat dissipation fin structure. Background Technology

[0002] As electronic devices develop towards high performance, miniaturization, and high integration, the power density of power management integrated circuits continues to increase, leading to a significant rise in their operating temperature. Excessive chip temperature can cause performance degradation, reduced reliability, and even thermal failure. Therefore, efficient heat dissipation solutions have become a key challenge in PMIC design.

[0003] Traditional heat dissipation methods mainly rely on external heat sinks, thermal adhesives, or air cooling systems. However, these solutions often have problems such as long heat dissipation paths, high contact thermal resistance, and complex installation, making it difficult to meet the heat dissipation requirements of high heat flux density chips. Utility Model Content

[0004] This invention aims to provide a power management integrated circuit device with a heat dissipation fin structure to solve the problems mentioned in the background art. This solution optimizes the heat dissipation structure by using a combination of an integrally formed lower heat-conducting plate, heat dissipation fins, and upper heat-conducting plate, effectively reducing the thermal resistance between components and improving the efficiency of heat diffusion and release from the chip body. This simplifies the structure and facilitates installation. Furthermore, the use of thermal conductive films, mating blocks, and serpentine cooling channels further enhances heat transfer efficiency and heat dissipation capacity. Through connection with an external coolant circulation system, it can actively assist in heat dissipation, enhancing thermal stability and reliability under high power operation, ensuring stable chip operation under high heat flux density conditions, and exhibiting significant heat dissipation performance and structural advantages.

[0005] To achieve the above objectives, this utility model provides the following technical solution:

[0006] A power management integrated circuit device with a heat dissipation fin structure includes a base, a chip body, and a lower heat-conducting plate. The chip body and the lower heat-conducting plate are both connected to the top of the base. The chip body is sandwiched between the base and the lower heat-conducting plate. An upper heat-conducting plate is disposed on the upper side of the lower heat-conducting plate, and a plurality of heat dissipation fins are disposed between the lower heat-conducting plate and the upper heat-conducting plate in an equidistant arrangement. The lower heat-conducting plate, the heat dissipation fins, and the upper heat-conducting plate are integrally formed.

[0007] Preferably, the lower surface of the lower heat-conducting sheet is covered with a heat-conducting film, and the heat-conducting film is in close contact with the upper surface of the chip body.

[0008] Preferably, the bottom end of the lower heat-conducting sheet is provided with multiple mating grooves, which penetrate the heat-conducting film.

[0009] Preferably, the top of the chip body is connected to a plurality of docking blocks that cooperate with the docking groove, and the docking blocks are made of thermally conductive material.

[0010] Preferably, the base has a cooling channel inside, the cooling channel is configured in a serpentine structure, and both ends of the cooling channel extend to the outside of the lower heat-conducting plate.

[0011] Preferably, the docking groove and the cooling channel are arranged in an alternating manner.

[0012] The beneficial effects of this technical solution compared to existing technologies are as follows:

[0013] This solution optimizes the heat dissipation structure by employing a combination of an integrated lower heat-conducting plate, heat dissipation fins, and an upper heat-conducting plate. This effectively reduces the thermal resistance between components and improves the efficiency of heat diffusion and release from the chip body, simplifying the structure and facilitating installation. The use of thermal conductive films, mating blocks, and serpentine cooling channels further enhances heat transfer efficiency and heat dissipation capacity. Connection to an external coolant circulation system actively assists in heat dissipation, enhancing thermal stability and reliability under high-power operation. This ensures stable chip operation under high heat flux density conditions, demonstrating significant heat dissipation performance and structural advantages. Attached Figure Description

[0014] Figure 1 A schematic diagram of the overall structure of this utility model;

[0015] Figure 2 A schematic diagram of the main structure of the chip provided by this utility model;

[0016] Figure 3 A schematic diagram of the bottom structure of the lower heat-conducting sheet provided by this utility model;

[0017] Figure 4 A schematic diagram of the top cross-sectional structure of the lower heat-conducting plate provided by this utility model;

[0018] Figure 5 This is a side cross-sectional view of the lower heat-conducting sheet provided by this utility model.

[0019] Reference numerals in the attached diagram: 1. Base; 2. Chip body; 3. Lower heat-conducting plate; 4. Heat dissipation fins; 5. Upper heat-conducting plate; 6. Connecting block; 7. Connecting groove; 8. Thermal conductive film; 9. Cooling channel. Detailed Implementation

[0020] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments:

[0021] like Figure 1-2The power management integrated circuit device shown includes a base 1, a chip body 2, and a lower heat-conducting plate 3. The chip body 2 and the lower heat-conducting plate 3 are both connected to the top of the base 1. The chip body 2 is sandwiched between the base 1 and the lower heat-conducting plate 3. An upper heat-conducting plate 5 is provided on the upper side of the lower heat-conducting plate 3, and a plurality of heat-conducting fins 4 are arranged at equal intervals between the lower heat-conducting plate 3 and the upper heat-conducting plate 5. The lower heat-conducting plate 3, the heat-conducting fins 4, and the upper heat-conducting plate 5 are integrally formed.

[0022] As electronic devices develop towards high performance, miniaturization, and high integration, the power density of power management integrated circuits is constantly increasing, leading to a significant rise in their operating temperature. Excessive chip temperature can cause performance degradation, reduced reliability, and even thermal failure. Therefore, efficient heat dissipation solutions have become a key challenge in PMIC design. Traditional heat dissipation methods mainly rely on external heat sinks, thermal adhesives, or air cooling systems. However, these solutions often have problems such as long heat dissipation paths, high contact thermal resistance, and complex installation, making it difficult to meet the heat dissipation requirements of high heat flux density chips.

[0023] In this design, the lower heat-conducting plate 3 can be bolted to the base 1, providing stable support for the chip body 2. The heat dissipated by the chip body 2 can be conducted sequentially through the lower heat-conducting plate 3, the heat dissipation fins 4, and the upper heat-conducting plate 5, effectively expanding the heat dissipation area of ​​the chip body 2. The upper end of the upper heat-conducting plate 5 has a flat surface, making it easy for users to apply thermal grease. This allows for convenient connection of the upper heat-conducting plate 5 to an external heat pipe when necessary, further enhancing heat dissipation capacity. It is worth noting that in this design, the lower heat-conducting plate 3, the heat dissipation fins 4, and the upper heat-conducting plate 5 are integrally formed, effectively reducing the thermal resistance between components and improving the efficiency of heat diffusion and release from the chip body 2. This also enhances the overall mechanical strength and durability of the device. Its simple structure and compact size also make it very convenient to install.

[0024] like Figure 3 As shown, the lower surface of the lower heat-conducting sheet 3 is covered with a heat-conducting film 8, and the heat-conducting film 8 is in close contact with the upper surface of the chip body 2.

[0025] In this solution, the thermal conductive film 8 is in close contact with the upper surface of the chip body 2 to reduce the thermal resistance between the chip body 2 and the lower thermal conductive sheet 3 and improve the heat transfer efficiency. The thermal conductive film 8 is a flexible high thermal conductivity material that can fully fill the micro gaps between the surface of the chip body 2 and the lower thermal conductive sheet 3, further reducing the interface thermal resistance and ensuring efficient heat dissipation.

[0026] The bottom of the lower heat-conducting sheet 3 has multiple docking grooves 7, which penetrate through the heat-conducting film 8. The top of the chip body 2 is connected to multiple docking blocks 6 that cooperate with the docking grooves 7. The docking blocks 6 are made of heat-conducting material.

[0027] In this solution, the docking block 6 is made of a high thermal conductivity material, which can directly transfer the heat generated inside the chip body 2 to the inner wall of the docking groove 7 through the docking block 6, and then further conduct it to the lower heat-conducting plate 3, realizing multi-path rapid heat dissipation. By setting the matching structure between the docking block 6 and the docking groove 7, the contact area between the chip body 2 and the lower heat-conducting plate 3 is effectively increased, improving the overall heat dissipation efficiency.

[0028] like Figure 4 As shown, a cooling channel 9 is provided inside the base 1. The cooling channel 9 is configured in a serpentine structure, and both ends of the cooling channel 9 extend to the outside of the lower heat-conducting plate 3.

[0029] In this solution, the two ends of the cooling channel 9 extend to the outer side of the lower heat-conducting plate 3 for connection with the external coolant circulation system. When the temperature of the chip body 2 is too high, the user can connect the external coolant circulation system to the cooling channel 9 to improve the heat dissipation capacity. Through the serpentine layout of the cooling channel 9, the flow path of the coolant is extended and the heat exchange area is increased, thereby effectively removing the heat generated by the chip body 2 during operation, realizing active liquid cooling assisted heat dissipation, and greatly improving the overall heat dissipation capacity.

[0030] like Figure 5 As shown, the docking groove 7 and the cooling channel 9 are arranged in an alternating manner.

[0031] In this design, the docking grooves 7 are regularly distributed along the bottom of the lower heat-conducting sheet 3, while the cooling channels 9 are staggered within the lower heat-conducting sheet 3. This allows the heat transferred directly downwards from the chip body 2 through the docking blocks 6 and docking grooves 7 to exchange heat with the cooling channels 9 in the shortest path, further improving the heat dissipation effect in the local area, avoiding heat accumulation, and improving the overall thermal management performance and chip operating stability.

[0032] The above descriptions are merely embodiments of this utility model. Commonly known technical solutions and / or characteristics are not described in detail here. It should be noted that those skilled in the art can make various modifications and improvements without departing from the technical solution of this utility model. These modifications and improvements should also be considered within the scope of protection of this utility model, and will not affect the effectiveness of the implementation of this utility model or the practicality of the patent. The scope of protection claimed in this application should be determined by the content of its claims, and the specific embodiments described in the specification can be used to interpret the content of the claims.

Claims

1. A power management integrated circuit device with a heat dissipation fin structure, characterized in that: The device includes a base (1), a chip body (2), and a lower heat-conducting plate (3). The chip body (2) and the lower heat-conducting plate (3) are both connected to the top of the base (1). The chip body (2) is sandwiched between the base (1) and the lower heat-conducting plate (3). An upper heat-conducting plate (5) is provided on the upper side of the lower heat-conducting plate (3), and multiple heat dissipation fins (4) are arranged at equal intervals between the lower heat-conducting plate (3) and the upper heat-conducting plate (5). The lower heat-conducting plate (3), the heat dissipation fins (4), and the upper heat-conducting plate (5) are integrally formed.

2. The power management integrated circuit device with a heat dissipation fin structure as described in claim 1, characterized in that: The lower surface of the lower heat-conducting sheet (3) is covered with a heat-conducting film (8), and the heat-conducting film (8) is in close contact with the upper surface of the chip body (2).

3. A power management integrated circuit device with a heat dissipation fin structure as described in claim 2, characterized in that: The bottom end of the lower heat-conducting sheet (3) is provided with multiple docking grooves (7), which penetrate the heat-conducting film (8).

4. A power management integrated circuit device with a heat dissipation fin structure as described in claim 3, characterized in that: The top of the chip body (2) is connected to a plurality of docking blocks (6) that cooperate with the docking groove (7), and the docking blocks (6) are made of thermally conductive material.

5. A power management integrated circuit device with a heat dissipation fin structure as described in claim 3, characterized in that: The base (1) has a cooling channel (9) inside. The cooling channel (9) is configured as a serpentine structure, and both ends of the cooling channel (9) extend to the outside of the lower heat-conducting plate (3).

6. A power management integrated circuit device with a heat dissipation fin structure as described in claim 5, characterized in that: The docking groove (7) and the cooling channel (9) are arranged in an alternating manner.

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