Real-time clock circuit and beidou receiver

Abstract

This utility model discloses a real-time clock circuit and a Beidou receiver, relating to the field of electronic circuit technology. The disclosed real-time clock circuit includes an energy storage module and a timing module. The energy storage module includes at least one electrolytic capacitor, which has a porous anode substrate structure and a dielectric constant higher than a preset dielectric constant. The timing module is connected to both the electrolytic capacitor and a power supply. This utility model utilizes the electrolytic capacitor to store energy when connected to a power supply, receiving the output voltage from the power supply and outputting the stored energy voltage to the timing module when the power supply is disconnected. The porous anode substrate structure of the electrolytic capacitor, with a dielectric constant higher than a preset dielectric constant, enables the storage of more energy in a short time, ensuring longer time recording even after the Beidou receiver is powered off, thus providing a reliable time reference for the long-term operation of the Beidou receiver.

Description

Technical Field

[0001] This utility model relates to the field of electronic circuit technology, and in particular to a real-time clock circuit and a Beidou receiver. Background Technology

[0002] In a BeiDou receiver, the Real-Time Clock (RTC) circuit provides an accurate time reference. During normal operation, the RTC circuit calibrates and synchronizes its time information based on the received BeiDou satellite signals. Currently, existing RTC circuits incorporate supercapacitors. When the main power supply to the BeiDou receiver is cut off, the supercapacitors act as backup power, continuously supplying power to the RTC circuit based on their stored energy. This allows the RTC circuit to continue operating and maintaining continuous time recording, ensuring that time information is not lost or reset. This provides a reliable time reference for the long-term stable operation of the BeiDou receiver.

[0003] However, the supercapacitors in existing RTC circuits store charge by forming an electric double layer through the contact between the electrodes and the electrolyte. The charge is stored on the electrode surface, and the energy density per unit volume is low due to the limitation of the specific surface area of ​​the electrode material. This makes it impossible to store enough energy in a short time, resulting in the inability to maintain a long time record after the BeiDou receiver is powered off. Consequently, it is impossible to provide a reliable time reference for the long-term operation of the BeiDou receiver. Utility Model Content

[0004] The main purpose of this invention is to provide a real-time clock circuit and a BeiDou receiver, aiming to solve the technical problem that the existing technology cannot store enough energy in a short time, which leads to the inability to maintain a long time record after the BeiDou receiver is powered off, and thus cannot provide a reliable time reference for the long-term operation of the BeiDou receiver.

[0005] To achieve the above objectives, this utility model proposes a real-time clock circuit, which includes: an energy storage module, a timing module, and a power supply module;

[0006] The energy storage module includes at least one electrolytic capacitor, which is a capacitor with a porous anode substrate structure and a dielectric constant higher than a preset dielectric constant.

[0007] The timing module is connected to the electrolytic capacitor and the power supply module respectively;

[0008] The electrolytic capacitor is used to receive the power voltage output by the power module and store energy when connected to the power module.

[0009] The electrolytic capacitor is also used to output energy storage voltage to the timing module when the power module is disconnected, so as to power the timing module.

[0010] In one embodiment, the electrolytic capacitor includes a first electrolytic capacitor and a second electrolytic capacitor;

[0011] The first terminal of the first electrolytic capacitor and the first terminal of the second electrolytic capacitor are both connected to the timing module, and the second terminals of the first electrolytic capacitor and the second terminal of the second electrolytic capacitor are both grounded.

[0012] In one embodiment, both the first electrolytic capacitor and the second electrolytic capacitor are tantalum electrolytic capacitors.

[0013] In one embodiment, the timing module includes at least: a clock chip;

[0014] The power module includes: a power supply, a first diode, a first Zener diode, a first resistor, a first capacitor, and a second capacitor;

[0015] The anodes of the first diode and the first Zener diode are both connected to the power supply. The cathodes of the first diode are connected to the first terminal of the first resistor and the first power supply pin of the clock chip, respectively. The cathodes of the first Zener diode are connected to the first terminal of the first resistor and the first power supply pin of the clock chip, respectively. The second terminal of the first resistor is connected to the first terminal of the first electrolytic capacitor, the first terminal of the second electrolytic capacitor, the first terminal of the first capacitor, and the first terminal of the second capacitor, respectively. The second terminals of the first capacitor and the second terminal of the second capacitor are both grounded.

[0016] In one embodiment, the power module further includes a third capacitor and a fourth capacitor;

[0017] The first terminal of the third capacitor and the first terminal of the fourth capacitor are both connected to the first power supply pin of the clock chip, and the second terminals of the third capacitor and the fourth capacitor are both grounded.

[0018] In one embodiment, the timing module further includes: a fifth capacitor and a second resistor;

[0019] The power module also includes a step-down unit;

[0020] The first terminal of the fifth capacitor is connected to the first terminal of the step-down unit and the second power supply pin of the clock chip, respectively. The second terminal of the fifth capacitor is grounded, and the second terminal of the step-down unit is connected to the power supply.

[0021] The first end of the second resistor is connected to the frequency output pin of the clock chip, and the second end of the second resistor is grounded.

[0022] In one embodiment, the timing module further includes: a resistor pull-up module;

[0023] The pull-up resistor module includes: a third resistor, a fourth resistor, and a fifth resistor;

[0024] The first terminal of the third resistor, the first terminal of the fourth resistor, and the first terminal of the fifth resistor are all connected to the step-down unit;

[0025] The second end of the third resistor is connected to the interrupt pin of the clock chip, the second end of the fourth resistor is connected to the clock signal pin of the clock chip, and the second end of the fifth resistor is connected to the data pin of the clock chip.

[0026] In one embodiment, the timing module further includes: a current limiting module;

[0027] The current limiting module includes: a sixth resistor and a seventh resistor;

[0028] The first end of the sixth resistor is connected to the clock signal pin of the clock chip, the first end of the seventh resistor is connected to the data pin of the clock chip, the second end of the sixth resistor is connected to the clock signal pin of the main control chip, and the second end of the seventh resistor is connected to the data pin of the main control chip.

[0029] In one embodiment, the clock chip is an INS5902A.

[0030] Furthermore, to achieve the above objectives, this utility model also proposes a BeiDou receiver, which includes the real-time clock circuit described above.

[0031] One or more technical solutions proposed in this utility model have at least the following technical effects:

[0032] The real-time clock circuit disclosed in this utility model includes an energy storage module and a timing module. The energy storage module includes at least one electrolytic capacitor, which has a porous anode substrate structure and a dielectric constant higher than a preset dielectric constant. The timing module is connected to both the electrolytic capacitor and a power supply. This utility model utilizes the electrolytic capacitor to store energy by receiving the power supply voltage when the power supply is connected, and to output the stored energy voltage to the timing module when the power supply is disconnected, thus powering the timing module. The electrolytic capacitor used in this invention has a porous anode substrate structure, which greatly increases the anode surface area, improves the energy storage capacity of the capacitor, facilitates rapid charge transfer and accumulation, and further shortens the charging time. Furthermore, the selected electrolytic capacitor has a dielectric constant higher than the preset dielectric constant. By setting the preset dielectric constant value, the electrolytic capacitor can achieve a high dielectric constant, thus storing more charge under the same voltage and electrode area, thereby increasing the energy storage density. Therefore, by selecting an electrolytic capacitor with a porous anode substrate structure and a dielectric constant higher than the preset dielectric constant, this invention can store more electrical energy in a short time, ensuring a longer recording time after the BeiDou receiver is powered off, and thus providing a reliable time reference for the long-term operation of the BeiDou receiver. Attached Figure Description

[0033] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the present invention and, together with the description, serve to explain the principles of the present invention.

[0034] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 This is a schematic diagram of the structure of the first embodiment of the real-time clock circuit of this utility model;

[0036] Figure 2 This is a schematic diagram of the structure of the second embodiment of the real-time clock circuit of this utility model;

[0037] Figure 3 This is a schematic diagram of the structure of the third embodiment of the real-time clock circuit of this utility model.

[0038] The purpose, features, and advantages of this utility model will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0039] It should be understood that the specific embodiments described herein are merely illustrative of the technical solutions of this utility model and are not intended to limit this utility model.

[0040] To better understand the technical solution of this utility model, a detailed description will be provided below in conjunction with the accompanying drawings and specific embodiments.

[0041] The main solution of this utility model embodiment is: the real-time clock circuit includes an energy storage module and a timing module; the energy storage module includes at least one electrolytic capacitor, which is a capacitor with a porous anode substrate structure and a dielectric constant higher than a preset dielectric constant; the timing module is connected to the electrolytic capacitor and the power supply respectively.

[0042] Because existing supercapacitors store charge by forming an electric double layer through contact between electrodes and electrolyte, the charge is stored on the electrode surface. Due to the limitation of the specific surface area of ​​the electrode material, the energy storage density per unit volume is low, which means that it is impossible to store enough energy in a short time. This results in the inability to maintain a long recording time after the BeiDou receiver is powered off, and consequently, it is impossible to provide a reliable time reference for the long-term operation of the BeiDou receiver.

[0043] This invention provides a solution using an electrolytic capacitor with a porous anode substrate structure, which greatly increases the anode surface area, enhances the capacitor's energy storage capacity, facilitates rapid charge transfer and accumulation, and further shortens charging time. Furthermore, the selected electrolytic capacitor has a dielectric constant higher than a preset dielectric constant. By setting the preset dielectric constant value, the electrolytic capacitor can achieve a high dielectric constant, thereby storing more charge under the same voltage and electrode area, thus increasing energy storage density. Therefore, by selecting an electrolytic capacitor with a porous anode substrate structure and a dielectric constant higher than a preset dielectric constant, this invention can store more electrical energy in a short time, ensuring a longer recording time after the BeiDou receiver is powered off, and thus providing a reliable time reference for the long-term operation of the BeiDou receiver.

[0044] Based on this, the present invention provides a real-time clock circuit, referring to... Figure 1 , Figure 1 This is a schematic diagram of the structure of the first embodiment of the real-time clock circuit of this utility model.

[0045] In this embodiment, the real-time clock circuit includes: an energy storage module 100, a timing module 200, and a power supply module 300.

[0046] The energy storage module 100 includes at least one electrolytic capacitor, which is a capacitor with a porous anode substrate structure and a dielectric constant higher than a preset dielectric constant.

[0047] It should be noted that the preset dielectric constant can be set based on the dielectric constant of existing supercapacitors. For example, when the existing supercapacitor is an aluminum electrolytic capacitor, its dielectric material is aluminum oxide and its dielectric constant is 10. An electrolytic capacitor with a dielectric constant greater than 10 can be selected.

[0048] In one feasible implementation, a tantalum electrolytic capacitor can be selected as the electrolytic capacitor in the energy storage module 100. The dielectric constant of this electrolytic capacitor can reach 22, which is higher than that of existing supercapacitors (such as aluminum electrolytic capacitors). Therefore, under the same electrode area and voltage, the electrolytic capacitor can store more charge, thereby increasing the energy storage density, that is, it can store more electrical energy compared to existing supercapacitors.

[0049] Understandably, the aforementioned electrolytic capacitor has a porous anode substrate structure, meaning that the anode of the electrolytic capacitor is a porous tantalum metal structure, which increases the effective surface area of ​​the anode. Compared with existing supercapacitors, the increase in effective area can significantly increase the capacitance while keeping other conditions such as dielectric thickness unchanged. This ensures that the electrolytic capacitor can store more charge under the same voltage. Furthermore, due to the increased surface area, the distribution and collection of charge are more efficient, which helps the electrolytic capacitor complete energy storage in a short time.

[0050] The timing module 200 is connected to the electrolytic capacitor and the power supply module 300, respectively.

[0051] The electrolytic capacitor is used to receive the power supply voltage output by the power supply module 300 for energy storage when connected to the power supply module 300.

[0052] The electrolytic capacitor is also used to output energy storage voltage to the timing module 200 when the power module 300 is disconnected, so as to supply power to the timing module 200.

[0053] It should be noted that the power module 300 mentioned above can be used as the main power supply for the RTC circuit to power the timing module 200.

[0054] Understandably, the timing module 200 can be a module that provides timing functionality to the BeiDou receiver.

[0055] It should be noted that the charging time of an electrolytic capacitor depends on its capacitance and the resistance within the RTC circuit. Under ideal conditions, the charging time of an electrolytic capacitor can be calculated using the following preset charging time formula:

[0056] t=R×C

[0057] In the formula, t is the discharge time of the electrolytic capacitor, R is the total resistance in the RTC circuit, and C is the capacitance of the electrolytic capacitor.

[0058] Understandably, the discharge time of an electrolytic capacitor depends on its capacitance and the resistance within the RTC circuit. Under ideal conditions, the discharge time of an electrolytic capacitor can be calculated using the following preset discharge time formula:

[0059] t = R × C × ln(V1 / V2)

[0060] In the formula, t is the discharge time of the electrolytic capacitor, R is the total resistance in the RTC circuit, C is the capacitance of the electrolytic capacitor, V1 is the initial voltage of the electrolytic capacitor during charging, and V2 is the voltage of the electrolytic capacitor after discharge.

[0061] Based on the above preset charging time formula and preset discharging time formula, the required capacitance and quantity of electrolytic capacitors can be selected according to the required charging and discharging times to meet the needs.

[0062] like Figure 1 As shown, in one feasible implementation, the electrolytic capacitor in this embodiment includes a first electrolytic capacitor C01 and a second electrolytic capacitor C02, and the first electrolytic capacitor C01 and the second electrolytic capacitor C02 are connected in parallel. For ease of understanding, this embodiment and the following embodiments use the first electrolytic capacitor C01 and the second electrolytic capacitor C02 to describe the electrolytic capacitor, but this does not limit the solution. When other numbers of electrolytic capacitors are selected, the electrolytic capacitors are connected in parallel.

[0063] For example, a feasible scenario for using two electrolytic capacitors is as follows: When the charging voltage of the electrolytic capacitor in the RTC circuit is 5V, a tantalum electrolytic capacitor with a rated voltage of 10V and a 7343PCB package can be selected as the electrolytic capacitor in this embodiment. When the requirement is that the charging time of the electrolytic capacitor is 5s, and the RTC timekeeping duration (i.e., the longest time that the RTC circuit can maintain accurate timing after the power of the Beidou receiver is cut off) is not less than 6 minutes, in order to meet this requirement, after determining the total resistance in the RTC circuit, the charging time and the total resistance can be substituted into the preset charging time formula to calculate the required electrolytic capacitor capacitance, which needs to reach 490uF. In practical applications, the capacitance values ​​of tantalum electrolytic capacitors with a rated voltage of 10V and a 7343PCB package are generally 330uF, 470uF, and 680uF. Considering that the manufacturing process of 680uF tantalum electrolytic capacitors is more difficult and the unit cost is higher, a 470uF tantalum electrolytic capacitor can be selected.

[0064] Furthermore, the initial charging voltage and the voltage after discharging of the electrolytic capacitor can be determined according to the requirements. When the actual discharge, the total resistance, the initial charging voltage, and the voltage after discharging are substituted into the above preset discharge time formula to calculate the capacitance of the electrolytic capacitor as 800uF, since the electrolytic capacitors are connected in parallel, in order to meet the discharge time requirements, two tantalum electrolytic capacitors with a capacitance of 470uF can be selected as the first electrolytic capacitor C01 and the second electrolytic capacitor C02, respectively.

[0065] In the above scenario, the first electrolytic capacitor C01 and the second electrolytic capacitor C02 can be model JCA45-E-10V470uF-M, with a single capacitor value of 470uF, leakage current ≤18.8uA, and operating temperature -55~+125℃.

[0066] like Figure 1 As shown, the first terminal of the first electrolytic capacitor C01 and the first terminal of the second electrolytic capacitor C02 are both connected to the timing module 200, and the second terminal of the first electrolytic capacitor C01 and the second terminal of the second electrolytic capacitor C02 are both grounded.

[0067] In a specific implementation, the first terminal of the first electrolytic capacitor C01 and the first terminal of the second electrolytic capacitor C02 are also connected to the power module 300. While the power module 300 is connected to the timing module 200 to supply power, it can also connect the first electrolytic capacitor C01 and the second electrolytic capacitor C02 for energy storage, allowing the first electrolytic capacitor C01 and the second electrolytic capacitor C02 to receive the power supply voltage output by the power module 300 for energy storage.

[0068] Furthermore, when the power module 300 is disconnected from the timing module 200, it will also be disconnected from the first electrolytic capacitor C01 and the second electrolytic capacitor C02. At this time, the first electrolytic capacitor C01 and the second electrolytic capacitor C02 can discharge based on their stored electrical energy, outputting the stored energy voltage to the timing module 200 to power the timing module 200, ensuring that the timing module 200 continues to provide timing function for the Beidou receiver, thereby ensuring that time recording is maintained after the Beidou receiver is powered off.

[0069] The real-time clock circuit disclosed in this utility model includes an energy storage module and a timing module. The energy storage module includes at least one electrolytic capacitor, which has a porous anode substrate structure and a dielectric constant higher than a preset dielectric constant. The timing module is connected to both the electrolytic capacitor and a power supply. This utility model utilizes the electrolytic capacitor to store energy by receiving the power supply voltage when the power supply is connected, and to output the stored energy voltage to the timing module when the power supply is disconnected, thus powering the timing module. The electrolytic capacitor used in this invention has a porous anode substrate structure, which greatly increases the anode surface area, improves the energy storage capacity of the capacitor, facilitates rapid charge transfer and accumulation, and further shortens the charging time. Furthermore, the selected electrolytic capacitor has a dielectric constant higher than the preset dielectric constant. By setting the preset dielectric constant value, the electrolytic capacitor can achieve a high dielectric constant, thus storing more charge under the same voltage and electrode area, thereby increasing the energy storage density. Therefore, by selecting an electrolytic capacitor with a porous anode substrate structure and a dielectric constant higher than the preset dielectric constant, this invention can store more electrical energy in a short time, ensuring a longer recording time after the BeiDou receiver is powered off, and thus providing a reliable time reference for the long-term operation of the BeiDou receiver.

[0070] Based on the first embodiment of this utility model, a second embodiment of this utility model is proposed. In the second embodiment of this utility model, the content that is the same as or similar to that in the first embodiment can be referred to the above description, and will not be repeated hereafter. Based on this, please refer to... Figure 2 , Figure 2 This is a schematic diagram of the structure of the second embodiment of the real-time clock circuit of this utility model.

[0071] In this embodiment, the timing module 200 includes at least a clock chip U1.

[0072] In one feasible implementation, the aforementioned clock chip U1 is model INS5902A. The INS5902A is an ultra-low power RTC chip with a built-in 32.768KHz crystal oscillator, a high-precision temperature sensor, and a temperature compensation circuit. It can automatically adjust the clock accuracy and has an I2C communication interface, supporting multiple functions such as calendar (year, month, day, hour, minute, second) and clock timing.

[0073] The power module 300 includes: a power supply 301, a first diode D1, a first Zener diode D2, a first resistor R1, a first capacitor C1, and a second capacitor C2.

[0074] The anodes of the first diode D1 and the first Zener diode D2 are both connected to the power supply 301. The cathode of the first diode D1 is connected to the first terminal of the first resistor R1 and the first power supply pin VBAT of the clock chip U1. The cathode of the first Zener diode D1 is connected to the first terminal of the first resistor R1 and the first power supply pin VBAT of the clock chip U1. The second terminal of the first resistor R1 is connected to the first terminal of the first electrolytic capacitor C01, the first terminal of the second electrolytic capacitor C02, the first terminal of the first capacitor C1, and the first terminal of the second capacitor C2. The second terminals of the first capacitor C1 and the second terminal of the second capacitor C2 are both grounded.

[0075] The power module 300 also includes: a third capacitor C3 and a fourth capacitor C4;

[0076] The first terminal of the third capacitor C3 and the first terminal of the fourth capacitor C4 are both connected to the first power supply pin VBAT of the clock chip U1, and the second terminal of the third capacitor C3 and the second terminal of the fourth capacitor C4 are both grounded.

[0077] In the specific implementation, the first diode D1 and the first Zener diode D2 are connected between the power supply 301 and the first power supply pin VBAT of the clock chip U1 to prevent reverse current flow and stabilize the power supply voltage output by the power supply 301. The first capacitor C1, the second capacitor C2, the third capacitor C3, and the fourth capacitor C4 are used to filter the clock chip U1 when the power supply 301 is disconnected from the clock chip U1 and the first electrolytic capacitor C01 and the second electrolytic capacitor C02 supply power to the clock chip U1, thereby reducing high-frequency noise and ripple between the electrolytic capacitors and the clock chip U1.

[0078] The timing module 200 also includes a fifth capacitor C5 and a second resistor R2.

[0079] The power module 300 also includes a step-down unit 302.

[0080] The first end of the fifth capacitor C5 is connected to the first end of the step-down unit 302 and the second power supply pin VDD of the clock chip U1, respectively. The second end of the fifth capacitor C5 is grounded, and the second end of the step-down unit 302 is connected to the power supply 301. The first end of the second resistor R2 is connected to the frequency output pin FOE of the clock chip U1, and the second end of the second resistor R2 is grounded.

[0081] In a specific implementation, the aforementioned power supply 301 can be connected to the clock chip U1 via a step-down unit 302. The step-down unit 302 can step down the power supply voltage output by the power supply 301 and output the stepped-down voltage to the clock chip U1 to power the clock chip U1. The third capacitor C3, the fourth capacitor C4, and the fifth capacitor C5 are used for filtering and stabilizing the voltage, absorbing transient interference and noise on the power line, mitigating voltage fluctuations, and improving the stability of the power supply.

[0082] Based on the first and second embodiments of this utility model, a third embodiment of this utility model is proposed. In this third embodiment, content that is the same as or similar to the first and second embodiments described above can be referred to the above description and will not be repeated hereafter. Based on this, please refer to... Figure 3 , Figure 3 This is a schematic diagram of the structure of the third embodiment of the real-time clock circuit of this utility model.

[0083] In this embodiment, the timing module 200 further includes a resistor pull-up module 400.

[0084] The pull-up resistor module 400 includes: a third resistor R3, a fourth resistor R4, and a fifth resistor R5.

[0085] The first end of the third resistor R3, the first end of the fourth resistor R4, and the first end of the fifth resistor R5 are all connected to the step-down unit 302; the second end of the third resistor R3 is connected to the interrupt pin INT of the clock chip U1, the second end of the fourth resistor R4 is connected to the clock signal pin SCL of the clock chip U1, and the second end of the fifth resistor R5 is connected to the data pin SDA of the clock chip U1.

[0086] In the specific implementation, the third resistor R3, the fourth resistor R4, and the fifth resistor R5 are used as pull-up resistors to ensure that the signal lines they are connected to remain at a high level when there is no signal driving them, preventing the signal lines from being in a floating state and causing uncertain logic levels, thereby ensuring the stability and reliability of the clock chip U1 in I2C communication.

[0087] The timing module 200 also includes a current limiting module 500.

[0088] The current limiting module 500 includes: a sixth resistor R6 and a seventh resistor R7.

[0089] The first end of the sixth resistor R6 is connected to the clock signal pin SCL of the clock chip U1, the first end of the seventh resistor R7 is connected to the data pin SDA of the clock chip U1, the second end of the sixth resistor R6 is connected to the clock signal pin of the main control chip, and the second end of the seventh resistor R7 is connected to the data pin of the main control chip.

[0090] It should be noted that the aforementioned main control chip can be the chip in the Beidou receiver that communicates with the clock chip, and can be used to obtain time information from the clock chip to realize the positioning and navigation functions of the Beidou receiver.

[0091] In the specific implementation, the sixth resistor R6 and the seventh resistor R7 are resistors connected in series on the I2C communication line to limit the current between the clock chip U1 and the main control chip, preventing excessive current on the signal line from damaging the clock chip U1 and the main control chip. They also help match the impedance of the signal line and reduce signal reflection and interference.

[0092] It should be noted that the above examples are only for understanding this utility model and do not constitute a limitation on the real-time clock circuit of this utility model. Any simple modifications based on this technical concept are within the protection scope of this utility model.

[0093] This utility model also provides a Beidou receiver, which includes the real-time clock circuit described in the above embodiments.

[0094] The BeiDou receiver provided by this utility model includes the real-time clock circuit in the above embodiments. It solves the technical problem that existing technologies cannot store enough energy in a short time, resulting in an inability to maintain long-term time recording after a power outage, and consequently, an inability to provide a reliable time reference for the long-term operation of the BeiDou receiver. Compared with the prior art, the beneficial effects of the BeiDou receiver provided by this utility model are the same as those of the real-time clock circuit provided in the above embodiments, and other technical features in the BeiDou receiver are the same as those disclosed in the above real-time clock circuit embodiments, and will not be repeated here.

[0095] The above description is merely a specific embodiment of this utility model, but the protection scope of this utility model is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this utility model should be included within the protection scope of this utility model. Therefore, the protection scope of this utility model should be determined by the protection scope of the claims.

Claims

1. A real-time clock circuit, characterized in that, The real-time clock circuit includes: an energy storage module, a timing module, and a power supply module; The energy storage module includes at least one electrolytic capacitor, which is a capacitor with a porous anode substrate structure and a dielectric constant higher than a preset dielectric constant. The timing module is connected to the electrolytic capacitor and the power supply module respectively; The electrolytic capacitor is used to receive the power voltage output by the power module and store energy when connected to the power module. The electrolytic capacitor is also used to output energy storage voltage to the timing module when the power module is disconnected, so as to power the timing module.

2. The real-time clock circuit as described in claim 1, characterized in that, The electrolytic capacitor includes a first electrolytic capacitor and a second electrolytic capacitor; The first terminal of the first electrolytic capacitor and the first terminal of the second electrolytic capacitor are both connected to the timing module, and the second terminals of the first electrolytic capacitor and the second terminal of the second electrolytic capacitor are both grounded.

3. The real-time clock circuit as described in claim 2, characterized in that, Both the first electrolytic capacitor and the second electrolytic capacitor are tantalum electrolytic capacitors.

4. The real-time clock circuit as described in claim 2, characterized in that, The timing module includes at least: a clock chip; The power module includes: a power supply, a first diode, a first Zener diode, a first resistor, a first capacitor, and a second capacitor; The anodes of the first diode and the first Zener diode are both connected to the power supply. The cathodes of the first diode are connected to the first terminal of the first resistor and the first power supply pin of the clock chip, respectively. The cathodes of the first Zener diode are connected to the first terminal of the first resistor and the first power supply pin of the clock chip, respectively. The second terminal of the first resistor is connected to the first terminal of the first electrolytic capacitor, the first terminal of the second electrolytic capacitor, the first terminal of the first capacitor, and the first terminal of the second capacitor, respectively. The second terminals of the first capacitor and the second terminal of the second capacitor are both grounded.

5. The real-time clock circuit as described in claim 4, characterized in that, The power module also includes: a third capacitor and a fourth capacitor; The first terminal of the third capacitor and the first terminal of the fourth capacitor are both connected to the first power supply pin of the clock chip, and the second terminals of the third capacitor and the fourth capacitor are both grounded.

6. The real-time clock circuit as described in claim 5, characterized in that, The timing module also includes: a fifth capacitor and a second resistor; The power module also includes a step-down unit; The first terminal of the fifth capacitor is connected to the first terminal of the step-down unit and the second power supply pin of the clock chip, respectively. The second terminal of the fifth capacitor is grounded, and the second terminal of the step-down unit is connected to the power supply. The first end of the second resistor is connected to the frequency output pin of the clock chip, and the second end of the second resistor is grounded.

7. The real-time clock circuit as described in claim 6, characterized in that, The timing module also includes: a resistor pull-up module; The pull-up resistor module includes: a third resistor, a fourth resistor, and a fifth resistor; The first terminal of the third resistor, the first terminal of the fourth resistor, and the first terminal of the fifth resistor are all connected to the step-down unit; The second end of the third resistor is connected to the interrupt pin of the clock chip, the second end of the fourth resistor is connected to the clock signal pin of the clock chip, and the second end of the fifth resistor is connected to the data pin of the clock chip.

8. The real-time clock circuit as described in claim 7, characterized in that, The timing module also includes: a current limiting module; The current limiting module includes: a sixth resistor and a seventh resistor; The first end of the sixth resistor is connected to the clock signal pin of the clock chip, the first end of the seventh resistor is connected to the data pin of the clock chip, the second end of the sixth resistor is connected to the clock signal pin of the main control chip, and the second end of the seventh resistor is connected to the data pin of the main control chip.

9. The real-time clock circuit according to any one of claims 4 to 8, characterized in that, The clock chip is model INS5902A.

10. A Beidou receiver, characterized in that, The Beidou receiver includes the real-time clock circuit as described in any one of claims 1 to 9.

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