Audio signal processing circuit

Abstract

The utility model discloses an audio frequency signal processing circuit, including signal receiving unit, primary filter unit, primary signal amplification unit, secondary filter unit, secondary signal amplification unit, power regulation unit and signal output unit, and the unit is electric connection in proper order, and the audio frequency signal of signal receiving unit acquisition is outputted by signal output unit after filtering, amplification and power regulation processing. The utility model has the beneficial effect of reflecting: through power regulation unit, corresponding output signal is automatically regulated according to input signal, when input signal amplitude changes greatly, can make output signal amplitude stable and unchangeable or limit in a very small range change, so that the receiving end of MCU chip can not be unable to work normally because of too small input signal, also not only because of too big input signal and occur saturation or jam, circuit structure is simple and does not need a large number of complex algorithm analysis, can be efficiently operated on low -cost, low -power consumption treater.

Description

Technical Field

[0001] This utility model belongs to the field of circuit design technology, and in particular relates to an audio signal processing circuit. Background Technology

[0002] Musical beat is one of the core elements of music, and accurate, real-time beat recognition is of great significance for applications such as lighting rhythm control, interactive smart toys, and synchronized fitness equipment. Currently, beat detection technology based on audio signals has become a research hotspot in the fields of human-computer interaction and smart devices.

[0003] Existing music beat recognition solutions, such as the existing patent CN110853677B, "Method, Apparatus, Terminal and Non-transitory Computer-Readable Storage Medium for Recognizing Drum Beats in Songs," largely rely on complex time-frequency domain analysis and machine learning algorithms to process audio signals. These algorithms typically involve calculating spectral flux, using autocorrelation functions, or training neural network models. While these algorithms can achieve high recognition accuracy, their computational complexity is extremely high, heavily reliant on powerful CPUs, digital signal processors (DSPs), or graphics processing units (GPUs) for real-time or near-real-time processing. This results in high system hardware costs, making large-scale application in cost-sensitive consumer products difficult.

[0004] Therefore, most high-performance beat recognition products on the market today have to use expensive foreign high-end chip platforms as their core processors. This not only significantly increases the overall cost and selling price of the product, creating a technological barrier to market promotion, but also poses potential risks in the supply of core components.

[0005] Furthermore, existing beat recognition technologies face significant reliability challenges when applied to specific scenarios (such as small consumer electronics devices equipped with motors). The vibration noise generated by the device's own motor, along with ambient background noise, is collected by the microphone along with the target music signal, creating severe mixed signal interference. The spectral characteristics of this interference noise may overlap with the low-frequency energy changes of the music beat, making traditional algorithms highly susceptible to misjudgment, missed judgment, or recognition delays. This significantly reduces the accuracy and stability of beat recognition output, failing to meet the requirements of precise control applications.

[0006] In summary, the existing technology has the following main drawbacks: The algorithm is computationally complex and requires high processor performance, resulting in high system hardware costs.

[0007] Relying on foreign high-performance chip platforms results in poor controllability of product costs and supply chain risks.

[0008] It has weak anti-interference ability and poor beat recognition accuracy and robustness in real noise environment (especially motor vibration interference).

[0009] To address the aforementioned problems, designing an audio signal processing circuit is a crucial technical issue that those skilled in the art must resolve. Utility Model Content

[0010] The purpose of this invention is to solve the above-mentioned problems existing in the prior art and to provide an audio signal processing circuit.

[0011] The objective of this utility model is achieved through the following technical solution: An audio signal processing circuit is characterized by comprising at least a signal receiving unit, a primary filtering unit, a primary signal amplification unit, a secondary filtering unit, a secondary signal amplification unit, a power adjustment unit, and a signal output unit. These units are electrically connected in sequence. The circuit outputs the audio signal acquired by the signal receiving unit after filtering, amplification, and power adjustment. The power adjustment unit includes at least a resistor R9 disposed at the output terminal of the secondary signal amplification unit, and a capacitor C10 connected in series at the output terminal of the resistor R9. The other end of the capacitor C10 is connected to the positive terminal of a diode D2, and the negative terminal of the diode D2 is grounded along with one end of the capacitor C9 and one end of the resistor R11. The other end of the capacitor C9 is connected to at least a resistor R12 and the other end of the resistor R11. A MOSFET and capacitor C9 are connected in parallel at the output terminal of the resistor R12. A resistor R10 is connected in series at the output terminal of the capacitor C9. The output terminal of the resistor R10 is connected in parallel with the output terminal of the MOSFET and is connected to the secondary signal amplification unit via a series-connected capacitor C4 and resistor R8. The secondary signal amplification unit provides an audio input signal to the signal output unit.

[0012] Preferably, the power regulation unit further includes a diode D1; the anode of the diode D1 is connected in parallel with the resistor R12 to one end of the capacitor C9, the cathode of the diode D1 and the anode of the diode D2 are both connected to the output terminal of the capacitor C10; the output terminal of the resistor R12 is connected to the gate G of the MOS transistor, the source S of the MOS transistor and the end of the resistor R11 away from the capacitor C9 are combined and grounded, and the drain D of the MOS transistor and the resistor R10 are connected in parallel to the capacitor C4.

[0013] Preferably, the signal receiving unit includes a power supply voltage VDD, a resistor R1 connected in series with the power supply voltage VDD, and a receiving terminal; the first pin of the receiving terminal is connected in parallel with the output terminal of the resistor R1 to the input terminal of the primary filter unit; the second pin of the receiving terminal is grounded.

[0014] Preferably, the primary filtering unit includes a capacitor C1 disposed on the first pin output terminal of the receiving terminal, a resistor R2 disposed in series with the capacitor C1, and a capacitor C2 disposed on the output terminal of the resistor R2, the other end of the capacitor C2 being grounded.

[0015] Preferably, the primary signal amplification unit includes a resistor R3 connected to the output terminal of the resistor R2, a resistor R5 connected in parallel with the resistor R3, a capacitor C4, a first amplifier 31, and a backup power supply unit connected to the first amplifier; the first amplifier includes a first input terminal, a second input terminal, and a first output terminal; the first input terminal is connected to the backup power supply unit, and the second input terminal is connected to the resistor R3; the first output terminal is connected to the other end of the resistor R5 and the capacitor C4, and is also connected to the input terminal of the secondary filtering unit.

[0016] Preferably, the backup power supply unit includes a capacitor C3 and a resistor R4 connected in parallel, with one end of both connected to the first input terminal of the primary signal amplification unit and the other end grounded.

[0017] Preferably, the primary signal amplification unit and the secondary signal amplification unit are integrated on a first chip; the eighth pin of the first chip is connected to the power supply voltage VDD, and the fourth pin is grounded; the fifth and sixth pins of the first chip are the first and second input terminals of the primary signal amplification unit, and the seventh pin is the first output terminal of the primary signal amplification unit; the second and third pins of the first chip are the third and fourth input terminals of the secondary signal amplification unit, and the first pin is the first output terminal of the secondary signal amplification unit.

[0018] Preferably, the secondary filter unit includes a resistor R15 connected to the resistor R5, capacitor C4, and the first output terminal of the first amplifier; a resistor R16 is connected to the output terminal of the resistor R15; the output terminal of the resistor R16 is connected to pin three of the operational amplifier and capacitor C14; the other end of the capacitor C14 is connected to pin two of the operational amplifier for grounding; pin one and pin four of the operational amplifier are connected through a resistor R17, and pin five is connected to the power supply voltage VDD; a resistor R14 is connected between the resistor R17 and the grounding pin; and a capacitor C13 is connected between the output terminal of the resistor R15 and pin one of the operational amplifier.

[0019] Preferably, the secondary signal amplification unit includes a capacitor C7 connected to pin 1 of the operational amplifier and a second amplifier; the second amplifier includes a third input terminal, a fourth input terminal, and a second output terminal; the third input terminal is connected in series with the output terminal of the capacitor C7; the fourth input terminal is connected to the power adjustment unit; and the second output terminal is connected in parallel with a resistor R7, the power adjustment unit, and a three-stage filtering unit.

[0020] Preferably, the three-stage filtering unit is disposed between the second output terminal and the output terminal of the power adjustment unit and the power adjustment unit; the three-stage filtering unit includes a resistor R13 connected to the second output terminal of the secondary signal amplification unit, and a capacitor C12 disposed on the output terminal of the resistor R13; the other end of the capacitor C12 is grounded; the output terminal of the resistor R13 is also connected to the input terminal of the power adjustment unit; the power adjustment unit includes at least a main control chip MCU for receiving and outputting audio signals.

[0021] The advantages of this utility model's technical solution are mainly reflected in: The power adjustment unit automatically adjusts the corresponding output signal according to the input signal. When the amplitude of the input signal changes significantly, the amplitude of the output signal can be kept stable or limited to a very small range. This ensures that the receiver of the MCU chip will not fail to work properly due to the input signal being too small, nor will it saturate or block due to the input signal being too large. The circuit structure is simple and does not require a lot of complex algorithm analysis, enabling it to run efficiently on low-cost, low-power processors. By amplifying the signal twice and filtering it three times, the interference from environmental noise and motor vibration can be effectively resisted, thus promoting the commercial application of this technology in a wider range of fields. By combining an operational amplifier and a MOSFET, and utilizing the MOSFET's operation in the variable resistance region, automatic gain control can be achieved. Attached Figure Description

[0022] Figure 1 : Circuit structure diagram of a preferred embodiment of this utility model. Detailed Implementation

[0023] The purpose, advantages, and features of this utility model will be illustrated and explained through the following non-limiting description of preferred embodiments. These embodiments are merely typical examples of applying the technical solutions of this utility model, and all technical solutions formed by equivalent substitutions or equivalent transformations fall within the scope of protection claimed by this utility model.

[0024] In the description of the solution, it should be noted that the terms "center," "upper," "lower," "left," "right," "front," "rear," "vertical," "horizontal," "inner," and "outer," etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings and are only for the convenience and simplification of description. They do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Also, in the description of the solution, with the operator as a reference, the direction closer to the operator is the proximal end, and the direction farther from the operator is the distal end.

[0025] like Figure 1 As shown, this utility model discloses an audio signal processing circuit, comprising at least a signal receiving unit 1, a primary filtering unit 2, a primary signal amplification unit 3, a secondary filtering unit 4, a secondary signal amplification unit 5, a power adjustment unit 6, and a signal output unit 7. These units are electrically connected in sequence. The audio signal acquired by the signal receiving unit is filtered, amplified, and power-adjusted before being output by the signal output unit 7. Further, the audio signal collected by the microphone in the signal receiving unit 1 undergoes primary filtering by the primary filtering unit 2, then primary amplification by the primary signal amplification unit 3, followed by secondary filtering by the secondary filtering unit 4, then secondary amplification by the secondary signal amplification unit 5, and finally power adjustment by the power adjustment unit 6 before being output to the signal output unit 7.

[0026] Specifically, the signal receiving unit 1 includes a power supply voltage VDD, a resistor R1 connected in series with the power supply voltage VDD, and a receiving terminal 11. The first pin of the receiving terminal 11 is connected in parallel with the output terminal of the resistor R1 to the input terminal of the primary filtering unit 2; the second pin of the receiving terminal 11 is grounded.

[0027] The primary filtering unit 2 includes a capacitor C1 disposed on the first pin output terminal of the receiving terminal 11, a resistor R2 connected in series with the capacitor C1, and a capacitor C2 disposed on the output terminal of the resistor R2. The other end of the capacitor C2 is grounded. The output terminal of the resistor R2 is connected to the primary signal amplification unit 3. In this invention, the primary filtering unit 2 filters out the portion of the audio beat frequency higher than 490Hz received by the signal receiving unit 1, retains the audio beat frequency lower than 490Hz, and processes the audio signal within this frequency range to improve audio clarity.

[0028] Furthermore, the primary signal amplification unit 3 includes a resistor R3 connected to the output terminal of the resistor R2, a resistor R5 connected in parallel with the resistor R3, a capacitor C4, a first amplifier 31, and a backup power supply unit 8 connected to the first amplifier 31. Specifically, the first amplifier 31 includes a first input terminal, a second input terminal, and a first output terminal. The first input terminal is a non-inverting input terminal connected to the backup power supply unit 8; the second input terminal is an inverting input terminal connected to the resistor R3; the first output terminal is a non-inverting input terminal connected to the other end of the resistor R5 and the capacitor C4, and connected to the input terminal of the secondary filter unit 4. That is, the resistor R3 and the capacitor C2 are connected in parallel to the output terminal of the resistor R2. The output terminal of the resistor R3 is connected in parallel with the resistor R5, the capacitor C4, and the second input terminal of the primary signal amplification unit 3. That is, the resistor R3 transmits the audio signal collected by the microphone in the signal receiving unit 1 through the primary filter of capacitor C1, resistor R2 and capacitor C2, and then through resistor R5 and capacitor C4 to the second input terminal of the primary signal amplification unit 3. The other end of resistor R5 and capacitor C4 is connected in parallel with the first output terminal of the primary signal amplification unit 3 and connected to the input terminal of the secondary filtering unit 4.

[0029] In this invention, the signal that has been filtered by the primary filtering unit 2 is amplified by 50 times by the primary signal amplification unit 3, and then the amplified signal is filtered again by the subsequent secondary filtering unit 4 to further improve the granularity of the audio signal.

[0030] The secondary filtering unit 4 includes a resistor R15 connected to the resistor R5, capacitor C4, and the first output terminal of the first amplifier 31. A resistor R16 is connected to the output terminal of resistor R15. The output terminal of resistor R16 is connected to pin three of the operational amplifier and capacitor C14. The other end of capacitor C14 is connected to pin two of the operational amplifier for grounding. Pins one and four of the operational amplifier are connected via resistor R17, and pin five is connected to the power supply voltage VDD. Resistor R14 is connected between resistor R17 and the ground pin. Capacitor C13 is connected between the output terminal of resistor R15 and pin one of the operational amplifier. This invention uses the secondary filtering unit 4 to filter out the portion of the amplified audio beat frequency higher than 500Hz, retaining the audio beat frequencies lower than 500Hz. Simultaneously, the secondary filtering unit 4 also functions to change the filter cutoff frequency and adjust the gain of the circuit.

[0031] The secondary signal amplification unit 5 includes a capacitor C7 connected to pin 1 of the operational amplifier and a second amplifier 51. Specifically, capacitor C7 is connected in parallel with capacitor C13 and resistor R17 on pin 1 of the operational amplifier. The second amplifier 51 includes a third input terminal, a fourth input terminal, and a second output terminal. The third input terminal is a non-inverting input terminal, the fourth input terminal is an inverting input terminal, and the second output terminal is a signal output terminal. Further, the third input terminal is connected in series with the output terminal of capacitor C7. The fourth input terminal is connected to the power adjustment unit 6. The second output terminal is connected in parallel with resistor R7, the power adjustment unit 6, and a three-stage filter unit 9.

[0032] Furthermore, in this invention, the primary signal amplification unit 3 and the secondary signal amplification unit 5 are integrated onto a first chip. Even further, in this invention, the eighth pin of the first chip is connected to the power supply voltage VDD; the fourth pin is grounded. The fifth and sixth pins of the first chip are respectively the first and second input terminals of the primary signal amplification unit 3; the seventh pin is the first output terminal of the primary signal amplification unit 3; the second and third pins of the first chip are respectively the third and fourth input terminals of the secondary signal amplification unit 5; the first pin is the first output terminal of the secondary signal amplification unit 5.

[0033] The power adjustment unit 6 includes at least a resistor R7, a resistor R9 located at the output of the secondary signal amplification unit 5, and a capacitor C10 connected in series at the output of resistor R9. The other end of capacitor C10 is connected to the anode of diode D2, and the cathode of diode D2, capacitor C9, and one end of resistor R11 are all grounded. Resistor R7 is connected between the second input and second output of the second amplifier, acting as a feedback resistor, thus creating a negative feedback closed loop for the entire second amplifier. A portion of the output signal is "sent back" to the inverting input. This feedback signal cancels out some of the input signal variations, thereby suppressing excessive fluctuations in the output signal and allowing the amplifier to operate in a stable and controllable linear amplification region. Simultaneously, resistor R7 can change the input and output impedance, making the op-amp's output impedance very low, making the amplifier more like an ideal voltage source with a stronger load-driving capability.

[0034] The other end of capacitor C9 is connected to at least the other ends of resistor R12 and resistor R11. A MOSFET and capacitor C9 are connected in parallel to the output of resistor R12. A resistor R10 is connected in series to the output of capacitor C9. The output of resistor R10 is connected in parallel to the output of the MOSFET and is connected to the secondary signal amplification unit 5 via a series-connected capacitor C4 and resistor R8. The secondary signal amplification unit 5 provides an audio input signal to the signal output unit 7.

[0035] Furthermore, as a feedback resistor, it creates a negative feedback closed loop for the entire second amplifier. A portion of the output signal is "sent back" to the inverting input. This feedback signal cancels out some of the input signal variations, thereby suppressing excessive fluctuations in the output signal and allowing the amplifier to operate in a stable and controllable linear amplification region. Simultaneously, resistor R7 can change the input and output impedances, making the op-amp's output impedance very low, thus making the amplifier more like an ideal voltage source with a stronger load-driving capability.

[0036] Furthermore, the power regulation unit 6 also includes a diode D1. The anode of diode D1 is connected in parallel with resistor R12 to one end of capacitor C9, and the cathode of diode D1 and the anode of diode D2 are both connected to the output terminal of capacitor C10. The output terminal of resistor R12 is connected to the gate G of MOSFET, the source S of MOSFET is connected to the end of resistor R11 away from capacitor C9 and grounded, and the drain D of MOSFET is connected in parallel with resistor R10 to capacitor C4.

[0037] Furthermore, the three-stage filtering unit 9 is disposed between the second output terminal and the output terminal of the power adjustment unit 6. The three-stage filtering unit 9 includes a resistor R13 connected to the second output terminal of the secondary signal amplification unit 5 and a capacitor C12 disposed on the output terminal of the resistor R13. The other end of the capacitor C12 is grounded. The output terminal of the resistor R13 is also connected to the input terminal of the power adjustment unit 6; the power adjustment unit 6 includes at least a main control chip (MCU) for receiving and outputting audio signals. By receiving the audio signal output from the power adjustment unit 6 through the three-stage filtering unit 9, filtering the audio signal, and then transmitting the first amplitude to the MCU chip of the signal output unit 7, the audio signal is ensured to be reliable and clear.

[0038] This utility model has many other embodiments. All technical solutions formed by equivalent transformation or equivalent transformation fall within the protection scope of this utility model.

Claims

1. An audio signal processing circuit, characterized in that: It includes at least a signal receiving unit (1), a primary filtering unit (2), a primary signal amplification unit (3), a secondary filtering unit (4), a secondary signal amplification unit (5), a power adjustment unit (6), and a signal output unit (7). The above units are electrically connected in sequence to output the audio signal acquired by the signal receiving unit (1) after filtering, amplification, and power adjustment. The power adjustment unit (6) includes at least a resistor R9 disposed at the output terminal of the secondary signal amplification unit (5), and a capacitor C10 connected in series at the output terminal of the resistor R9. The other end of the capacitor C10 is connected to the positive terminal of the diode D2. The diode D2 is connected to ground at one end of capacitor C9 and resistor R11; the other end of capacitor C9 is connected to at least resistor R12 and the other end of resistor R11; the output of resistor R12 is connected in parallel with MOSFET and capacitor C9, the output of capacitor C9 is connected in series with resistor R10, the output of resistor R10 is connected in parallel with the output of MOSFET, and is connected to the secondary signal amplification unit (5) through capacitor C4 and resistor R8 set in series, and the secondary signal amplification unit (5) provides an audio input signal to the signal output unit (7).

2. The audio signal processing circuit according to claim 1, characterized in that: The power regulation unit (6) further includes a diode D1; the positive terminal of the diode D1 is connected in parallel with the resistor R12 to one end of the capacitor C9, the negative terminal of the diode D1 and the positive terminal of the diode D2 are both connected to the output terminal of the capacitor C10; the output terminal of the resistor R12 is connected to the gate G of the MOS transistor, the source S of the MOS transistor and the end of the resistor R11 away from the capacitor C9 are combined and grounded, and the drain D of the MOS transistor and the resistor R10 are connected in parallel to the capacitor C4.

3. The audio signal processing circuit according to claim 2, characterized in that: The signal receiving unit (1) includes a power supply voltage VDD, a resistor R1 connected in series with the power supply voltage VDD, and a receiving terminal (11); the first pin of the receiving terminal (11) is connected in parallel with the output terminal of the resistor R1 to the input terminal of the primary filter unit (2); the second pin of the receiving terminal (11) is grounded.

4. The audio signal processing circuit according to claim 3, characterized in that: The primary filter unit (2) includes a capacitor C1 disposed on the first pin output terminal of the receiving terminal (11), a resistor R2 disposed in series with the capacitor C1, and a capacitor C2 disposed on the output terminal of the resistor R2, with the other end of the capacitor C2 grounded.

5. The audio signal processing circuit according to claim 4, characterized in that: The primary signal amplification unit (3) includes a resistor R3 connected to the output terminal of the resistor R2, a resistor R5 connected in parallel to the resistor R3, a capacitor C4, a first amplifier (31), and a backup power supply unit (8) connected to the first amplifier (31). The first amplifier (31) includes a first input terminal, a second input terminal, and a first output terminal. The first input terminal is connected to the backup power supply unit (8), and the second input terminal is connected to the resistor R3. The first output terminal is connected to the other end of the resistor R5 and the capacitor C4, and is connected to the input terminal of the secondary filtering unit (4).

6. The audio signal processing circuit according to claim 5, characterized in that: The backup power unit (8) includes a capacitor C3 and a resistor R4 connected in parallel. One end of both is connected to the first input terminal of the primary signal amplification unit (3), and the other end is grounded.

7. The audio signal processing circuit according to claim 6, characterized in that: The primary signal amplification unit (3) and the secondary signal amplification unit (5) are integrated on the first chip; the eighth pin of the first chip is connected to the power supply voltage VDD and the fourth pin is grounded; the fifth and sixth pins of the first chip are the first and second input terminals of the primary signal amplification unit (3) and the seventh pin is the first output terminal of the primary signal amplification unit (3); the second and third pins of the first chip are the third and fourth input terminals of the secondary signal amplification unit (5) and the first pin is the first output terminal of the secondary signal amplification unit (5).

8. The audio signal processing circuit according to claim 7, characterized in that: The secondary filter unit (4) includes a resistor R15 connected to the resistor R5, capacitor C4 and the first output terminal of the first amplifier (31). A resistor R16 is connected to the output terminal of the resistor R15. The output terminal of the resistor R16 is connected to pin three of the operational amplifier and capacitor C14. The other end of the capacitor C14 is connected to pin two of the operational amplifier and grounded. Pin one and pin four of the operational amplifier are connected through a resistor R17, and pin five is connected to the power supply voltage VDD. A resistor R14 is connected between the resistor R17 and the grounding pin. A capacitor C13 is connected between the output terminal of the resistor R15 and pin one of the operational amplifier.

9. The audio signal processing circuit according to claim 8, characterized in that: The secondary signal amplification unit (5) includes a capacitor C7 connected to pin 1 of the operational amplifier and a second amplifier (51); the second amplifier (51) includes a third input terminal, a fourth input terminal and a second output terminal; the third input terminal is connected in series with the output terminal of the capacitor C7; the fourth input terminal is connected to the power adjustment unit (6); the second output terminal is connected in parallel with a resistor R7, the power adjustment unit (6) and a three-stage filter unit (9).

10. The audio signal processing circuit according to claim 9, characterized in that: The three-stage filtering unit (9) is located between the second output terminal and the output terminal of the power adjustment unit (6) and the power adjustment unit (6); the three-stage filtering unit (9) includes a resistor R13 connected to the second output terminal of the secondary signal amplification unit (5) and a capacitor C12 located on the output terminal of the resistor R13; the other end of the capacitor C12 is grounded; the output terminal of the resistor R13 is also connected to the input terminal of the power adjustment unit (6); the power adjustment unit (6) includes at least a main control chip MCU for receiving and outputting audio signals.

Images