An LED chip structure for improving device performance

Abstract

The utility model relates to a kind of LED chip structure for improving device performance, recess that is through second semiconductor layer and active layer, and extend to the inside of first semiconductor layer;With the ohmic contact of second semiconductor layer, the first conductive layer is covered in the part surface of second semiconductor layer and forms regular recess on the surface of first conductive layer first insulating layer;Covered in the part surface of first insulating layer and filled in the recess formed by first insulating layer, and the first reflective layer is electrically connected with first conductive layer;Covered in the part surface of first insulating layer and forms electrically connected with first reflective layer second conductive layer, covered in the sidewall of recess and the second insulating layer of first electric connection layer side, covered in the part surface of second insulating layer and filled in recess second reflective layer, second reflective layer forms ohmic contact with first semiconductor layer.The utility model improves external quantum efficiency, i.e. Lower forward voltage, improve chip brightness;Reduce thermal effect, prevent metal migration to cause failure.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor technology, and in particular to an LED chip structure for improving device performance. Background Technology

[0002] Existing light-emitting devices consist of a first semiconductor layer, a second semiconductor layer, and an active layer. In an LED chip, the nGaN side faces upwards as the light-emitting surface. Therefore, the N electrode forms a low-resistance ohmic contact with the nGaN while maintaining high reflectivity. The pGaN side does not emit light and requires high reflectivity while simultaneously forming a low-resistance ohmic contact with the pGaN. High-reflectivity structures typically use reactive metals such as Ag and Al. However, under electric fields, high temperature, and high humidity conditions, reactive metals are unstable and prone to ion migration, which can lead to device failure.

[0003] Therefore, this invention aims to improve the external quantum efficiency of the chip while preventing ion migration and enhancing device stability. Improving the performance of a light-emitting diode (LED) involves increasing both external quantum efficiency and device stability. Increasing external quantum efficiency reduces the forward voltage and increases chip brightness; improving device stability reduces thermal effects and prevents metal migration that could cause failure. Utility Model Content

[0004] Based on the technical problems existing in the background technology, this utility model proposes an LED chip structure to improve device performance, improve external quantum efficiency (i.e., reduce forward voltage and increase chip brightness), and improve device stability (i.e., reduce thermal effects and prevent metal migration from causing failure).

[0005] The present invention proposes an LED chip structure for improving device performance, comprising a light-emitting device composed of a first semiconductor layer, a second semiconductor layer, and an active layer; the active layer is located between the first semiconductor layer and the second semiconductor layer.

[0006] A recess that penetrates the second semiconductor layer and the active layer and extends into the interior of the first semiconductor layer;

[0007] The first conductive layer forms an ohmic contact with the second semiconductor layer.

[0008] A first insulating layer is formed on a portion of the surface of the second semiconductor layer and has regular recesses on the surface of the first conductive layer;

[0009] A first reflective layer that covers a portion of the surface of the first insulating layer and fills the depression formed by the first insulating layer, and forms an electrical connection with the first conductive layer;

[0010] A second conductive layer covers a portion of the surface of the first insulating layer and forms an electrical connection with the first reflective layer; an electrode forms an electrical connection with the second conductive layer; the first conductive layer, the first reflective layer, the second conductive layer, and the electrode together constitute the first electrical connection layer;

[0011] A second insulating layer covering the recessed sidewall and one side of the first electrical connection layer.

[0012] A second reflective layer covers a portion of the surface of the second insulating layer and fills the recessed area, wherein the second reflective layer forms an ohmic contact with the first semiconductor layer;

[0013] A third conductive layer covering a portion of the surface of the second insulating layer and forming an electrical connection with the second reflective layer, and a substrate in contact with the third conductive layer.

[0014] Preferably, when the substrate is made of a non-conductive material, the third conductive layer is the second electrical connection layer. When the substrate is conductive, the third conductive layer and the substrate together form the second electrical connection layer.

[0015] Preferably, the first conductive layer is a metal oxide, and the metal oxide is indium tin oxide, zinc oxide, or indium gallium zinc oxide.

[0016] Preferably, the first reflective layer has a regular patterned structure; the first reflective layer is made of a high reflectivity material, including silver, aluminum, titanium, titanium tungsten, and nickel.

[0017] Preferably, the second conductive layer, the third conductive layer, and the electrodes all contain a multilayer metal structure.

[0018] Preferably, the first insulating layer is an insulating material, including silicon oxide, silicon nitride, niobium oxide, tantalum oxide, titanium oxide, aluminum oxide, and silicon oxynitride. The second insulating layer is an insulating material, including silicon oxide, silicon nitride, silicon oxynitride, and aluminum oxide.

[0019] Preferably, the second reflective layer forms an ohmic contact with the first semiconductor layer with low contact resistance while having high reflectivity; the second reflective layer includes cadmium, aluminum, silver, platinum, titanium, and titanium-tungsten metal.

[0020] Preferably, the second reflective layer has a regular patterned design, wherein the vertical direction of the area not covered by the first reflective layer necessarily covers the second reflective layer; the projected area of ​​the first reflective layer and the second reflective layer in the vertical direction covers the entire light-emitting area, and the ratio of the projected area of ​​the first reflective layer and the second reflective layer to the area of ​​the light-emitting area is 1 to 1.1.

[0021] Preferably, the distance between the boundary of the second reflective layer projection and the boundary of the non-light-emitting area is greater than or equal to 5 μm; this ensures that there is no exposed active metal on the sidewall, prevents metal migration, and improves device stability.

[0022] Preferably, the patterns of the second reflective layer are electrically connected and connected to the first semiconductor layer, which can release charge, balance potential difference, and prevent metal migration.

[0023] The beneficial effects of this utility model are as follows:

[0024] This invention features a dual-patterned reflective layer structure, where the area not covered by the first reflective layer is necessarily covered by the other reflective layer in the vertical direction. This patterned design reduces the direct contact area between the metal and decreases the metal migration path. The patterns in the second reflective layer are interconnected and connected to the nGaN, effectively releasing charge, balancing the potential difference, and preventing metal migration. The sum of the projected areas of the first and second reflective layers is greater than the area of ​​the light-emitting region but does not exceed the area of ​​the non-light-emitting region, ensuring that no active metal is exposed on the sidewalls of the LED, preventing metal migration under high temperature and humidity conditions. Attached Figure Description

[0025] Figure 1 This is a schematic diagram of one embodiment of an LED chip structure for improving device performance proposed in this utility model.

[0026] Figure 2 This is a schematic diagram of another embodiment of an LED chip structure for improving device performance proposed in this utility model.

[0027] In the figure: 1. First semiconductor layer, 2. Active layer, 3. Second semiconductor layer, 4. First conductive layer, 5. First insulating layer, 6. First reflective layer, 7. Second conductive layer, 8. Second insulating layer, 9. Second reflective layer, 10. Third conductive layer, 11. Substrate, 12. Electrode. Detailed Implementation

[0028] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present utility model. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments.

[0029] Reference Figure 1-2 An LED chip structure for improving device performance includes a light-emitting device composed of a first semiconductor layer 1, a second semiconductor layer 3 and an active layer 2; the active layer 2 is located between the first semiconductor layer 1 and the second semiconductor layer 3; and a recess extends through the second semiconductor layer 3 and the active layer 2 and into the interior of the first semiconductor layer 1.

[0030] A first conductive layer 4 forms an ohmic contact with the second semiconductor layer 3. The first conductive layer 4 is a metal oxide, such as indium tin oxide, zinc oxide, or indium gallium zinc oxide.

[0031] A first insulating layer 5 is formed on a portion of the surface of the second semiconductor layer 3 and has regular recesses on the surface of the first conductive layer 4. The first insulating layer 5 is an insulating material, including silicon oxide, silicon nitride, niobium oxide, tantalum oxide, titanium oxide, aluminum oxide, and silicon oxynitride.

[0032] A first reflective layer 6 covers a portion of the surface of the first insulating layer 5 and fills the depression formed by the first insulating layer 5, and forms an electrical connection with the first conductive layer 4; the first reflective layer 6 has a regular patterned structure; the first reflective layer 6 is made of a high reflectivity material, including silver, aluminum, titanium, titanium tungsten, and nickel.

[0033] A second conductive layer 7 covers a portion of the surface of the first insulating layer 5 and forms an electrical connection with the first reflective layer 6, and an electrode 12 forms an electrical connection with the second conductive layer 7; the first conductive layer 4, the first reflective layer 6, the second conductive layer 7, and the electrode 12 together constitute the first electrical connection layer; the second conductive layer 7 and the electrode 12 are multi-layered metal structures.

[0034] A second insulating layer 8 covers the recessed sidewall and one side of the first electrical connection layer. The second insulating layer 8 is an insulating material, including silicon oxide, silicon nitride, silicon oxynitride, and aluminum oxide.

[0035] A second reflective layer 9 covers a portion of the surface of the second insulating layer 8 and fills the recessed area. The second reflective layer 9 forms an ohmic contact with the first semiconductor layer 1. The second reflective layer 9 forms an ohmic contact with the first semiconductor layer 1 with low contact resistance while having high reflectivity. The second reflective layer 9 includes cadmium, aluminum, silver, platinum, titanium, and titanium-tungsten metal.

[0036] The second reflective layer 9 has a regular, patterned design, wherein the vertical direction of the area not covering the first reflective layer 6 necessarily covers the second reflective layer 9; this utility model provides two examples, see reference. Figure 1-2 The projected area of ​​the first reflective layer 6 and the second reflective layer 9 in the vertical direction covers the entire light-emitting area, and the ratio of the projected area of ​​the first reflective layer 6 and the second reflective layer 9 to the area of ​​the light-emitting area is 1 to 1.1.

[0037] The distance between the boundary of the projected second reflective layer 9 and the boundary of the non-light-emitting area is greater than or equal to 5 μm, ensuring that no active metal is exposed on the sidewalls, preventing metal migration, and improving device stability. The patterns of the second reflective layer 9 are electrically connected and connected to the first semiconductor layer 1, which can release charge, balance potential differences, and prevent metal migration.

[0038] A third conductive layer 10 covers a portion of the surface of the second insulating layer 8 and forms an electrical connection with the second reflective layer 9. A substrate 11 is in contact with the third conductive layer 10. When the substrate 11 is a non-conductive material, the third conductive layer 10 is a second electrical connection layer. When the substrate 11 is conductive, the third conductive layer 10 and the substrate 11 together form the second electrical connection layer. The third conductive layer 10 has a multilayer metal structure.

[0039] The above description is only a preferred embodiment of the present utility model, but the protection scope of the present utility model is not limited thereto. Any equivalent substitutions or changes made by those skilled in the art within the technical scope disclosed in the present utility model, based on the technical solution and the inventive concept of the present utility model, should be included within the protection scope of the present utility model.

Claims

1. An LED chip structure for improving device performance, comprising a light-emitting device composed of a first semiconductor layer (1), a second semiconductor layer (3), and an active layer (2); the active layer (2) is located between the first semiconductor layer (1) and the second semiconductor layer (3); characterized in that, A recess that penetrates the second semiconductor layer (3) and the active layer (2) and extends into the interior of the first semiconductor layer (1); The first conductive layer (4) forms an ohmic contact with the second semiconductor layer (3). A first insulating layer (5) is formed on a portion of the surface of the second semiconductor layer (3) and has regular recesses on the surface of the first conductive layer (4); A first reflective layer (6) that covers a portion of the surface of the first insulating layer (5) and fills the depression formed by the first insulating layer (5) and forms an electrical connection with the first conductive layer (4); A second conductive layer (7) covers a portion of the surface of the first insulating layer (5) and forms an electrical connection with the first reflective layer (6), and an electrode (12) forms an electrical connection with the second conductive layer (7); the first conductive layer (4), the first reflective layer (6), the second conductive layer (7), and the electrode (12) together constitute the first electrical connection layer; A second insulating layer (8) covering the recessed sidewall and one side of the first electrical connection layer, The second reflective layer (9) covers a portion of the surface of the second insulating layer (8) and fills the recessed area, and the second reflective layer (9) forms an ohmic contact with the first semiconductor layer (1); A third conductive layer (10) covering a portion of the surface of the second insulating layer (8) and forming an electrical connection with the second reflective layer (9), and a substrate (11) in contact with the third conductive layer (10).

2. The LED chip structure for improving device performance according to claim 1, characterized in that, When the substrate (11) is a non-conductive material, the third conductive layer (10) is the second electrical connection layer. When the substrate (11) is conductive, the third conductive layer (10) and the substrate (11) together form the second electrical connection layer.

3. The LED chip structure for improving device performance according to claim 1, characterized in that, The first conductive layer (4) is a metal oxide.

4. The LED chip structure for improving device performance according to claim 1, characterized in that, The first reflective layer (6) has a regular patterned structure; the first reflective layer (6) is made of a high reflectivity material.

5. The LED chip structure for improving device performance according to claim 1, characterized in that, The second conductive layer (7), the third conductive layer (10), and the electrode (12) are all multi-layered metal structures.

6. The LED chip structure for improving device performance according to claim 1, characterized in that, The first insulating layer (5) is an insulating material, including silicon oxide, silicon nitride, niobium oxide, tantalum oxide, titanium oxide, aluminum oxide, and silicon oxynitride; the second insulating layer (8) is an insulating material, including silicon oxide, silicon nitride, silicon oxynitride, and aluminum oxide.

7. The LED chip structure for improving device performance according to claim 1, characterized in that, The second reflective layer (9) forms an ohmic contact with the first semiconductor layer (1) with low contact resistance while having high reflectivity; the second reflective layer (9) includes cadmium, aluminum, silver, platinum, titanium, and titanium tungsten metal.

8. The LED chip structure for improving device performance according to claim 7, characterized in that, The second reflective layer (9) is a regular graphic design, wherein the vertical direction of the area not covered by the first reflective layer (6) must cover the second reflective layer (9); the projected area of ​​the first reflective layer (6) and the second reflective layer (9) in the vertical direction covers the entire light-emitting area, and the ratio of the projected area of ​​the first reflective layer (6) and the second reflective layer (9) to the area of ​​the light-emitting area is 1 to 1.

1.

9. The LED chip structure for improving device performance according to claim 8, characterized in that, The distance between the boundary of the projection of the second reflective layer (9) and the boundary of the non-luminous area is greater than or equal to 5 μm.

10. The LED chip structure for improving device performance according to claim 9, characterized in that, The second reflective layer (9) is electrically connected to the pattern and is connected to the first semiconductor layer (1).

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