Method for manufacturing an LED module and module

Abstract

Method for manufacturing an LED module, - in which a layer stack (ST) comprising several sublayers is produced on a growth wafer (WS) by means of layer deposition or epitaxial growth, which includes at least one active epitaxial layer (ES) of the LED, - in which, integrated with the generation of the layer stack or at least later an electrically conductive sublayer of the layer stack is structured in such a way that a plurality of electrically separated chip areas (CB) are defined, - in which a temporary support (TT) is attached over a large area to the stack of layers, - in which the growth wafer is separated from the stack of layers, - in which the surface of the temporary carrier opposite the surface with the layer stack is connected to a first transfer film (TF), - in which the layer stack is mechanically separated into module units (MU), - in which the separated module units are tested, detached from the temporary carrier and the tested module units are attached to a substrate (SU) and thereby combined to form an LED module.

Description

[0001] The invention relates to a method for manufacturing an LED module and the LED module itself, in particular a large-area LED module, such as can be used for lighting purposes and in the high-performance sector.

[0002] A method for manufacturing a thin-film semiconductor chip comprising a light-emitting diode (LED) is described, for example, in DE 100 59 532 A1. In this process, a thin LED structure is grown on an epitaxial substrate, then bonded to a substitute substrate, and subsequently the LED structure is separated from the epitaxial substrate. The thin film is separated by first thinning the epitaxial substrate by grinding after bonding the thin film to the substitute substrate, and then removing the remaining epitaxial substrate in an etching step. The original epitaxial substrate is thereby completely destroyed.

[0003] However, methods are known in which the epitaxy substrate is at least partially preserved during removal and can be used again for epitaxy.

[0004] For example, it is also possible to induce a structural change in the epitaxial or growth substrate prior to epitaxy by bombarding it with suitable energy at a specific, narrowly defined substrate depth. This change allows for the mechanical cleavage of the epitaxial substrate. The remnants of the epitaxial substrate cleaved along with the thin film can then be removed mechanically, chemically, by plasma etching, or by a combination of these methods. Epitaxially generated sacrificial layers as the uppermost layer of the epitaxial substrate are also known. Furthermore, it is possible to detach a generated layer structure from the growth substrate using laser lift-off (LLO). For example, a layer of gallium nitride can be decomposed using a laser.

[0005] A high-performance LED module requires large chip areas of the LED chips that are thermally well coupled to the housing. Homogeneous light-emitting surfaces without inactive bridges or edges are particularly advantageous for applications with high luminance, such as those required for projection applications or spotlights. Area emitters with a Lambertian beam pattern are beneficial for almost all applications.

[0006] Efficient, area-wide light emission is achieved with thin-film LEDs, particularly those that feature a mirror structure beneath the light-emitting layer, also known as the epitaxial layer. For this, the epitaxial layer or layer sequence, also called the epilayer, is grown onto a crystalline substitute or growth wafer. The mirror is then deposited onto the epitaxial layer, the mirror structure is reinforced with a solid substrate, and subsequently, the substrate and the reflective material are separated from the crystalline growth wafer. Contact structures are then created on the now exposed epitaxial layer, and the light-emitting surface may be further optimized. This can involve roughening the surface or applying other optical coatings.

[0007] The production of LED modules has so far been carried out by defining chips on the substitute substrate, structuring and singulating them together with the growth wafer, and then assembling the singulated chips together with the attached substitute substrate to form an LED module, which is then electrically and mechanically mounted on a substrate.

[0008] A disadvantage of this method is that handling relatively small chips individually is complex, and the non-illuminating surface area in the LED module is considerable due to the spacing between the chips required for assembly. Increasing the chip size is only possible to a limited extent, as this can create mechanical stress in the sensitive chip and lead to damage. Additionally, increasing the individual chip area reduces the yield of chips that are free of defects or fall within an acceptable tolerance range.

[0009] The publication DE 10 2004 036 962 A1 describes a method for manufacturing semiconductor chips using thin-film technology and a semiconductor chip using thin-film technology.

[0010] Document US 6,623,171 B2 describes a socket and system for optoelectronic connections and a method for manufacturing such a socket and system.

[0011] The object of the present invention is therefore to provide an improved method and a module produced therewith which avoids the aforementioned disadvantages.

[0012] This problem is solved according to the invention by a method with the features of claim 1. Advantageous embodiments and an LED module with improved properties can be found in further claims.

[0013] The invention proposes a method in which, as before, a stack of thin films comprising at least one epitaxial layer of the LED is grown on a growth wafer, and in which this stack of layers is mounted onto a mechanically rigid support after detaching the growth wafer. In contrast to known methods, however, a temporary support is used from which the stack of layers, structured into chip areas, is subsequently removed. The stack of layers with the chip areas is then attached to a substrate and assembled there to form an LED module. In this way, improved thermal contact is achieved between the stack of layers containing the LED, which is mounted directly onto the substrate. The previously used support is removed, and its (poor) thermal conductivity is therefore no longer critical for the LED module.Heat transfer from the electrically active layer stack to the substrate now occurs solely via the connection, which can be, for example, a solder joint with good electrical and thermal conductivity. Another option is to use an electrically conductive adhesive, perhaps filled with metallic particles. Other thermally conductive particles, such as AlN, BN, or carbon clusters like C, can also be incorporated into the layer. 60 It should be included.

[0014] The layer stack can comprise several sublayers, at least one of which is the epitaxial, light-emitting layer of the LED. This layer stack is already structured on the growth wafer to define a plurality of electrically separated chip regions. This is achieved primarily by applying a suitably structured contact layer. However, the structuring can also include at least partially separating further layers of the layer stack or other LED layers.

[0015] The stack of layers is attached over a large area to the temporary support. The temporary support can be made of any material, possesses sufficient mechanical strength, and can advantageously be structured using a mechanical cutting process.

[0016] After the growth wafer is removed from the layer stack, the layer stack is mechanically separated into module units on the temporary support. These modules can be of the same or different sizes. Advantageously, the temporary support is bonded to a first transfer film, which is applied to the surface of the temporary support opposite the layer stack. This ensures sufficient mechanical cohesion of the separated module units, thus improving processability. The identically sized module units are then tested, with particular attention paid to their electrical functionality and / or luminosity.

[0017] Tested module units, exhibiting values ​​within a tolerance range, are now detached from the temporary carrier and transferred to a substrate. This substrate serves as the substrate for the LED and can be a housing component or another intermediate carrier. The module units are electrically and mechanically attached to the substrate, thus assembling them into a larger LED module.

[0018] The layer stack can have at least one further layer applied over the epitaxial layer, either as a whole or in a structured manner, which is applied and / or structured after epitaxy. This layer can be selected from an auxiliary layer, contact layer, mirror layer, or connecting structures, or it can consist of a combination of these layers. A second contact layer can be applied to the layer stack and structured after transfer to the temporary support.

[0019] It is also possible to provide the stack of layers with electrical contacts or with only one contact layer on just one surface.

[0020] According to one embodiment, it is possible to separate the layer stack into equally sized module units during the separation process, each unit comprising a multiple of chip areas. This allows a corresponding number of chip areas to be handled together and, in particular, transferred to the substrate together. Thus, despite the electrical separation of the chip areas, larger module units can still be used, reducing the assembly effort compared to processing and handling individual chip areas. Furthermore, the number of interfaces between the transferred module units, and therefore the "lost" area required, is reduced compared to a known method in which individual chip units are transferred.

[0021] While the interfaces between the chip areas, which are formed at least in the corresponding contact layers, can be lithographically designed and therefore have a minimal width, the interface width between the module units on the substrate is significantly larger due to the manufacturing process and assembly. Nevertheless, the proposed method reduces the proportion of non-light-emitting surface, which is essentially determined by the interfaces, compared to known assembly methods.

[0022] The module units are arranged on the substrate in a regular arrangement, preferably with all module units being of the same size.

[0023] The test procedure determines the electrical and / or optical parameters of the module units. This makes it possible to maintain the properties of different module units within an arbitrarily narrow tolerance range. This can be achieved through a process called binning. For this purpose, the tested module units are divided into at least two categories according to the test results, each category fulfilling a given range of values ​​for the tested parameter(s). This range is narrower than the natural range of this parameter across all module units on a wafer. For an LED module with a tight tolerance range, only module units from the same category are used. Using module units from the other category, an LED module with an equally tight tolerance range can be produced, but with different absolute values ​​compared to the first LED module.

[0024] However, it is also possible to distribute module units with different categories of their electrical values ​​in an LED module so evenly that an even light emission is achieved.

[0025] An LED module can comprise two contact layers located on opposite surfaces of the layer stack. The first contact layer is created as the top layer of the layer stack directly on the growth wafer. The second contact layer is created on the now exposed surface of the layer stack after the growth wafer is removed. The contact layer can also be created in the form of a connection structure. It is also possible to form a connection structure above the contact layer.

[0026] A solderable layer can be applied as a connection structure. However, other layers, particularly electrically conductive and / or adhesion-promoting layers, are also suitable as connection structures.

[0027] Advantageously, the module units are soldered, glued, or otherwise electrically and mechanically mounted onto a substrate, the substrate comprising a contact structure corresponding to the interconnection structure as its uppermost layer. The structuring is preferably designed to correspond to the chip areas, which are electrically differentiated but may be interconnected via the contact structure.

[0028] The contact structure ensures the electrical connection of the chip areas within the module and can also include the interconnection of different chip areas of identical and / or different module units.

[0029] In one variant of the process, the layer stack on the temporary support is separated in such a way that the individual chip areas are mechanically separated from one another and remain connected only via the temporary support and / or the transfer carrier. This preserves the relative arrangement of the chip areas within a module unit, allowing all chip areas of a module unit to be handled together and, in particular, to be jointly removed from the temporary support and transferred to the substrate, maintaining their original relative arrangement. This ensures, in particular, the retention of the relatively small gap widths between the chip areas. This is especially possible when the separation of the layer stack into individual chip areas is performed lithographically and with appropriate microstructuring techniques.

[0030] Even after the mechanical separation of the layer stack into chip areas, the assembly can be reconstructed in a module unit by introducing a filler material, and in particular a plastic material possibly filled with particulate fillers, into the interfaces between the individual chip areas. Such a technology for producing a potentially intermediate chip assembly is known for semiconductor chips, for example, from the article "An Embedded Device Technology Based on a Molded Reconfigured Wafer" by M. Brunnbauer et al. in Proceedings of the IEEE Electronic Components and Technology Conference 2006, page 547 ff.

[0031] After the plastic or filler has cured, if necessary, the module unit as a whole can be handled more easily and, in particular, transferred more easily to the final LED substrate or an intermediate carrier (submount). The filler can remain in the LED module or be removed again after the final assembly of the module units.

[0032] In one variant of the process, it is also possible to separate the individual module units lithographically. Preferably, however, the module units are structured using a mechanical process, in particular a sawing process.

[0033] An LED module produced according to the inventive method differs from known LED modules in that no intermediate carrier is arranged between the layer stack comprising the epitaxial layer and the substrate, which could impede heat dissipation from the layer stack to the substrate during operation of the LED module. Accordingly, such a new LED module has a substrate on which a plurality of equally sized module units are directly applied. Each module unit consists of a layer stack that essentially contains the epitaxial light-generating layer embedded between two contact layers. Each module unit is divided into a plurality of electrically isolated chip areas. Each module unit can be directly attached to a contact structure applied to the substrate via a contact layer and, in particular, soldered or glued in place.

[0034] In a further embodiment, the LED module has a metallic or dielectric mirror layer as the lowest sublayer of the layer structure facing the substrate. Its reflective effect increases the luminous efficacy of the finished LED module. A dielectric mirror layer can comprise one or more so-called λ / 4 layers, wherein successive dielectric mirror sublayers preferably alternate between a relatively high and a relatively low optical refractive index.

[0035] In the LED module, the layer structure is separated between the module units. According to the invention, it is also separated between the chip areas, whereby the distance between adjacent chip areas within a module unit is smaller than the distance between adjacent chip areas of different module units. This additional structuring leads to a mechanical decoupling of the relatively small chip areas, so that mechanical stresses caused by assembly, such as those that can occur with larger chip areas, are reduced to an acceptable level. This also reduces the probability of stress-related consequential damage occurring during the subsequent operation of the LED module. This increases the service life of the LED modules as well as the yield of defect-free or tolerance-compliant LED modules.

[0036] In the LED module, each chip area is preferably designed to be individually electrically controllable. However, a preferred application of the LED module lies in large-area, high-performance applications that require high luminance and a homogeneous illuminated surface. Accordingly, the chip areas can also all be electrically controlled in parallel.

[0037] In the LED module according to the invention, the substrate can be an intermediate carrier, which is intended, for example, for installation in a subsequent housing of the LED module. However, the substrate can also be part of a housing, and in particular the lower part of a housing for the LED module. An intermediate carrier can then be attached to a final carrier, which can be, for example, part of a headlight, a projector, or other device of the respective end application.

[0038] The invention is explained in more detail below with reference to exemplary embodiments and the accompanying figures. The figures serve to illustrate the invention and are therefore only schematic and not to scale. Accordingly, neither absolute nor relative dimensions can be derived from the figures. Identical or functionally equivalent parts are designated with the same reference numerals. Fig. Figure 1 shows different process stages and process variants in a schematic cross-section. Fig. Figure 2 shows a schematic cross-section of an LED module. Fig. Figure 3 shows another LED module in schematic cross-section, Fig. Figure 4 shows an LED module in a top view of the upper structured contact layer, Fig. Figure 5, in contrast, shows a top view of an LED module structured into chip units, which is known per se. Fig. Figure 6 shows a well-known large-area chip unit in a top view. Fig. Figure 7 shows a schematic cross-section of a known LED module structured into chip units.

[0039] Fig. Figure 1 shows various process steps in the fabrication of an LED module. The process begins with a crystalline growth wafer WS, for example, made of sapphire or GaAs. A silicon wafer or other crystalline materials are also suitable. A stack of layers ST is deposited onto this wafer, comprising at least one epitaxial layer ES. Lattice matching and barrier layers can be incorporated between the epitaxial layer and the crystalline growth wafer WS. The layer structure also includes the LED's radiation-emitting layer in the form of at least one epitaxial layer ES. This layer can comprise a semiconductor junction, a heterostructure, a quantum structure, or an electroluminescent layer. The quantum structure can include quantum wells, quantum troughs, quantum wires, or quantum dots.

[0040] The layer structure of the ST stack corresponds to a conventional thin-film LED, in which the light-emitting layer is grown as an epitaxial layer on a growth substrate. At least one initial contact layer, KS1, is provided above the ST stack; this layer can be applied either across the entire surface or in a structured manner. The KS1 contact layer is structured, for example, such that individual chip regions CB are electrically separated from one another, or that the contact layer provides an electrically isolated contact area for each chip region CB. The structuring of the KS contact layer is achieved primarily through photolithography, with the resulting structural grooves having widths of up to 20 µm and, in some cases, even in the sub-µm range.

[0041] Even within the first contact layer KS1, a further superstructure can be implemented, in which several chip units together form a module unit ME, and where different module units are separated from each other by a distance that is greater than that of individual chip units within a module unit ME. Furthermore, a mirror layer, for example a dielectric or metallic mirror, can be provided below or above the contact layer KS.

[0042] Fig. Figure 1B shows the arrangement after a temporary support TT has been applied to the contact structure. The temporary support can, for example, be glued or otherwise attached. The temporary support is made of any mechanically stable, but preferably mechanically structurable, material and serves solely to stabilize the layer stack or its layer structure.

[0043] In the next step, the growth wafer WS is replaced by the layer stack ST. Fig. Figure 1C shows the arrangement at this stage of the process. Various methods, some of which were mentioned at the beginning of the description, are known for this purpose and can be used here.

[0044] In the next step, a second contact layer KS2 is applied to the now exposed surface of the layer stack and is either integrated or subsequently structured into chip areas CB and module units ME. Preferably, the first and second contact layers KS1 and KS2 have the same structure; at least, the dividing lines between the chip areas CB and module units ME in the first and second contact layers are congruent. Fig. Figure 1D shows the arrangement at this stage of the process.

[0045] Fig. Figure 1E shows the arrangement after a further structuring step in which the layer stack ST is separated along the separation lines TLM between the module units ME. The separation is preferably mechanical and such that at least the layer stack and the two contact layers are completely separated from each other between two module units. A transfer film TF, bonded to the back of the temporary carrier TT, stabilizes the structure and maintains the relative arrangement of the module units to each other even if the temporary carrier is partially or completely severed during the separation process. Fig. Figure 1F shows this case, where the arrangement of the different module units ME is only held together by the transfer film TF.

[0046] At the level of Fig. 1E or Fig. 1F now performs a test procedure for the individual module units ME, determining their electrical and / or optical parameters. Module units whose electrical parameters lie within a tolerance range required for the LED module are marked or recorded in a memory and reserved for further processing.

[0047] Fig. Figure 1G shows a variant in which, in addition to structuring the module units, the chip areas are also structured by cutting the layer stack ST between each two adjacent chip areas of a module unit in the area of ​​the chip separator lines TLC. This structuring step can also be carried out partially or completely through the temporary carrier TT up to the transfer foil TF, as shown in Figure 1G. Fig. 1G is shown. This mechanically decouples the chip areas of a module unit ME from each other.

[0048] To improve handling within a module unit and, in particular, to facilitate transfer to a substrate, the gaps between the chip areas can be filled with a filler compound after the layer stack has been separated into chip sections. For example, a plastic can be introduced and, if necessary, cured. The filler compound can be designed to remain in the finished LED module. However, it is also possible to remove the filler compound after the module units have been mounted on the substrate.

[0049] In the next step, the tested module units ME, intended for further processing, are detached from the temporary carrier TT and mounted on a substrate SU. This substrate has a contact structure KST that corresponds to the structure of the first contact layer KS1. The contact structure KST comprises at least one metallization layer and may also include bonding agents, such as a solder layer, a solder-containing layer, or another bonding layer, for example, an electrically conductive structured adhesive layer.

[0050] The module unit ME, detached from the temporary carrier TT using a suitable method, is now placed with its first contact layer KS1 onto the contact structure on the substrate SU and electrically and mechanically connected there. This can be done by gluing, soldering or another joining method depending on the joining material.

[0051] In an alternative version of this method, the bonding agent can already be applied at the stage of... Fig. 1A is generated and structured above the first contact layer.

[0052] Fig. Figure 2 shows a substrate SU with the layer stack ST of a module unit detached from the temporary support TT, which is bonded to or attached to the substrate via the contact structure. The case shown is where module units ME are arranged according to the Fig. 1F are used, which are connected to each other via the layer stack ST or at least via the epitaxial layer ES. The first and second contact layers KS1, KS2, as well as the contact structure KST, are structured according to the chip areas and mechanically decoupled.

[0053] Fig. Figure 3 shows a substrate SU with the layer stack ST of a module unit ME, in which, unlike the design according to Fig. 2. The epitaxial layer of the layer stack is structured according to the chip areas CB and is cut at the separation lines TLC between adjacent chip areas. In this way, each chip area is completely mechanically decoupled across all layers of the layer stack ST and contact layers KS and contact structures KST. This reduces the overall height of the maximum thermomechanical stress that can build up and thus also the risk of breakage of one or more layers of the layer stack.

[0054] Fig. Figure 4 shows a top view of a darker, structured first contact layer KS1 of a module unit ME. The structuring of the first contact layer is such that minimal shading of the light emitted by the LED through contact layer KS1 is optimized against sufficient conductivity or minimal resistance of the structured contact layer. From the Fig. Figure 4 also makes it clear that the TLC interfaces between the chip areas CB are negligible relative to the total area of ​​a chip area and therefore result in only minimal shadowing. The TLC interfaces created by lithography have a width of, for example, 10 µm.

[0055] In contrast, in Fig. Figure 5 shows a top view of the first contact layer of a conventionally manufactured LED module using individually structured chip areas. Each chip area is handled individually and mounted on the substrate, resulting in larger gaps of approximately 50 to 150 µm, for example 100 µm, between individual chip areas due to the manufacturing process.

[0056] Fig. Figure 6 shows the structuring of the first contact layer in the case where a single manageable chip area CB is provided with a correspondingly larger base area, which is several times the base area of ​​a single chip area from the in Fig. The 5 illustrated, well-known example is included. While such a structure also saves assembly effort and thus process costs, this large chip area carries the risk of large thermomechanical stresses occurring when gluing or soldering this chip area onto the substrate, which can damage or destroy the chip area or its active layer.

[0057] Fig. Figure 7 shows a section of a known LED module in which each chip area CB is individually structured and connected to a contact structure KST on the substrate SU via a permanent carrier PT. Besides the relatively large distance between individual chip areas, this known arrangement has the disadvantage that heat dissipation from the active layer of the layer stack ST must pass through the permanent carrier PT and is hindered or determined by it. The direct deposition of the layer stack ST onto the contact structure KST of the substrate SU according to the invention, as shown in Figure 7, offers a significant advantage. Fig. 2 or Fig. Figure 3 shows a significantly lower thermal resistance and therefore better heat dissipation.

Claims

[1] Method for manufacturing an LED module, - in which a layer stack (ST) comprising several sublayers is produced on a growth wafer (WS) by means of layer deposition or epitaxial growth, which includes at least one active epitaxial layer (ES) of the LED, - in which, integrated with the generation of the layer stack or at least later an electrically conductive sublayer of the layer stack is structured in such a way that a plurality of electrically separated chip areas (CB) are defined, - in which a temporary support (TT) is attached over a large area to the stack of layers, - in which the growth wafer is separated from the stack of layers, - in which the surface of the temporary carrier opposite the surface with the layer stack is connected to a first transfer film (TF), - in which the layer stack is mechanically separated into module units (MU), - in which the separated module units are tested, detached from the temporary carrier and the tested module units are attached to a substrate (SU) and thereby combined to form an LED module. [2] Method according to claim 1, - in which at least one further layer is applied over the entire surface or in a structured manner to the active epitaxial layer (ES) before the temporary support (TT) is attached, which is selected from auxiliary layer, contact layer (KS), mirror layer and connecting structures or combinations of these layers. [3] Method according to claim 1 or 2, wherein the layer stack (ST) is separated into equally sized module units (ME), each comprising a plurality of chip areas (CB). [4] Method according to any one of claims 1-3, - in which at least the layer stack (ST) is mechanically separated into module units (ME), - in which the separated module units are tested electrically and / or optically, - in which the tested module units are detached from the temporary carrier (TT) and attached to a substrate (SU) in a regular arrangement intended for the LED module. [5] Method according to any one of claims 1-4, - in which module unit binning is performed, whereby one or more parameters and at least the luminous intensity of each module unit are determined in the test procedure, - in which the tested module units are divided into at least two categories according to the test result, each fulfilling a given range of values ​​for the tested parameter(s) that is narrower than the natural range of this parameter within all module units of a wafer, - where only module units of the same category are used for an LED module. [6] Method according to one of claims 1-5, wherein a mirror layer is produced as the uppermost sublayer of the layer stack. [7] Method according to any one of claims 1-6, wherein after separating the growth wafer (WS) on the layer stack (ST) a contact layer (KS) and / or a connection structure is produced. [8] Method according to claim 7, wherein a solderable layer is applied as the connecting structure. [9] Method according to one of claims 1-8, wherein the module units (ME) are soldered onto a substrate (SU) which comprises as the top layer a contact structure (KST) corresponding to the connection structure. [10] Method according to any one of claims 1-9, - in which the layer stack (ST) on the temporary carrier (TT) is separated in such a way that the individual chip areas (CB) are separated from each other, but remain connected to each other via the temporary carrier and / or the transfer carrier, - in which, in each tested module unit, all chip areas are handled together and, in particular, jointly detached from the temporary carrier and transferred to the substrate (SU) in such a way that their original relative arrangement to each other is maintained. [11] Method according to any one of claims 1-10, wherein the chip areas (CB) are lithographically structured and the module units (ME) are mechanically structured. [12] LED module comprising a substrate (SU) with a plurality of equally sized module units (ME) directly applied thereon, each comprising a layer stack (ST) divided into a plurality of electrically separated chip areas (CB), wherein the layer stack essentially comprises a light-emitting epitaxial layer (ES) arranged between two contact layers (KS1, KS2), and the layer structure is separated between the chip areas (CB), wherein on the substrate (SU) the distance between the adjacent chip areas within a module unit (ME) is smaller than the distance between the adjacent chip areas of different module units (ME). [13] LED module according to claim 12, wherein the module units (ME) are applied directly to a contact structure (KST) applied to the substrate (SU) via their contact layers (KS). [14] LED module according to claim 12 or 13, wherein the lowest layer of the layer structure facing the substrate (SU) comprises a metallic or dielectric mirror layer. [15] LED module according to one of claims 12-14, wherein each chip area (CB) is designed to be electrically controllable individually. [16] LED module according to one of claims 12-15, wherein the substrate (SU) is an intermediate carrier intended for installation in a housing or on a final carrier. [17] LED module according to one of claims 12-15, wherein the substrate (SU) is the lower part of a housing. [18] LED module according to one of claims 12-17, which is divided into equally sized module units (ME).

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