Semiconductor processing processes

Abstract

Machining method for a semiconductor wafer with a setup area in which a plurality of semiconductor facilities are each formed in a plurality of areas subdivided by a plurality of intersecting parting lines formed on the front face of the semiconductor wafer, and a circumferential boundary area surrounding the setup area, wherein the machining method comprises: a protective tape fastening step of attaching a protective tape to the front of the semiconductor wafer; a grinding step of grinding the back side of the semiconductor wafer in a central area corresponding to the setup area to form a circular recess and an annular projection encompassing the circumferential boundary area surrounding the circular recess after performing the protective tape attachment step; a protective tape removal step of removing the protective tape from the front of the semiconductor wafer after performing the grinding step; a substrate provision step of applying an adhesive to only an outer circumferential section of the semiconductor wafer in order to bond a substrate to the front of the semiconductor wafer after performing the protective tape removal step; and an additional processing step of performing additional processing on the semiconductor wafer after performing the substrate preparation step.

Description

BACKGROUND OF THE INVENTIONField of the invention

[0001] The present invention relates to a semiconductor wafer processing method which does not impair the handling of a semiconductor wafer with a reduced thickness. State of the art

[0002] In a semiconductor device manufacturing process, dividing lines called streets are arranged in a grid pattern on a front surface of a substantially disk-shaped semiconductor wafer to thereby divide a plurality of regions, in each of which devices such as ICs and LSIs are formed. The semiconductor wafer is cut along the streets using a cutter, thereby dividing the semiconductor wafer into individual semiconductor chips (devices). Before cutting the semiconductor wafer along the streets, a back surface of the semiconductor wafer is ground to reduce the thickness of the semiconductor wafer to a predetermined thickness. In recent years, in order to achieve a reduction in the size and weight of electrical equipment, it has become necessary to further reduce the thickness of a wafer to, for example, approximately 50 µm.Such a thin wafer ground in this manner is difficult to handle, and therefore, there is a possibility of damage to the wafer during transportation or the like. To address this problem, Japanese Patent Publication No. JP 2007-19461 A proposes a grinding method such that the back surface of a wafer is ground only at a central portion corresponding to a device region formed on the front surface of the wafer, thereby forming a circular recess at this central portion and consequently forming an annular protrusion on the back surface of the wafer at a peripheral portion corresponding to a peripheral boundary region surrounding the device region.

[0003] As a further measure to facilitate handling of such a thin wafer, the use of a substrate called a support plate is disclosed in Japanese Patent JP 2004-207606 A, for example. Generally, the substrate is attached to a front surface of a wafer, and a back surface of the wafer is then ground by a grinder. The wafer is then subjected to predetermined processing as needed, and the substrate is subsequently removed from the wafer. The wafer is then cut by a cutter to obtain individual devices.

[0004] As a new three-dimensional arrangement technique, a stacking technique in which a plurality of semiconductor chips are stacked and through electrodes penetrating through the stacked semiconductor chips are formed to connect these semiconductor chips, or a stacking technique in which a plurality of semiconductor wafers are stacked and through electrodes penetrating through the stacked semiconductor wafers are formed to connect these semiconductor wafers, has recently been developed. Summary of the invention

[0005] The substrate is attached to the front surface of the semiconductor wafer by means of an adhesive, and the device surface of the wafer is formed as a microscopic structure. Accordingly, after removing the substrate from the wafer, it is difficult to remove the adhesive remaining in this microscopic (uneven) structure. Furthermore, the substrate to be used in grinding the wafer must have a high degree of flatness, and such a substrate with high flatness is very expensive. Accordingly, a method for grinding the wafer without using such a substrate is desired.

[0006] On the other hand, in the three-dimensional mounting technique using through-electrodes, it is necessary to manufacture a semiconductor wafer with through-electrodes. Manufacturing a semiconductor wafer with through-electrodes requires various processes, including forming the through-electrodes, forming protrusions on the front side of the wafer, and forming a film on the back side of the wafer. However, the following problems may arise. Generally, a semiconductor wafer for use in three-dimensional mounting has a thickness of 50 μm or less. Accordingly, to prevent a sharp edge during wafer grinding, the wafer must be subjected to edge trimming before grinding, which requires laborious steps.

[0007] In the process of manufacturing a semiconductor wafer with through-electrodes, it is necessary to perform a heat treatment, such as a metal foil formation step comprising heating at approximately 450°C and a reflow step comprising heating at approximately 200°C. Accordingly, in the case where a substrate is attached to the front side of the wafer using an adhesive, the adhesive may remain on the device surface of the wafer after performing the above-mentioned heat treatment. Furthermore, the adhesive that can withstand such high temperatures is expensive.

[0008] It is therefore an object of the present invention to provide a semiconductor wafer processing method that can solve the above problems of the prior art.

[0009] According to one aspect of the present invention, there is provided a processing method for a semiconductor wafer having a device region in which a plurality of semiconductor devices are each formed in a plurality of regions divided by a plurality of intersecting division lines formed on the front side of the semiconductor wafer, and a peripheral division region surrounding the device region, the processing method comprising a protective tape attaching step of attaching a protective tape to the front side of the semiconductor wafer; a grinding step of grinding the back side of the semiconductor wafer in a central region corresponding to the device region to thereby form a circular recess and an annular projection comprising the peripheral boundary region surrounding the circular recess after performing the protective tape attaching step;a protective tape removal step of removing the protective tape from the front side of the semiconductor wafer after performing the grinding step; a substrate providing step of applying an adhesive / coupling agent to only an outer peripheral portion of the semiconductor wafer to bond a substrate to the front side of the semiconductor wafer after performing the protective tape removal step; and an additional processing step of performing additional processing on the semiconductor wafer after performing the substrate providing step.

[0010] Preferably, the semiconductor processing method according to the present invention further comprises a circular cutting step of circularly cutting the semiconductor wafer to thereby separate the device region from the peripheral boundary region after the additional processing step.

[0011] In the semiconductor wafer processing method according to the present invention, the protective tape is attached to the front surface of the semiconductor wafer without using a substrate during grinding the semiconductor wafer to form the circular recess on the back surface of the semiconductor wafer in its central region corresponding to the device area. Accordingly, an expensive substrate is not required during grinding the semiconductor wafer, and the problem of the sharp edge after grinding does not occur. Furthermore, by providing the substrate on the semiconductor wafer, the adhesive is applied only to the outer peripheral portion of the semiconductor wafer to bond the substrate to the front surface of the semiconductor wafer. Accordingly, the adhesive does not remain in the device area even after the heat treatment. In addition, the amount of adhesive material to be used when providing the substrate on the semiconductor wafer can be reduced.

[0012] The above and other objects, features and advantages of the present invention and the mode for carrying them into effect will become more apparent and the invention itself will be best understood by studying the following description and the appended claims with reference to the accompanying drawings which show some preferred embodiments of the invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a flowchart showing a semiconductor wafer processing method according to a first embodiment of the present invention; Fig. 2 is a flowchart showing a continuation of the semiconductor wafer processing method of Fig. 1 shows; Fig. 3 is a perspective view of a semiconductor wafer when viewed from a front side; Fig. 4 is a sectional view showing a state in which a protective tape is attached to the front side of the semiconductor wafer having through electrodes; Fig. 5 is a perspective view showing a grinding device for performing a grinding step; Fig. 6 is a plan view showing the grinding step; Fig. 7A is a sectional view of the semiconductor wafer processed by performing the grinding step; Fig. 7B is a sectional view showing a protective tape removing step; Fig. 8A is a sectional view showing a continuation in which a substrate is provided on the front side of the semiconductor wafer; Fig. 8B is a schematic plan view showing a bonding position; Fig. 8C is a schematic plan view showing a modification of the bonding position; Fig. Figure 9 is a sectional view showing a modification of the bonding method used in Fig. 8A; Fig. 10 is a sectional view of the semiconductor wafer processed by performing a through-electrode projecting step; Fig. 11A is a sectional view showing a state in which a substrate is provided on the front side of another semiconductor wafer having no through electrodes; Fig. 11B is a sectional view of the semiconductor wafer after the through electrode is formed in the semiconductor wafer and then the through electrode projecting step is performed; Fig. 12A is a sectional view illustrating a grinding step for an annular projection; Fig. 12B is a sectional view of the semiconductor wafer processed by performing the grinding step for the annular projection; Fig. 13A is a sectional view showing a state in which a second substrate is provided on the back side of the semiconductor wafer; Fig. 13B is a sectional view showing a state in which the Fig. 13A is inverted and the substrate is then removed; Fig. 13C is a sectional view showing a circular cutting step for separating a device region from the second substrate; Fig. 14A is a sectional view showing a grinding step for the annular projection in a machining method according to a second embodiment; Fig. 14B is a sectional view of the semiconductor wafer processed by performing the grinding step for the annular projection; Fig. 14C is a sectional view showing a state where a protective layer is provided on the back side of the semiconductor wafer; Fig. 14D is a sectional view showing a state in which the Fig. 14C is inverted and the substrate is next circularly cut to be removed; Fig. 14E is a sectional view showing a state in which the substrate is removed and an additional front-side processing step is subsequently performed; Fig. 15A is a sectional view showing a through electrode projecting step in a semiconductor processing method according to a third embodiment of the present invention; Fig. 15B is a sectional view showing a state in which the Fig. 15A is inverted, and the substrate is then circularly cut to be removed; Fig. 15C is a sectional view showing an additional front-side machining step; and Fig. 15D is a sectional view showing a state where the semiconductor wafer is circularly cut to separate a device region. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Some preferred embodiments of the present invention will now be described in detail with reference to the drawings. Fig. 1 and Fig. 2, a series of flowcharts illustrating a semiconductor processing method according to a first preferred embodiment of the present invention are shown. Referring to Fig. 3, a semiconductor wafer 11 is shown to be processed by the semiconductor wafer processing method according to the first preferred embodiment. As shown in Fig. As shown in Figure 3, the semiconductor wafer 11 is formed from a silicon wafer having a thickness of, for example, 700 μm. A plurality of intersecting streets 13 are formed on the front surface 11a of the semiconductor wafer 11, thereby dividing a plurality of rectangular regions in which a plurality of devices such as ICs and LSIs are respectively formed. The front surface 11a of the semiconductor wafer 11 includes a device region 17 in which the devices 15 are formed, and a peripheral boundary region 19 surrounding the device region 17. The outer periphery of the semiconductor wafer 11 is provided with a notch 21 as a mark for indicating the crystal orientation of the semiconductor wafer.

[0014] In the semiconductor wafer processing method according to the first preferred embodiment, step S10 of the flowchart shown in Fig. 1 is first performed as a protective tape attaching step to attach a protective tape to the front side 11a of the semiconductor wafer 11. As shown in Fig. As shown in Figure 4, the semiconductor wafer 11 has a plurality of through electrodes 12, and a protective tape 14 is attached to the front side 11a of the semiconductor wafer 11. Subsequently, step S11 is performed, if necessary, to grind the entire back side 11b of the semiconductor wafer 11 at a position indicated by an arrow A in Fig. 4, thereby reducing the thickness of the semiconductor wafer 11 to 400 µm. However, this grinding step is not always necessary in the processing method of the present invention.

[0015] Subsequently, step S12 is performed as a grinding step to grind the back surface 11b of the semiconductor wafer in a central region corresponding to the device region 17, thereby forming a circular recess and an annular projection surrounding the circular recess. This grinding step will now be described with reference to Fig. 5 and Fig. 6. As described in Fig. 5, the semiconductor wafer is held under negative pressure on a chuck table 16 of a grinding apparatus in the state where the protective tape 14 attached to the front surface 11a of the semiconductor wafer 11 is in contact with the surface of the chuck table 16. The grinding apparatus includes a grinding unit 18 for grinding the back surface 11b of the semiconductor wafer 11 held on the chuck table 16. The grinding unit 18 includes a housing 20, a spindle 22 rotatably housed in the housing 20, a wheel 24 fixed to the lower end of the spindle 22, and a grinding wheel 26 removably attached to the lower surface of the wheel 24. The grinding wheel 26 includes an annular base 28 and a plurality of abrasive elements 30 attached to the lower surface of the annular base 28 so as to be arranged along the outer periphery of the annular base 28.

[0016] In the grinding step S12, the clamping table 16 is rotated at 300 rpm, for example, in the direction shown by the arrow a, and the grinding wheel 600 is rotated at 6000 rpm, for example, in the direction shown by an arrow b. Fig. 5 and Fig. 6. At the same time, a grinding unit feeding mechanism (not shown) is driven to bring the abrasive elements 30 of the grinding wheel 26 into contact with the back surface 11b of the semiconductor wafer 11. Further, the grinding wheel 26 is fed downward by a predetermined amount at a predetermined feeding speed. As a result, the back surface 11b of the semiconductor wafer 11 is ground at its central portion corresponding to the device portion 17 to form a circular recess 32 with a predetermined depth (for example, 50 μm for the thickness of the central portion corresponding to the circular recess 32) and, as a result, an annular protrusion 34 around the circular recess 32, as shown in Fig. 7A. Accordingly, the circular protrusion 34 is formed as the remaining peripheral portion corresponding to the peripheral boundary area 19.

[0017] The relationship between the semiconductor wafer 11 held on the chuck table 16 and the abrasive elements 30 of the grinding wheel 26 will now be described with reference to Fig. 6. The center P1 of rotation of the clamping table 16 and the center P2 of rotation of the ring of abrasive elements 30, which are arranged annularly on the annular base 28 of the grinding wheel 26, differ from each other, as shown in Fig. 6. Furthermore, the outer diameter of the ring of abrasive elements 30 is set smaller than the diameter of the boundary circle 35 between the device region 17 and the peripheral boundary region 19 of the semiconductor 11. Furthermore, the outer diameter of the ring of abrasive elements 30 is set larger than the radius of the boundary circle 35. Accordingly, the ring of abrasive elements 30 passes through the center of rotation P1 of the chuck table 16.

[0018] After performing the above-mentioned grinding step, step S13 is performed as a protective tape removing step to peel (remove) the protective tape 14 from the front surface 11a of the semiconductor wafer 11. Fig. 7B is a sectional view showing this protective tape removal step. Subsequently, step S14 is performed as a substrate providing step to apply an adhesive only to an outer peripheral portion of the semiconductor wafer 11, thereby bonding a substrate to the front side 11a of the semiconductor wafer 11. Specifically, as shown in Fig. 8A and Fig. As shown in Fig. 8B, an adhesive 38 is applied to the front surface 11a of the semiconductor wafer 11 at only an outer peripheral portion thereof, and a substrate 36 is then provided on the front surface 11a of the semiconductor wafer 11. Preferably, heat-resistant adhesive is used as the adhesive 38.

[0019] In this preferred embodiment, the substrate 36 is formed from a silicon wafer. As a modification, the substrate 36 may be formed from glass. As a method for applying the adhesive 38, the adhesive 38 is continuously applied to the front side 11a over the outer periphery of the semiconductor wafer 11 in this preferred embodiment, as shown in Fig. 8B. As a modification, the adhesive 38 may be applied discretely to the front side 11a over the outer periphery of the semiconductor wafer 11, as shown in Fig. 8C, whereby the substrate 36 is bonded to the semiconductor wafer 11.

[0020] A further modification is in Fig. 9. As shown in Fig. 9, the substrate 36 is first brought into close contact with the front surface 11a of the semiconductor wafer 11, and the adhesive 38 is then applied to the outer peripheral surfaces of the semiconductor wafer 11 and to the substrate 36 along a close contact portion thereof, thereby bonding the substrate 36 to the front surface 11a of the semiconductor wafer 11 by means of the adhesive 38. Also in this case, the adhesive 38 may be applied continuously over the outer periphery of the close contact portion, or may be applied discretely over the outer periphery of the close contact portion.

[0021] After performing the substrate providing step mentioned above, step S15 is performed as a through-electrode forming step to form through-electrodes according to the type of semiconductor wafer to be processed, that is, according to the type to be used in a particular semiconductor wafer. For example, in the case where the semiconductor wafer is a semiconductor wafer 11A without through-electrodes, as shown in Fig. 11A, a plurality of through electrodes 12 are formed in the semiconductor wafer 11A in the state in which the substrate 36 is disposed on the front side 11a of the semiconductor wafer 11A, as shown in Fig. 11B.

[0022] Subsequently, step S16 is performed as a through-electrode projecting step to etch the bottom surface of the circular recess 32 by dry etching such as plasma etching or wet etching such as chemical mechanical polishing (CMP), thereby projecting the through-electrodes 12 from the bottom surface of the circular recess 32 as shown in Fig. 10 and Fig. 11B.

[0023] Subsequently, step S16 is performed as an additional recess processing step to perform additional processing including heat treatment and chemical treatment on the bottom surface of the circular recess 32. For example, this additional processing step includes a metal foil forming step for forming a metal foil on the bottom surface of the circular recess 32.

[0024] Subsequently, step S18 is performed as an annular projection grinding step to grind the annular projection 34 of the semiconductor wafer 11. In this annular projection grinding step, the substrate 36 is held under negative pressure on a chuck table of a grinding apparatus (not shown), and the annular projection 34 is ground to a position H1 shown in Fig. 12A, by using a grinding wheel, thereby substantially removing the annular projection 34. Fig. 12B shows a state in which the annular projection has been substantially removed by this annular projection grinding step.

[0025] Subsequently, step S19 is performed as a protective element providing step. As shown in Fig. As shown in Fig. 13A, the protective member providing step is performed by applying an adhesive 42 to the outer peripheral portion of the back surface 11b of the semiconductor wafer 11 and bonding a protective member (second substrate) 40 to the back surface 11b of the semiconductor wafer 11 through the adhesive 42. Similar to the adhesive 38, a heat-resistant adhesive is preferably used as the adhesive 42. Further, the adhesive 42 may be continuously applied to the back surface 11b over the outer periphery of the semiconductor wafer 11, or it may be discretely applied to the back surface 11b over the outer periphery of the semiconductor wafer 11.

[0026] Then the Fig. 13A to the state shown in Fig. 13B, and the substrate 36 is removed from the front side 11a of the semiconductor wafer 11 (step S20 as a substrate removal step). Subsequently, step S21 is performed as an additional front side processing step to perform additional processing on the front side 11a of the semiconductor wafer 11. This additional front side processing step includes a bump forming step and, for example, a reflow soldering step. Subsequently, step S22 is performed as a circular cutting step. As shown in Fig. 13C, the circular cutting step is performed by circularly cutting the semiconductor wafer 11 along a circular line R1 by using a cutting knife or a laser beam, thereby obtaining a central portion of the semiconductor wafer 11 corresponding to the device region 17.

[0027] Referring next to Fig. 14A to 14E show a series of machining steps according to a second preferred embodiment after the additional recess machining step of step S17, Fig. 14A shows an annular projection grinding step similar to that shown in Fig. 12A shown step and Fig. 14B shows a state similar to that in Fig. 12B, after performing the grinding step for the annular protrusion. In the second preferred embodiment, an adhesive 46 is applied to the outer peripheral portion of the back surface 11B of the semiconductor wafer 11, and a protective member (protective layer) 44 is adhered by the adhesive 46 to the back surface 11b of the semiconductor wafer 11, as shown in Fig. 14C shown, bonded.

[0028] Then the Fig. 14C to the state shown in Fig. 14D, and the semiconductor wafer 11 is held by suction by means of the protective member 44 on a chuck table of a cutting device or a laser processing device. In this state, the substrate 36 is circularly rotated along a circular line R32 shown in Fig. 14D, by using a cutting knife or a laser beam, whereby a central portion of the substrate 36, as indicated by an arrow A in Fig. 14D. Subsequently, the protective element 44 is removed from the back side 11b of the semiconductor wafer 11, as shown in Fig. 14E, and an additional front-side processing step including a bump forming step and a reflow soldering step are performed in this state.

[0029] Subsequently, although not shown, the semiconductor wafer 11 is circularly cut along a circular line R3 as in a third embodiment (shown in Fig. 15D) by using a cutting knife or a laser beam, whereby a central portion of the semiconductor wafer 11 corresponding to the device region 17 is obtained from the state in which a peripheral portion of the substrate 36 is provided on the semiconductor wafer 11.

[0030] Referring next to Fig. 15A to 15D show a series of processing steps according to a third preferred embodiment after the additional processing step of step S17. In the Fig. 15A, an additional recess processing step including a metal foil forming step is performed. Subsequently, the Fig. 15A to the state shown in Fig. 15B without performing a grinding step for an annular projection. In this state, the substrate 36 is circularly ground along a circular line R2 shown in Fig. 15B, by using a cutting knife or a laser beam, whereby a central portion of the substrate 36, as indicated by an arrow A in Fig. 15B is removed. Fig. 15C shows a state after removing the central portion of the substrate 36. In the Fig. In the state shown in Fig. 15C, an additional front side processing step comprising a bump forming step and a reflow soldering step is performed.

[0031] The semiconductor wafer is then circularly cut along a circular line R3, which is Fig. 15D, by using a cutting knife or a laser beam, whereby a central portion of the semiconductor wafer 11 corresponding to the device region 17 is obtained in the state where a peripheral portion of the substrate 36 is provided on the semiconductor wafer 11.

[0032] The central portion of the semiconductor wafer 11 corresponding to the device region 17 obtained by the processing methods according to the first to third embodiments mentioned above is cut along the dividing lines 13 by using a cutting knife or a laser to obtain the individual semiconductor devices 15.

[0033] The present invention is not limited to the details of the preferred embodiments described above. The scope of the invention is defined by the appended claims.

Claims

[1] A processing method for a semiconductor wafer having a device region on which a plurality of semiconductor devices are formed, respectively, in a plurality of regions divided by a plurality of intersecting dividing lines formed on the front side of the semiconductor wafer, and a peripheral boundary region surrounding the device region, the processing method comprising: a protective tape attaching step of attaching a protective tape to the front side of the semiconductor wafer; a grinding step of grinding the back surface of the semiconductor wafer in a central region corresponding to the device region to thereby form a circular recess and an annular projection including the peripheral boundary region surrounding the circular recess after performing the protective tape attaching step; a protective tape removing step of removing the protective tape from the front side of the semiconductor wafer after performing the grinding step; a substrate providing step of applying an adhesive to only an outer peripheral portion of the semiconductor wafer to bond a substrate to the front side of the semiconductor wafer after performing the protective tape removing step; and an additional processing step of performing additional processing on the semiconductor wafer after performing the substrate providing step. [2] A processing method for a semiconductor wafer according to claim 1, further comprising: a circular cutting step of circularly cutting the semiconductor wafer to thereby separate the device region from the peripheral boundary region after performing the additional processing step.

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