COOLING TO IMPROVE VERTICAL MAGNETIC ANISOTROPY (PMA) IN MAGNETIC SPIN TORQUE TRANSFER DIRECT ACCESS STORAGE DEVICES (STT-MRAM DEVICES)

Abstract

Method for manufacturing an STT-MTJ-MRAM cell, which is produced as a sequence of material layers, comprising the following steps: Providing a structured substrate (5); Establishing a seed layer (10) on the structured substrate; Fabrication of an AP2 layer (20) of an RKKY-coupled pinned SAF layer structure (55) on the seed layer; Creating an RKKY coupling layer (30) on the AP2 layer; Fabrication of a first part (42) of an AP1 layer on the RKKY coupling layer at ambient temperature to fabricate a material layer stack (5, 10, 20, 30, 42); Cooling the material layer stack (5, 10, 20, 30, 42) to a predetermined temperature; after cooling the material layer stack, depositing a second part (44) of the AP1 layer on the first part (42) of the AP1 layer at a temperature below ambient temperature while the material layer stack is no longer actively cooled, wherein an initial deposition temperature for forming the second part of the AP1 layer is lower than the ambient temperature as the initial deposition temperature for forming the first part of the AP1 layer, thereby completing the RKKY-coupled pinned SAF layer structure; and Producing a tunnel barrier layer (50), a free ferromagnetic layer (60) and a capping layer (70) in the aforementioned order on the second part (44).

Description

Background 1. Field of the invention

[0001] The present invention relates generally to a spin torque transfer magnetic random access memory (STT-MRAM) device and the use of a manufacturing process cooling process as a method for improving device performance. 2. Description

[0002] A critical aspect of MRAM performance is thermal stability, that is, the ability of a device to maintain stored information stable under temperature fluctuations without refreshing or other external assistance. This is particularly important as the magnetic tunnel junction (MTJ) unit cell size decreases for advanced complementary metal-oxide-semiconductor (CMOS) technology nodes, because thermal stability is theoretically proportional to the size of the MTJ and, in reality, positively correlated with the size of the MTJ. Furthermore, in some common semiconductor assembly processes, CMOS chips are exposed to high temperatures (for example, 260°C), which MRAM, as a candidate for embedded memory, must meet. At these temperatures, the conventional view that thermal stability is a requirement only for the free layer of an MTJ no longer applies.First, the temperature dependence of the thermal stability of the MTJ may be different for the free layer and the pinned layer, as they may be made of different materials. Because the manufacturing temperature is so much higher than the normal temperature range for typical data retention, one cannot simply claim, without further investigation, that the pinned layer has better thermal stability than the free layer simply because this temperature is within the operating temperature range of chips (typically lower than 125 °C or 150 °C). Furthermore, the free layer, but not the pinned layer, is usually located in or near a symmetric dipole field of a pinned synthetic antiferromagnetic layer (pinned SAF layer).As temperature increases and coercivity decreases, the difference between a symmetric and an asymmetric dipole field can have a significant impact on thermal stability. Therefore, thermal stabilities for both the free layer and the pinned layer must be considered for embedded MRAM applications fabricated using standard semiconductor manufacturing processes.

[0003] As layer stacks for working MRAMs become increasingly complex, and each functional layer tends to be fabricated from multiple layers of different materials for better performance, a single stack layer (i.e., a layer deposited using only one set of deposition tool parameters, including targets, chamber pressure, gases, and flow rates) is often ultrathin, consisting of only a few monoatomic layers (a few tenths of a nm (Å)) of specific materials deposited over a 200 mm to 300 mm wafer. At this level, the layers deposited in the MTJ stack have very different properties than bulk materials, and deposition conditions can significantly alter the layer morphology, impacting the overall performance of the MTJ, including thermal stability.

[0004] A conventional MTJ device is a form of ultrahigh-resistance magnetoresistance device in which the relative orientation of the magnetic moments of parallel, vertically separated, upper and lower magnetized layers controls the flow of spin-polarized electrons tunneling through a very thin dielectric layer (the tunnel barrier) fabricated between these layers. As injected electrons pass through the upper layer, their spins become polarized by interaction with that layer's magnetic moment. The majority of the electrons emerge polarized in the direction of the upper layer's magnetic moment, and the minority are polarized opposite to this direction.The probability that such a polarized electron will then tunnel through the intermediate tunneling barrier and enter the lower layer depends on the presence of states in the lower layer that the tunneling electron can occupy. The number of these states, in turn, depends on the magnetization direction of the lower electrode. The tunneling probability is thus spin-dependent, and the magnitude of the current (tunneling probability times the number of electrons hitting the barrier) depends on the relative orientation of the magnetizations of the magnetic layers above and below the barrier. The MTJ device can thus be considered a type of multi-state resistor, since different relative orientations (e.g., parallel and antiparallel) of the magnetic moments change the magnitude of the current flowing through the device.In a common device configuration (spin filter), one layer (the pinned layer) of the magnetic layers has a fixed magnetic moment due to exchange coupling with an antiferromagnetic layer, while the other magnetic layer (the free layer) has a freely moving magnetic moment. The direction of the free layer's magnetic moment is then switched from parallel to that of the pinned layer, causing the tunneling current to increase, to antiparallel to the pinned layer, causing the tunneling current to decrease. Thus, the device is effectively a bistable resistor. The switching of the direction of the free layer's moment (writing) is achieved by external magnetic fields resulting from currents flowing through conductive lines adjacent to the cell.

[0005] One of the deposition parameters that strongly influences film properties is the wafer temperature. This is a consequence of the fact that films grown on a wafer are generally the result of sputtering different atomic species onto the wafer. When the sputtered species impact a cold surface, they tend to move less and / or penetrate less than when they impact a hot surface. Thus, the outcome of the sputtering process depends on the affinity of the material being deposited and that of the previously deposited material. By exploiting this circumstance, the wafer temperature can be adjusted to obtain a desired morphology (coverage, grain boundary, etc.) for the newly deposited film.This finding leads us to assert that the actual factors that compromise the thermal stability of an operating device also play a role in the factors that influence that device's manufacturing. This finding has led us and some of the prior inventors to assert that thermal conditions present during device manufacturing can compromise the thermal stability of the finished device. Examples of previous attempts to regulate thermal conditions during manufacturing to mitigate adverse operating characteristics of the finished device are described below.

[0006] US Patent No. 9,761,795 B2 describes cooling a substrate in a cooling chamber to 50 K to 300 K after the production of a pinned layer and before the production of an MgO layer. Cooling is achieved by introducing a coolant into the chamber.

[0007] The patent application US 2013 / 0 216 702 A1 discloses cooling a substrate in a cooling chamber to 50 K to 293 K before and after producing a part of a free layer.

[0008] The patent application US 2016 / 0 130 693 A1 discloses cooling a substrate in a cooling chamber to room temperature before depositing a tunnel barrier layer.

[0009] Patent application US 2016 / 0 099 288 A1 claims that it is expedient to carry out a cooling process before producing a recording layer.

[0010] We have found that none of these approaches has produced the results of the procedure to be disclosed here. Summary

[0011] A first object of the present invention is to provide an MRAM device with improved stability against thermal variations, that is, with the ability to maintain the storage of data without refresh cycles or other external assistance.

[0012] A second object of the present invention is to manufacture such an MRAM device using a manufacturing method in which temperatures of the device under manufacture are lowered during certain portions of the manufacturing process.

[0013] A third object of the present invention is to address the problem of thermal stability by using processing techniques that have the most favorable effects on the properties of the thin films deposited on the wafers.

[0014] As discussed above, one of the deposition parameters that strongly influences film properties is the wafer temperature. When a sputtered species impacts a cold surface, it tends to move less and / or penetrate less than when impacting a hot surface. Thus, the outcome of the sputtering process depends on the affinity of the material being deposited and that of the previously deposited material. By exploiting this circumstance, the wafer temperature can be adjusted to obtain a desired morphology (coverage, grain boundary, etc.) for the newly deposited film.

[0015] We found that by depositing a portion of the pinned layer at a low temperature in one of our currently used stacks, the thermal stability of the pinned layer, and thus that of the chip as a whole, increases significantly and measurably.

[0016] This cooling is achieved in a special cooling chamber within the deposition facility. After the initial pinned layer deposition, the wafer is transported to the cooling chamber in an ultra-high vacuum. It is then mounted on a cold stage (60 K) within the chamber for a specified time. The actual wafer temperature drops at the beginning of this process and, after approximately 200 seconds, reaches a constant temperature close to that of the stage. Then, still in the ultra-high vacuum, the wafer is quickly transported to the deposition chamber for the remaining pinned layer deposition. The wafer temperature rises slowly during the remaining pinned layer deposition but remains low. Short description of the drawings Fig. Figure 1 is a schematic diagram of an MTJ-MRAM stack fabricated using the cooling process described herein. Fig.Figure 2 is a schematic diagram showing a first step in the fabrication of the MTJ-MRAM stack of Fig. 1 shows. Fig. Figure 3 is a schematic diagram showing a second step in the fabrication of the MTJ-MRAM stack of Fig. 1 shows. The Fig. 4A to 4C are schematic diagrams showing three sequential processes used to form a layer on a cooled material layer stack during a third step in the fabrication of the MTJ-MRAM stack of Fig. 1 are required. Fig. Figure 5 is a schematic diagram illustrating a fourth step in the fabrication of the MTJ-MRAM stack of Fig. 1 shows. Fig. Figure 6 is a schematic diagram illustrating a fifth step in the fabrication of the MTJ-MRAM stack of Fig. 1 shows. Fig.Figure 7 is a schematic diagram illustrating a sixth step in the fabrication of the MTJ-MRAM stack of Fig. 1 shows. Fig. Figure 8 is a schematic diagram showing a final step in the fabrication of the MTJ-MRAM stack of Fig. 1 shows. Detailed description

[0017] A preferred embodiment of the present invention relates to the fabrication of an exemplary STT-MTJ MRAM cell that is fabricated with a temperature reduction (i.e., cooling) during each of several steps in the process. It should be noted that the process is by no means limited to the fabrication of an exemplary device such as this cell, but that this particular device is of importance in the industry and encompasses numerous common manufacturing techniques so that the cooling process can be extensively tested. The exemplary MRAM device is a multilayer MTJ structure (a non-patterned stack) that, when completed, comprises the sequentially deposited layers schematically shown in Fig. 1. In the Fig.2 to 8, the specifics of the individual deposition and cooling processes are shown and described, with which the stack of Fig. 1. The manufacturing process, which is described below with reference to the Fig.2 to 8 will be limited to the use of a cooling step at a specific point in manufacturing, which is a step during the formation of an AP1 layer in a pinned synthetic antiferromagnetic layer (pinned SAF layer). In this step, the AP1 layer is formed as two successively deposited layers 44 and 42, and layer 42 is subjected to a cooling step so that layer 44 can be deposited on top of the cooled layer 42. It should be understood that the cooling step may also be performed at many other stages in manufacturing, and that the figures describing these stages differ only in where the step is performed.

[0018] In Fig.Figure 1 schematically illustrates the following final sequence of fabricated layers, the individual properties of which are discussed below. A wafer substrate 5 is provided as a support material on which the subsequent layers are fabricated. The substrate 5 has been patterned (the patterning process is not shown) to provide a surface area on which the subsequent layers are to be fabricated. The substrate 5 is removably mounted to various stages in a sputtering / deposition subsystem of a vacuum-tight multi-chamber system comprising separate chambers configured for different deposition and processing types. The multi-chamber system also includes a thermal treatment subsystem in which the temperature is lowered. This system is described in more detail below.

[0019] A layer 7 of Ta or a conductive nitride, such as TiN, is deposited on the substrate 5, surrounded by a SiO2 layer, and the entire structure is smoothed using a CMP (chemical mechanical polishing) process. This allows for good contact for a subsequently deposited seed layer 10, on which, in turn, a pinned synthetic antiferromagnetically coupled layer (pinned SAF layer) 55 is deposited, the coupling of which is maintained by the Ruderman-Kittel-Kasuya-Yosida (RKKY) interaction. This coupled pinned layer system 55 itself comprises the following three layers: a lower AP2 layer 20, an RKKY interaction layer (or coupling layer) 30, and an upper AP1 bilayer 42 / 44. It should be noted that the AP1 layer is here made of two successively deposited layers, designated 42 and 44, which will be described later with reference to the Fig.4A to 4C. The magnetic moments of layers AP1 and AP2 are held in an antiparallel configuration, perpendicular to their fabrication planes, by the RKKY interaction, enabled by coupling layer 30, whose action to couple magnetic moments between adjacent magnetic layers is well known in the art. The designation of the two layers as AP1 and AP2, with the number 1, is simply intended to indicate the proximity of the AP1 layer to a tunneling barrier layer 50, which in this example is a layer of MgO fabricated on top of layer AP1, but other metal oxides may also be used. Layer AP2 is further away from tunneling barrier layer 50.Then, a free ferromagnetic layer 60 is formed on the tunnel barrier layer 50, followed by an MgO capping layer 70 on the free layer 60. A hard mask layer 80 is formed on the capping layer 70 to be used in subsequent patterning processes for the finished stack. As explained above, these individual layers are sequentially formed using sputtering processes in a multi-chamber system, in which one chamber is dedicated to cooling the wafer without a sputtering / deposition function, and several other chambers are used for dedicated sputtering / deposition processes. The cooling process is performed, if necessary, by conveying the thus-formed material layer stack to the cooling chamber and by securing the material layer stack with chucks to a metal table, which is kept constant at this temperature by supplying Ar gas at a temperature of 60 K.This is in . Fig.4B. Cooling of the material layer stack occurs quickly through contact with the table, within 200 s in the present process, and then stabilizes. Once the lower temperature is reached, the material layer stack is transported to the special, separate chamber where deposition is to take place at ambient temperature. It should be noted that the system used for these processes is commercially available (CANON ANELVA C7100) and allows easy transport between the cooling chamber and the individual deposition chambers. In principle, the system (not shown) consists of a central transport unit from which six sub-chambers branch off, one of which provides a cooling device and the remaining sub-chambers provide devices for performing various layer deposition processes.When the material stack is transported to the cooling chamber, it is attached to a metal table where good thermal contact is established, and then the entire material stack is cooled using a gas transfer process. When the material stack reaches the desired temperature, it is removed from the cooling chamber and transported to one of the deposition chambers, where it is again attached to a jig and the required deposition takes place while the material stack remains within a desired lower temperature range. Once the material stack is placed in a chamber where the deposition process is to take place, it is no longer actively cooled, so its temperature slowly rises to ambient temperature. However, because of the slow temperature rise, the deposition process on the material stack is effectively carried out at the desired low temperature (here, 60 K).The system and the like are well known in the art, so it will not be described in detail here.

[0020] In Fig. Figure 2 schematically shows a first step in a series of manufacturing processes that take place in the multi-chamber system described above, in which all processes can take place in a vacuum and, if necessary, under temperature-controlled conditions. It should be noted that each cooling step takes place in the cooling chamber of the system. The description of this exemplary process begins with the cooling, which only takes place in a specific step in the overall production. This single cooling process can also be used at other points in production and is also described there. Furthermore, several cooling steps can also be used during a single production process. After the material layer stack thus formed has been placed on a table in the cooling chamber (which is shown in Fig.Once the substrate has been secured and cooled (shown in Figure 4B), it is returned to an ambient-temperature chamber designed for the deposition process to be performed there. The deposition process is therefore performed on a material layer stack that is already cold and is no longer actively cooled.

[0021] Let us stay with Fig.2, in which a substrate 5 is provided that has been patterned (not shown here) to create a surface region on which the MTJ stack is to be fabricated. On this patterned substrate 5, a layer 7 of Ta or the conductive nitride TiN is sputtered to a thickness of a few tens of nm (hundreds of Å), typically 40 nm (400 Å). The surrounding region is filled with SiO2, and then the entire region is smoothed using an oxide CMP process. Then, a seed layer 10 of NiCr with a thickness of about 3 nm (30 Å) to about 10 nm (100 Å) is deposited on layer 7, which seeds an AP2 layer 20, which is a repeated Co / X multilayer with good lattice growth along the

[111] crystal direction. Here, X can be chosen from Ni, Pt or Pd, and the individual layers (i.e., Co and X) typically have a thickness of about 0.1 nm (1 Å) to about 1 nm (10 Å).This multilayer structure provides perpendicular magnetic anisotropy (PMA) for the entire stack due to the multiple interfacial interactions between the layers. Furthermore, the RKKY interaction antiferromagnetically couples the AP2 layer to the AP1 layer, creating oppositely directed magnetic moments perpendicular to their deposition planes.

[0022] In Fig. Figure 3 shows the deposition of an RKKY interaction layer 30, which may be a layer of Ru with a thickness of about 0.35 nm (3.5 Å) to 0.4 nm (4 Å), a layer of Ir with a thickness of about 0.45 nm (4.5 Å) to 0.55 nm (5.5 Å), or a layer of Mo with a thickness of about 0.5 nm (5 Å) to 0.6 nm (6 Å), which enables the interaction by antiferromagnetic coupling between the AP2 and the A1 layers, resulting in an antiparallel orientation of their magnetic moments.

[0023] Now let’s get to the Fig. 4A to 4C, which show the preparation of the AP1 layer, which is prepared here as the following two layers: (I) a thin, generally amorphous, phase separation layer 42 at the bottom to separate the

[111] crystal structure of the AP2 layer from the

[001] crystal structure of the remaining [AP1 / MgO barrier layer / free layer] structure, while they remain magnetically coupled by the RKKY interaction; and (II) a CoFeB layer 44 on the top side, which contacts the MgO barrier layer 50.

[0024] Let us first come to Fig. 4A, which shows the fabrication of layer 42 as in (I) above, with the material layer stack remaining at ambient temperature in the chamber in which layer 30 was fabricated.

[0025] In Fig.4B then shows the material layer stack, now with the just deposited layer 42, which is conveyed to the cooling chamber in which the material layer stack is placed on a metal table 3, removably attached to a table 4 and cooled to the target temperature of 60 K by thermal contact with this table, which in turn is cooled with a gas stream 2.

[0026] Now let’s come to Fig. 4C, which shows the cooled workpiece which is now conveyed back to a deposition chamber at ambient temperature in which the layer 44 is deposited as in (II) above.

[0027] The material layer stack returns to ambient temperature very slowly during deposition, so layer 44 is actually formed on a cool layer 42. The wafer temperature rises slowly, but during the first few minutes of deposition of the remaining AP1 layer, the temperature should not rise much.

[0028] Now let’s come to Fig.5, in which the cooling step is terminated and the remaining deposition steps are performed at ambient temperature. However, further cooling steps are still possible if required, but they are not shown here. The fabrication of the MgO barrier layer 50 on the CoFeB layer 44 is now shown. The MgO barrier layer 50 has a thickness of 0.5 nm (5 Å) to 3 nm (30 Å). At this stage of fabrication, a cooling step may also be performed before the MgO deposition is completed. This cooling step could be performed in addition to, or instead of, the cooling step discussed above for the fabrication of the AP1 layer. It should be noted that the MgO can be fabricated by sputter deposition of a Mg layer, which is then oxidized, or by direct sputtering from an MgO target.

[0029] Now let’s come to Fig.6, which shows the fabrication of a free ferromagnetic layer 60, generally made of CoFeB-based materials and with a thickness of 0.5 nm (5 Å) to 2.5 nm (25 Å). The cooling step can also be performed before or during the deposition of the free layer. If the cooling step is performed during the deposition of the free layer, the material layer stack is conveyed back to the cooling chamber before the free layer is completely deposited. Typically, such cooling would be performed between deposition steps when half of the free layer has been deposited, which would be halfway between a free layer with a thickness of 0.5 nm (5 Å) and a free layer with a thickness of 2.5 nm (25 Å). Typically, the free layer is fabricated by depositing multiple layers, such as a layer of Fe 70 B 30 and then a layer of Co 20Fe 60 B 20 In this case, cooling would be required before the deposition of the Co 20 Fe 60 B 20 -shift.

[0030] Now let’s come to Fig.7, which shows the deposition of an MgO capping layer 70 on the free layer 60. Again, it should be noted that the MgO can be formed by oxidizing a layer of Mg or by sputtering a layer of MgO. The MgO capping layer 70 has a thickness of 0.5 nm (5 Å) to 3 nm (30 Å), and the cooling step can be performed after the deposition of the free layer is complete and before the deposition of the MgO capping layer 70. It should be noted that the cooling process can be performed as a series of processes, with each cooling step being performed before or during each deposition process, as stated above, after the material layer stack has been conveyed to the cooling chamber.It should also be noted that most of the corresponding manufacturing steps for using the cooling process may have to be determined empirically, since the special nature of the stack appears to compromise the beneficial properties of cooling.

[0031] Finally, in Fig. Figure 8 shows the deposition of a Ta hard mask 80 with a thickness of approximately 60 nm (600 Å), which is used to pattern the finished stack. Note that annealing steps are not specified here, which may be required when devices need to be integrated into a larger MRAM system. These annealing steps neither affect the function of the cooling steps nor are they necessary to adjust the magnetization of the RKKY interaction.

[0032] The benefits of this manufacturing process can be demonstrated through reflow tests. As shown in the table below, two otherwise identical structures, one fabricated with a cooling step and the other without a cooling step when fabricating the AP1 layer of a pinned synthetic antiferromagnetic layer (pinned SAF layer), have different defect rates after a reflow process. Reflow is a chip manufacturing process in which the chip is soldered to a socket by heating and liquefying (melting) a solid layer of solder, and reflow is a key prerequisite for the thermal stability of the MTJ stack. Typically, the reflow process exposes a chip to a temperature of approximately 260°C for about 90 seconds, and the information stored in the chip before reflow must not be lost during the reflow process. Without cooling With cooling Defect rate after melting 10 ppm 1 ppm

[0033] The test is performed at the wafer level as follows. A wafer containing more than 50 chips is sandwiched between two metal plates in a furnace. The temperature of the metal plates is at least 260°C, and the wafer remains in the furnace for at least 90 seconds. Each chip has 10 Mb MTJ units and has been programmed to store either 0 or 1 information before testing. Each chip is read after testing to determine the number of MTJ units whose stored information has changed during the annealing process. A defect rate is then calculated as the number of MTJ units with changed information content divided by the total number of MTJ devices.

[0034] The wafer manufactured without cooling exhibits a defect rate of 10 ppm (10 defects per 1,000,000 devices), while the wafer manufactured with cooling exhibits a defect rate of only 1 ppm. The data clearly demonstrate a significant improvement in the PMA of the pinned layer with the proposed cooling step.

Claims

[1] A method for manufacturing an STT-MTJ MRAM cell fabricated as a sequence of material layers, comprising the following steps: Providing a structured substrate (5); Producing a seed layer (10) on the structured substrate; forming an AP2 layer (20) of an RKKY-coupled pinned SAF layer structure (55) on the seed layer; forming an RKKY coupling layer (30) on the AP2 layer; forming a first portion (42) of an AP1 layer on the RKKY coupling layer at ambient temperature to form a material layer stack (5, 10, 20, 30, 42); Cooling the material layer stack (5, 10, 20, 30, 42) to a predetermined temperature; after cooling the material layer stack, forming a second part (44) of the AP1 layer on the first part (42) of the AP1 layer at a temperature below ambient temperature while the material layer stack is no longer actively cooled, wherein an initial deposition temperature for forming the second part of the AP1 layer is lower than the ambient temperature than the initial deposition temperature for forming the first part of the AP1 layer, thereby completing the RKKY-coupled pinned SAF layer structure; and Producing a tunnel barrier layer (50), a free ferromagnetic layer (60) and a capping layer (70) in the order mentioned on the second part (44). [2] The method of claim 1, wherein: the material layers are produced by sputtering in sputtering chambers of a vacuum-tight multi-chamber system, cooling takes place in a separate cooling chamber of the system, and the material layer stack is transported from the sputtering chambers to the cooling chamber for cooling by thermal contact and then transported back to the individual sputtering chambers for the remaining processing while the material layer stack returns to the ambient temperature. [3] The method of claim 1 or 2, wherein the material layer stack is cooled to a temperature of 60 K. [4] A method according to any one of the preceding claims, wherein the seed layer (10) is a layer of NiCr having a thickness of 3 nm to 10 nm to enable good lattice growth in a [111] crystal direction of the AP2 deposition. [5] A method according to any one of the preceding claims, wherein the AP2 deposition (20) comprises a deposition of a Co / X multilayer, where X is Ni, Pt or Pd. [6] A method according to any one of the preceding claims, wherein the AP2 deposition (20) provides a perpendicular magnetic anisotropy for the entire workpiece. [7] A method according to any one of the preceding claims, wherein the RKKY coupling layer (30) is a layer of Ru having a thickness of about 0.35 nm to 0.4 nm or a layer of Ir having a thickness of about 0.45 nm to 0.55 nm or a layer of Mo having a thickness of about 0.5 nm to 0.6 nm. [8] Method according to one of the preceding claims, wherein the AP2 layer (20) has a crystal structure with a [111] crystal direction; wherein the second part (44) of the AP1 layer, the tunnel barrier layer (50) and the free ferromagnetic layer (60) have a crystal structure with a [001] crystal direction; and the first part (42) of the AP1 layer is a phase separation layer used to separate the respective crystal structures while they remain magnetically coupled by the RKKY interaction. [9] A method according to any one of the preceding claims, wherein the second part (44) of the AP1 layer is a layer of CoFeB formed to a thickness of 0.5 nm to 2.5 nm. [10] A method for manufacturing an STT-MTJ MRAM cell fabricated as a sequence of material layers, comprising the following steps: Providing a substrate (5); Producing a first layer (20) of a pinned layer structure (55) on the substrate (5); Producing an RKKY coupling layer (30) of the pinned layer structure (55) on the first layer (20); forming a first part (42) of a second layer (AP1) of the pinned layer structure (55) on the RKKY coupling layer (30) at ambient temperature to form a material layer stack (5, 20, 30, 42); Cooling the material layer stack (5, 20, 30, 42) to a first temperature; after cooling the material layer stack, producing a second part (44) of the second layer (AP1) of the pinned layer structure (55) on the first part (42) of the second layer (AP1) at a temperature below the ambient temperature while the material layer stack is no longer actively cooled, wherein an initial deposition temperature for forming the second part of the second layer (AP1) is lower than the ambient temperature as the initial deposition temperature for forming the first part of the second layer (AP1); Producing a tunnel barrier layer (50) on the material layer stack; Producing a free ferromagnetic layer (60) and a capping layer (70) on the tunnel barrier layer (50). [11] The method of claim 10, wherein: the material layer stack is produced by sputtering in sputtering chambers of a vacuum-tight multi-chamber system, cooling takes place in a separate cooling chamber of the system, and the material layer stack is transported from the sputtering chambers to the cooling chamber for cooling by thermal contact and then returned to the sputtering chambers for the remaining processing while the material layer stack returns to the ambient temperature. [12] Method according to claim 10 or 11, wherein the material layer stack (5, 20, 30, 42) is cooled to a temperature of 60 K. [13] A method according to any one of claims 10 to 12, wherein: the first layer (20) of the pinned layer structure (55) is formed from a material selected from the group consisting of: Co / Ni, Co / Pt and Co / Pd, the first layer (20) of the pinned layer structure (55) has a crystal structure with a [111] crystal direction; the RKKY coupling layer (30) is formed from a material selected from the group consisting of: Ru with a thickness of about 0.35 nm to 0.4 nm, Ir with a thickness of about 0.45 nm to 0.55 nm and Mo with a thickness of about 0.5 nm to 0.6 nm, the second part (42) of the second layer, the tunnel barrier layer (50) and the free ferromagnetic layer (60) have a crystal structure with a [001] crystal direction; and the first part (42) of the second layer is a phase separation layer used to separate respective crystal structures while they remain magnetically coupled, and a second part (44) of the second layer (AP1) is a layer of CoFeB which is produced with a thickness of 0.5 nm to 2.5 nm on the first part (42) of the second layer (AP1). [14] The method of any one of claims 10 to 13, wherein the tunnel barrier layer (50) is formed with a thickness of about 0.5 nm to 3 nm and can be formed on the material layer stack by oxidation of a layer of Mg or by sputter deposition using a target of MgO. [15] A method for manufacturing an STT-MTJ MRAM cell fabricated as a sequence of material layers, comprising the following steps: Providing a substrate (5); Producing a seed layer (10) on the substrate (5); fabricating an RKKY-coupled pinned SAF layer structure (55) on the seed layer at ambient temperature; Forming an MgO tunnel barrier layer (50) on the RKKY-coupled pinned SAF layer structure (55) to form a material layer stack (5, 10, 55, 50); Cooling the material layer stack (5, 10, 55, 50) to a first temperature; after cooling the material layer stack, forming a free ferromagnetic layer (60) on the MgO tunnel barrier layer (50) at a temperature below the ambient temperature while the material layer stack is no longer actively cooled, wherein an initial deposition temperature for forming the free ferromagnetic layer (60) is lower than the ambient temperature as the initial deposition temperature for forming the RKKY-coupled pinned SAF layer structure (55); and Producing a capping layer (70) on the free ferromagnetic layer (60). [16] The method of claim 15, wherein: the material layers are produced by sputtering in sputtering chambers of a vacuum-tight multi-chamber system, cooling takes place in a separate cooling chamber of the system, and the material layer stack is transported from the sputtering chambers to the cooling chamber for cooling by thermal contact and then returned to the sputtering chambers for the remaining processing while the material layer stack returns to the ambient temperature. [17] Method according to claim 15 or 16, wherein the material layer stack (5, 10, 55, 50) is cooled to a temperature of 60 K. [18] The method according to any one of claims 15 to 17, wherein the seed layer (10) is a layer of NiCr having a thickness of 3 nm to 10 nm to enable good lattice growth in a [111] crystal direction of an AP2 deposition of the RKKY-coupled pinned SAF layer structure (55). [19] A method according to any one of claims 15 to 18, wherein: the RKKY-coupled pinned SAF layer structure (55) comprises an AP2 layer (20) produced by deposition of Co / X multilayers, where X is Ni, Pt or Pd, an RKKY coupling layer (30) is formed on the AP2 layer (20), which is made of a material selected from the group consisting of: Ru with a thickness of about 0.35 nm to 0.4 nm, Ir with a thickness of about 0.45 nm to 0.55 nm and Mo with a thickness of about 0.5 nm to 0.6 nm, and an AP1 layer (42, 44) with a first part (42) and a second part (44) is produced on the RKKY coupling layer (30), wherein the AP2 layer (20) has a crystal structure with a [111] crystal direction, the second part (44) of the AP1 layer, the tunnel barrier layer (50) and the free ferromagnetic magnetic layer (60) have a crystal structure with a [001] crystal direction, the first part (42) of the AP1 layer is a phase separation layer used to separate the respective crystal structures while they remain magnetically coupled by the RKKY interaction, and the second part (44) of the AP1 layer is a layer of CoFeB which is produced with a thickness of 0.5 nm to 2.5 nm on the first part. [20] The method of claim 19, wherein the AP2 deposition provides a perpendicular magnetic anisotropy for the entire material layer stack (5, 10, 55, 50). [21] A method for manufacturing an STT-MTJ MRAM cell fabricated as a sequence of material layers, comprising the following steps: Providing a substrate (5); Producing a pinned layer structure (55) on the substrate (5) at ambient temperature; Producing a tunnel barrier layer (50) on the pinned layer structure (55) to form a material layer stack (5, 55, 50); Cooling the material layer stack (5, 55, 50) to a predetermined temperature; after cooling the material layer stack (5, 55, 50), producing a free ferromagnetic layer (60) on the material layer stack (5, 55, 50) at a temperature lower than ambient temperature, while the material layer stack is no longer actively cooled, wherein an initial deposition temperature for forming the free ferromagnetic layer (60) is lower than the ambient temperature as an initial deposition temperature for forming the pinned layer structure (55); and Producing a capping layer (70) on the free ferromagnetic layer (60). [22] The method of claim 21, wherein: the material layer stack (5, 55, 50) is produced by sputtering in sputtering chambers of a vacuum-tight multi-chamber system, cooling takes place in a separate cooling chamber of the system, and the material layer stack is transported from the sputtering chambers to the cooling chamber for cooling by thermal contact and then returned to the sputtering chambers for the remaining processing while the material layer stack returns to the ambient temperature. [23] Method according to claim 21 or 22, wherein the material layer stack (5, 55, 50) is cooled to a temperature of 60 K. [24] The method of any one of claims 21 to 23, wherein producing the pinned layer structure (55) comprises: Producing a first layer (20, AP2) from a material selected from the group consisting of: Co / Ni, Co / Pt and Co / Pd; Producing an RKKY coupling layer (30) from a material selected from the group consisting of: Ru with a thickness of about 0.35 nm to 0.4 nm, Ir with a thickness of about 0.45 nm to 0.55 nm and Mo with a thickness of about 0.5 nm to 0.6 nm, and Producing a second layer (AP1) in two parts, wherein a second part (44) of the second layer (AP1) is a layer of CoFeB produced with a thickness of 0.5 nm to 2.5 nm on the first part (42) of the second layer (AP1). [25] The method of claim 24, wherein the deposition of the first layer (20, AP2) provides a perpendicular magnetic anisotropy for the entire material layer stack. [26] A method for manufacturing an STT-MTJ MRAM cell fabricated as a sequence of material layers, comprising the following steps: Providing a substrate (5); Producing a seed layer (10) on the substrate (5); fabricating an RKKY-coupled pinned SAF layer structure (55) on the seed layer (10) at ambient temperature; Forming an MgO tunnel barrier layer (50) on the RKKY-coupled pinned SAF layer structure (55); Producing a free ferromagnetic layer (60) on the MgO tunnel barrier layer (50) to form a material layer stack (5, 10, 55, 50, 60); Cooling the material layer stack (5, 10, 55, 50, 60) to a predetermined temperature; and after cooling the material layer stack, forming a capping layer (70) on the free ferromagnetic layer (60) at a temperature lower than ambient temperature while the material layer stack is no longer actively cooled, wherein an initial deposition temperature for forming the capping layer (70) is lower than the ambient temperature as an initial deposition temperature for forming the RKKY-coupled pinned SAF layer structure (55). [27] The method of claim 26, wherein: the material layer stack is produced by sputtering in sputtering chambers of a vacuum-tight multi-chamber system, cooling takes place in a separate cooling chamber of the system, and the material layer stack (5, 10, 55, 50, 60) is conveyed from the sputtering chambers to the cooling chamber for cooling by thermal contact and then conveyed back to the sputtering chambers for the remaining processing while the material layer stack returns to the ambient temperature. [28] Method according to claim 26 or 27, wherein the material layer stack (5, 10, 55, 50, 60) is cooled to a temperature of 60 K. [29] The method according to any one of claims 26 to 28, wherein the seed layer (10) is a layer of NiCr having a thickness of 3 nm to 10 nm to enable good lattice growth in a [111] crystal direction of an AP2 deposition of the RKKY-coupled pinned SAF layer structure (55). [30] A method according to any one of claims 26 to 29, wherein: the preparation of the RKKY-coupled pinned SAF layer structure (55) comprises: Producing an AP2 layer (20) having a crystal structure with a [111] crystal direction, Producing an RKKY coupling layer (30) on the AP2 layer (20), and Forming an AP1 layer (42, 44) on the RKKY coupling layer (30), wherein the AP1 layer is formed in two parts, wherein an upper part (44) of the AP1 layer has a crystal structure with a [001] crystal direction and wherein a lower part (42) of the AP1 layer is a phase separation layer used to separate the crystal structure of the AP2 layer from the crystal structure of the upper part (44) of the AP1 layer. [31] The method of claim 30, wherein the deposition of the AP2 layer provides perpendicular magnetic anisotropy for the entire material layer stack. [32] A method for manufacturing an STT-MTJ MRAM cell fabricated as a sequence of material layers, comprising the following steps: Providing a substrate (5); Producing a seed layer (10) on the substrate; forming an AP2 layer (20) of an RKKY-coupled pinned SAF layer structure (55) on the seed layer (10); Producing an RKKY coupling layer (30) on the AP2 layer (20); forming a first portion (42) of an AP1 layer on the RKKY coupling layer (30) at ambient temperature to form a material layer stack (5, 10, 20, 30, 42); Cooling the material layer stack (5, 10, 20, 30, 42) to a first temperature for the first time; after cooling the material layer stack, forming a second portion (44) of the AP1 layer on the first portion (42) of the AP1 layer at a temperature below ambient temperature while the material layer stack is no longer actively cooled, wherein an initial deposition temperature for forming the second portion of the AP1 layer is lower than the ambient temperature than the initial deposition temperature for forming the first portion of the AP1 layer; Cooling the material layer stack to the first temperature for the second time; Forming a tunnel barrier layer (50) on the RKKY-coupled pinned SAF layer structure (55) while the material layer stack is no longer actively cooled; Cooling the material layer stack to the first temperature for the third time; Producing a free ferromagnetic layer (60) on the tunnel barrier layer (50) while the material layer stack is no longer actively cooled; Cooling the material layer stack to the first temperature for the fourth time; and Producing a capping layer (70) on the free ferromagnetic layer (60) while the material layer stack is no longer actively cooled. [33] The method of claim 32, wherein: the material layer stack is produced by sputtering in sputtering chambers of a vacuum-tight multi-chamber system, each of the four cooling processes is carried out in a separate cooling chamber of the system, and the material layer stack is transported from the sputtering chambers to the cooling chamber for cooling by thermal contact and then returned to the sputtering chambers for the remaining processing while the material layer stack returns to the ambient temperature. [34] A method according to claim 32 or 33, wherein the material layer stack is cooled to a temperature of 60 K during each cooling process. [35] Method according to one of claims 32 to 34, wherein the AP2 layer has a crystal layer structure with a [111] crystal direction, wherein the second part (44) of the AP2 layer, the tunnel barrier layer (50) and the free ferromagnetic layer (60) have a crystal structure with a [001] crystal direction; wherein the first part (42) of the AP1 layer is a phase separation layer used to separate the respective crystal structures while they remain magnetically coupled by the RKKY interaction. [36] A method according to any one of claims 32 to 35, wherein the second part (44) of the AP1 layer is a layer of CoFeB formed to a thickness of 0.5 to 2.5 nm. [37] The method according to any one of claims 32 to 36, wherein the seed layer (10) is a layer of NiCr having a thickness of 3 nm to 10 nm to enable good lattice growth in a [111] crystal direction of a deposition of the AP2 layer of the RKKY-coupled pinned SAF layer structure (55). [38] A method according to any one of claims 32 to 37, wherein the AP2 layer is a Co / X multilayer, where X is Ni, Pt or Pd. [39] A method according to any one of claims 32 to 38, wherein the deposition of the AP2 layer provides a perpendicular magnetic anisotropy for the entire material layer stack.

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