METHOD FOR DETERMINING THE CRYSTAL ORIENTATION OF A WAFER

The method for determining crystal orientation angle using ion beam projections on a single test wafer improves accuracy and reduces costs, addressing angular variability in ion implantation for semiconductor devices, particularly in modern ICs and CMOS image sensors.

DE102020114013B4Active Publication Date: 2026-01-15TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information

Application Number
DE102020114013
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-04-07
Filing Date
2020-05-26
Publication Date
2026-01-15
Estimated Expiration
2040-05-26

AI Technical Summary

Technical Problem

Existing methods for determining the crystal orientation angle of semiconductor wafers are inaccurate and costly, leading to variability in ion implantation angles, which affects the uniformity and quality of semiconductor devices, particularly in modern ICs with smaller feature sizes.

Method used

A method for determining the crystal orientation angle using a single test wafer, involving ion beam projections at varying tilt angles to generate heat waves, which are analyzed to calculate the crystal orientation angle and implantation angle, allowing for precise control of ion implantation.

Benefits of technology

This method reduces costs and improves the accuracy of ion implantation, enhancing the uniformity and quality of semiconductor devices by minimizing angular deviations, especially in CMOS image sensors with small pixel pitches.

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Abstract

Procedure with the following steps: Receiving a first wafer (110); Defining a first zone (310) and a second zone (320) on the first wafer (110); Defining a plurality of first areas (312) and second areas (322) for the first and second zones (320), respectively; Projecting first ion beams (402) onto the first areas (312) and receiving first heat waves in response to the first ion beams (402); Rotating the first wafer (110) by a rotation angle of essentially 180°; Projecting second ion beams (412) onto the second areas (322) and receiving second heat waves (414) in response to the second ion beams (412); and Determining a first crystal orientation angle of the first wafer (110) based on the first and second ion beams (412) and the first and second heat waves (414).
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Description

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[0001] The IC (integrated semiconductor circuit) industry has experienced rapid growth. Technological advances in IC materials and designs have produced generations of ICs, each generation featuring smaller and more complex circuits than the previous one. Modern ICs rely heavily on ion implantation to dope a substrate, such as a semiconductor wafer, with materials to create n- or p-shaped wells. Ion implantation alters the amount of dopants in the substrate to impart conductivity to the wells. A desired dopant material can be ionized with an ion source and accelerated to produce an ion beam of a defined energy. The ion beam can be directed at a front face of the substrate and penetrate the main body of the substrate.The implanted ions can be distributed around a depth of a wafer area, whereby the distribution and concentration of the ions can be controlled, for example, by adjusting the implantation angle and the radiation energy.

[0002] German patent application DE 10 2016 102 865 A1 describes a method for implanting ions into a semiconductor substrate. The ions of a test implantation are implanted across the semiconductor substrate with a first implantation angle range. Furthermore, the method includes determining an implantation angle offset based on the semiconductor substrate after the test implantation and adjusting the tilt angle of the semiconductor substrate relative to an implantation direction based on the determined implantation angle offset. Additionally, the method includes performing at least one target implantation of ions into the semiconductor substrate after adjusting the tilt angle.

[0003] US 2005 / 0161619A1 discloses the consideration of crystal cutting error data in ion implantation systems.

[0004] The invention is defined in the claims. Brief description of the drawings

[0005] Aspects of the present invention are best understood with reference to the detailed description below in conjunction with the accompanying drawings. It should be noted that, in accordance with common industry practice, various elements are not drawn to scale. Rather, for the sake of clarity of discussion, the dimensions of the various elements may be arbitrarily enlarged or reduced. Fig. Figure 1A is a schematic representation showing a method for manufacturing semiconductor wafers according to some embodiments. Fig. Figure 1B is a schematic representation according to some embodiments showing an ion beam projected onto a semiconductor wafer. Fig. Figure 2 is a flowchart of a method for determining a crystal orientation angle of a semiconductor wafer according to some embodiments. Fig. Figure 3 is a schematic representation showing a surface of a semiconductor wafer with partitioned zones according to some embodiments. Fig. Figure 4 is a schematic representation showing an ion beam projection according to some embodiments. Fig. Figure 5 is a schematic diagram showing the heat wave intensity as a function of the tilt angle of the wafer according to some embodiments. Fig. Figure 6 is a flowchart of a process for manufacturing semiconductor devices according to some embodiments. Fig. Figure 7 is a flowchart of a process for manufacturing semiconductor devices according to some embodiments. Fig. Figure 8 is a schematic representation of a system that implements a method for determining the crystal orientation angle. Detailed description

[0006] The following description provides many different embodiments or examples for implementing various features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present invention. For example, the fabrication of a first element over or on top of a second element in the following description may include embodiments in which the first and second elements are fabricated in direct contact, and it may also include embodiments in which additional elements can be fabricated between the first and second elements, such that the first and second elements are not in direct contact. Furthermore, reference numerals and / or letters may be repeated in the various examples in the present invention.This repetition serves the purpose of simplicity and clarity and does not in itself prescribe a relationship between the various designs and / or configurations discussed.

[0007] Furthermore, spatially relative terms, such as "located below," "under," "lower," "located above," "upper," and the like, can be used here to simply describe the relationship of an element or structure to one or more other elements or structures depicted in the figures. These spatially relative terms are intended to encompass orientations of the device in use or operation beyond the orientation shown in the figures. The device may be oriented differently (rotated by 90 degrees or in a different orientation), and the spatially relative descriptors used here can be interpreted accordingly.

[0008] Notwithstanding the fact that the numerical ranges and parameters specifying the broad scope of protection of the invention are approximate values, the numerical values ​​mentioned in the specific examples are given as accurately as possible. However, a numerical value inherently contains certain errors that inevitably result from the deviations normally found in the respective test measurements. Furthermore, the terms "approximately," "significantly," or "essentially" used here generally mean within 10%, 5%, 1%, or 0.5% of a given value or range. Alternatively, the terms "approximately," "significantly," or "essentially" mean within an acceptable standard error of the mean value when viewed by a person skilled in the art.Unlike in the working examples, or unless expressly stated otherwise, all numerical ranges, quantities, values, and percentages, such as those for quantities of material, durations, temperatures, operating conditions, ratios, and the like, given herein should in all cases be understood as modified by the terms "approximately," "significantly," or "substantially." Therefore, unless otherwise stated, the numerical parameters given in the present invention and the appended claims are approximate values ​​that may change as necessary. At a minimum, each numerical parameter should be interpreted in light of the number of significant figures given and by applying normal rounding methods. Ranges may be presented here as extending from one endpoint to another or as lying between two endpoints.All areas mentioned here include the endpoints, unless otherwise stated.

[0009] A semiconductor wafer serves as the substrate for a semiconductor device, allowing for the fabrication of doped regions within the wafer's main body. A semiconductor blank or wafer is manufactured with a crystal lattice structure featuring parallel lattice planes. The lattice plane of the semiconductor blank determines the crystal orientation angle (or lattice orientation) of the blank or wafer. Generally, a semiconductor blank is grown with a substantially uniform crystal orientation angle throughout, and the angular difference is usually negligible. However, as the size of the semiconductor device decreases, the manufacturing process must be performed with higher accuracy in controlling operating parameters.Otherwise, manufacturing steps performed with insufficient parameter accuracy will lead to problems with the uniformity of quality in the manufactured semiconductor components.

[0010] The present invention provides a method for determining the crystal orientation angle of a semiconductor wafer. The determination method is performed on a single test wafer. The proposed method is more accurate than the alternative method, which uses multiple test wafers, because it eliminates the influence of angle variability between different test wafers. Furthermore, the cost of the test wafers is reduced, as only one test wafer is used per semiconductor blank. Manufacturing steps, such as ion implantation, can be performed with higher accuracy of the projection angle, which better corresponds to the crystal orientation angle of the semiconductor, and the doped areas can be produced by ion implantation with improved profile control.The proposed method also reduces the cost of determining the crystal orientation angle of a group of wafers from the same lot, since in some scenarios only two test wafers or even just one test wafer are required, thus reducing the fixed costs for wafer quality control and improving the calibration efficiency for crystal orientation angles.

[0011] Fig. Figure 1A is a schematic representation showing a method 100 for producing semiconductor wafers according to some embodiments. The method 100 begins with a crystal growth step 102. This produces a semiconductor blank 103. The semiconductor blank 103 can be produced using a crystal growth method known in the field, such as the Czochralski (Cz) method. In some embodiments, the semiconductor blank 103 is grown to have monocrystalline lattice structures. In some embodiments, the semiconductor blank 103 is a blank made of silicon or another suitable semiconductor material. After the production of the silicon blank 103, a step 104 is carried out to produce wafers of semiconductor wafers 110, such as semiconductor wafer 110a, 110b, or 110c, from the semiconductor blank 103.Step 104 may include one or more wafer fabrication steps, such as cutting the semiconductor blank 103 into raw wafers and chamfering, lapping, etching, and polishing the raw wafers to produce finished semiconductor wafers 110. In some embodiments, the semiconductor wafers 110 belong to the same wafer lot if they are produced from the same semiconductor blank 103. In some embodiments, the finished semiconductor wafer 110 has a diameter of approximately 25.4 mm (1 in.) to approximately 304.8 mm (12 in.). In some embodiments, the finished semiconductor wafer 110 has a thickness of approximately 100 µm to approximately 500 µm.

[0012] In some embodiments, the semiconductor wafers 110 have similar crystal structures with the same crystal orientation, associated with a crystal plane such as the (100), (110), or (111) crystal plane, since they are produced from the same semiconductor blank 103. During ion implantation (also referred to as ion beam projection), the penetration depth and the distribution of the implantation are determined, at least in part, by the angle between the incident ion beams and the crystal orientation angle of the lattice structure. Thus, the electrical behavior of a well region produced in the semiconductor wafer by ion beam projection, as well as the electrical behavior of a semiconductor device exhibiting the well region, is influenced by the accuracy of the control of the crystal orientation angle.

[0013] In some embodiments, the semiconductor wafers, e.g., semiconductor wafers 110a, 110b, and 110c, each have a perpendicular N1, N2, or N3, respectively, which is perpendicular to the surface of the semiconductor wafer 110a, 110b, or 110c. Ideally, the semiconductor wafers 110a, 110b, and 110c each have the same crystal orientation direction, which is parallel to a longitudinal axis 103L of the semiconductor blank 103 and is associated with a specific crystal plane, e.g., a (100)-plane. In most cases, however, when the semiconductor blank 103 is cut, the knife is not exactly perpendicular to the longitudinal axis 103L. As a result, the perpendicular N1, N2, or N3 is not parallel to the directions of the respective crystal orientation lines 110L1, 110L2, and 110L3.An included angle β1, β2, or β3 between the directions of the crystal orientation line 110L1, 110L2, or 110L3 and the respective perpendiculars N1, N2, or N3 is hereby referred to as the crystal orientation angle of the semiconductor wafer 110a, 110b, or 110c. In some embodiments, the included angles β1, β2, and β3 are essentially 0°.

[0014] In some embodiments, the orientation of the crystal plane can rotate about the longitudinal axis 103L during the crystal growth of the semiconductor wafer 103 as the crystal lattice structure grows upwards. In other words, the actual crystal orientation lines 110L1, 110L2, and 110L3 at positions 108a, 108b, and 108c, respectively, can point in slightly different directions. Furthermore, the included angles β1, β2, and β3 may not be equal. In some embodiments, the rotation of the crystal plane during crystal growth is proportional to the height of the grown semiconductor wafer 103. Therefore, the included angles β1, β2, and β3, or correspondingly the crystal orientation angles of the semiconductor wafer 110, are approximated by a linear equation. In some further embodiments, the included angle, e.g.,β1, or corresponding to the crystal orientation angle, of the semiconductor wafer 110 can be determined by means of the included angles, e.g. β2 and β3, of two or more other semiconductor wafers 110 from the same semiconductor blank 103.

[0015] Fig. Figure 1B is a schematic representation according to some embodiments, showing an ion beam 120 projected onto a semiconductor wafer 110. In figure (A) of Fig. In 1B, the semiconductor wafer 110 is arranged with its surface 110S parallel to the xy-plane. The representation (A) of Fig. Figure 1B also shows a perpendicular N extending in the direction of the z-axis and perpendicular to the surface 110S. In some embodiments, a crystal plane of the semiconductor wafer 104 may be non-parallel to the surface 110S of the semiconductor wafer 110, as represented by the crystal orientation line 110L, which indicates the crystal orientation of the semiconductor wafer 110. A crystal orientation angle β is formed between the perpendicular N and the crystal orientation line 110L. When the semiconductor wafer 110 is rotated about the perpendicular N perpendicular to the xy-plane, the crystal plane and the crystal orientation line 110L also rotate with the rotation of the semiconductor wafer 110. In some embodiments, the crystal orientation line 110L rotates about the perpendicular N when the semiconductor wafer 110 rotates about the perpendicular N.A notch 130 serves as a reference point, and the semiconductor wafer 110 can be rotated from the notch 130 to a target coordinate (x. o , y o ) are rotated, wherein an included angle or a mean angle between a reference line 110R and a target line 110T is here referred to as a rotation angle θ, the reference line 110R being drawn from the center of the surface 110S to the notch 130, while the target line 110T is drawn from the center of the surface 110S to the target coordinate (x o , y o ) is drawn. In some embodiments, the twist angle Θ represents the change in the crystal plane orientation of the semiconductor wafer 110.

[0016] The ion beam 120 is projected by an ion implantation source (not shown separately), such as an implanter, which is used in ion implantation. The ion beam 120 and the perpendicular N form an enclosed angle α, which is referred to here as the projection angle of the implanter. The ion beam 120 is projected along a path 120P onto a location, such as the center, of the surface 110S of the semiconductor wafer 110.

[0017] In representation (B) of Fig. Figure 1B shows a top view and a side view of the semiconductor wafer 110. During ion beam projection, the semiconductor wafer 110 can be tilted with a wafer tilt angle ω to the xy-plane. In some embodiments, a wafer table (not shown separately) is provided to support and hold the semiconductor wafer 110, the tilt being caused by the inclination of the wafer table. Assume the target coordinate (x o , y o ) is chosen as the tilt point, so the semiconductor wafer 110 is tilted by the tilt of the wafer table, whereby the target line 110T, which is connected to the target coordinate (x o , y oThe wafer tilt angle ω is associated with the xy-plane. The tilt angle ω can be positive or negative depending on whether the target line 110T is above or below the xy-plane. In some embodiments, the direction of the crystal orientation line 110L changes by the amount of the wafer tilt angle ω. Based on the above, the wafer tilt angle ω, the twist angle θ, and the projection angle α together determine the angle between the ion beams 120 and the crystal orientation line 110L of the semiconductor wafer 110, thus allowing the implantation angle of the ion beam 120 to the semiconductor wafer 110 to be determined.

[0018] In some embodiments, the angular difference (α - β) between the projection angle α of the ion beam 120 and the crystal orientation angle β is one of the factors determining the profile of implanted trough areas. Furthermore, the deviation of the trough area profile is greater when the implanted trough area has a reduced grid spacing, e.g., less than approximately 1 µm. For example, in applications using a modern CMOS image sensor, a sensor pixel is fabricated with a pixel pitch of less than 0.8 µm. In these cases, one or more troughs are implanted to fabricate the sensor pixel, and the deviation of the impact angle should be less than 0.05°. As explained above, the actual impact angle is determined by the crystal orientation angle in addition to the implantation angle of the implanter.However, in mass production, it is difficult to have different batches of uncoated wafers with the same crystal orientation angles. Even one and the same batch of semiconductor wafers, e.g., semiconductor wafer 110 from [company name], can have this problem. Fig. 1A, which are manufactured from one and the same semiconductor blank 103, still have a maximum angular deviation of the crystal orientation angle of approximately 0.1° across the entire height of the semiconductor blank 103, which exceeds the accuracy tolerance of the modern CMOS image sensor. Therefore, there is a need for an exact determination of the crystal orientation angle in order to eliminate or reduce the impairment caused by the variability of the crystal orientation angle.

[0019] Fig. Figure 2 is a flowchart of a method 200 for determining a crystal orientation angle of a semiconductor wafer according to some embodiments. It is understood that further steps before, during and after the steps described in Figure 2 may be necessary. Fig. The steps shown in the two examples can be provided for, and some of the steps described below can be replaced or omitted in other embodiments of Method 200. The order of the steps is interchangeable.

[0020] In step 202, a first wafer 110 is produced. The first wafer 110 is also in Fig. Figure 3 shows. In some embodiments, the first wafer 110 is selected from a wafer lot and serves as a test wafer of the wafer lot. In some embodiments, the first wafer 110 is placed on a wafer table or wafer plate (not shown separately). In some embodiments, a notch 110N is created or marked on the first wafer 110. A mark 302, pointing towards the notch 110N of the first wafer 110, serves as a reference point for the notch 110N when the first wafer 110 is rotated from the wafer table.

[0021] As shown in illustration (A) of Fig. As shown in Figure 3, in step 204 a first zone 310 and a second zone 320 are defined on the first wafer 110. Furthermore, a plurality of first regions 312, e.g., first regions 312a, 312b, 312c, 312d, and 312e, and a plurality of second regions, e.g., second regions 322a, 322b, 322c, 322d, and 322e, are defined in the first zone 310 and the second zone 320, respectively. In some embodiments, the first zone 310 and the second zone 320 represent two halves of the first wafer 110. In some embodiments, the first zone 310 and the second zone 320 are symmetrical to each other with respect to a symmetry line S1. In some embodiments, the first zone 310 and the second zone 320 have substantially equal areas, each equal to half the total area of ​​the first wafer 110.In some embodiments, the first zone 310 adjoins the second zone 320, but in some other embodiments, the first zone 310 and the second zone 320 are separated by a third zone between the first zone 310 and the second zone 320, wherein the first zone 310 and the second zone 320 each have an area smaller than half the total area of ​​the first wafer 110. In the illustrated embodiment, the first zone 310 or the second zone 320 is semicircular, but other shapes are also possible, such as a polygonal or a round shape. The shapes and areas of the first zone 310 and the second zone 320, shown in Figure (A) of... Fig. Figure 3 is shown for illustrative purposes only. Other configurations of the first zone 310 and the second zone 320 are also within the intended scope of protection of the present invention.

[0022] The first regions 312 are defined in the first zone 310. The second regions 322 are defined in the second zone 320. In some embodiments, the first regions 312 have different shapes or surfaces. For example, the first region 312a is semicircular, and each of the remaining first regions 312b, 312c, 312d, and 312e has an arc shape, but other shapes, such as polygonal, pie-shaped, or round shapes, are also possible. In some embodiments, the first region 312a borders the remaining first regions 312b, 312c, 312d, and 312e. The first region 312a can be laterally enclosed by the first regions 312b, 312c, 312d, and 312e and the second region 322a of the second zone 320. In some embodiments, the first regions 312a to 312e are adjacent to each other. In some embodiments, the first regions 312a to 312e are spaced apart from each other.In the example shown, the first zone 310 is subdivided into five first areas 312a to 312e. However, other numbers of first areas 312 are also possible.

[0023] In some embodiments, the second regions 322 have different shapes or surfaces. For example, the second region 322a is semicircular, and each of the remaining second regions 322b, 322c, 322d, and 322e is arc-shaped, but other shapes, such as polygonal, pie-shaped, or round shapes, are also possible. In some embodiments, the second region 322a adjoins the remaining second regions 322b, 322c, 322d, and 322e. The second region 322a can be laterally enclosed by the second regions 322b, 322c, 322d, and 322e and the first region 312a of the first zone 310. In some embodiments, the second regions 322a to 322e are adjacent to one another. In some embodiments, the second regions 322a to 322e are spaced apart from one another. In the example shown, the second zone 320 is subdivided into five second areas 322a to 322e. However, other numbers of second areas 322 are also possible.

[0024] In some embodiments, one of the first regions 312, e.g., the first region 312a, and one of the second regions 322, e.g., the second region 322a, form a pair. In some embodiments, the paired first region 312a and second region 322a are symmetrical with respect to the line of symmetry S1. In some embodiments, the paired first region 312a and second region 322a have identical surfaces and shapes. Similarly, the first region 312b (312c, 312d or 312e) is paired with the second region 322b (322c, 322d or 322e), and the first region 312b (312c, 312d or 312e) and the second region 322b (322c, 322d or 322e) are symmetric with respect to the line of symmetry S1.

[0025] In step 206, a first ion beam projection is performed, in which first ion beams 402 are projected onto the first areas 312, as shown in illustration (A) of Fig. Figure 4 shows that first heat waves 404 are received in response to the first ion beams 402. In some embodiments, the implanter is configured to project individual first ion beams 402 successively onto the individual first regions 312, each of the first ion beams 402 being projected at different times with identical energies and the same implantation angle α, and each of the individual first regions 312 receiving the individual first ion beam 402 at a respective wafer tilt angle ω. In some embodiments, the implanter repeatedly projects the first ion beams 402 with different tilt angles ω, the tilt angles ω having an angular difference K1. For example, the angle difference K1 is 0.2°, and the implanter is configured to project a first ion beam 402 five times for the first regions 312a to 312e with wafer tilt angles ω of -0.4°, -0.2°, 0°, 0.2° and 0.4° respectively.In some embodiments, the second zone 320 is prevented from receiving the first ion beams 402 during the first ion beam projection.

[0026] When the first ion beams 402 are projected onto the surface 110S of the first wafer 110, the ionized particles in the first ion beams 402 are accelerated by the implanter and penetrate the internal lattice structure of the first wafer 110. Some of the ionized particles in the first ion beams 402 collide with the atoms in the lattice structure, generating first heat waves 404 that propagate outwards. These first heat waves 404, generated by the collision of the first ion beams 402 with the lattice structure, are detected by a heat wave detector, such as a thermometer. The intensity or temperature of the first heat waves 404 is determined by the extent of the collision, which is related to the actual angle of impact of the first ion beams 402.Since the first ion beams 402 are projected onto the individual first regions 312 at different wafer tilt angles ω, the first heat waves 404 have different intensities for the different instances of the wafer tilt angle ω.

[0027] In some embodiments, the first ion beam 402 strikes the respective area 312 at an angle of impact represented as an angular difference (α - β) when a wafer tilt angle ω of 0° is assumed. By adjusting the wafer tilt angle ω, the actual angle of impact can be made smaller than (α - β) to achieve greater ion penetration and less collision between the ionized particles and the lattice atoms, thereby causing the respective first heat wave 404 to have a lower wave intensity. In some embodiments, when the wafer tilt angle ω is adjusted to compensate for the enclosed angle (α - β) between the implantation angle α and the crystal orientation angle β, the first ion beams 402 reach the crystal plane with a smallest angle of incidence (essentially 0°), so that the first heat waves 404 have a minimum wave intensity.

[0028] Also in the representation (B) of Fig. In step 208, the first wafer 110 is rotated by a twist angle θ using the wafer table. The twist angle θ is set to essentially 180°. When the twist angle θ is set to 180°, the first wafer 110 is rotated by 180° so that the notch 110N points away from the mark 302, and the relative positions of the first regions 312a to 312e and the second regions 322a to 322e are interchanged with respect to the symmetry line S1.

[0029] Also shown in representation (B) of Fig. In step 210, a second ion beam projection is performed, in which second ion beams 412 are projected onto the second regions 322. In response to the second ion beams 412, second heat waves 414 are received. In some embodiments, the implanter is configured to sequentially project individual second ion beams 412 onto the individual second regions 322, each of the second ion beams 412 being projected at different times with identical energies and the same implantation angle α, and each of the individual second regions 322 receiving the individual second ion beam 412 at a respective wafer tilt angle ω. In some embodiments, the first ion beams 402 and the second ion beams 412 have identical implantation energies and implantation angles α. In some embodiments, the wafer tilt angles ω have an angular difference K2.For example, the angular difference K2 is 0.2°, and the implanter is configured to project five second ion beams 412 onto the second regions 322a to 322e with wafer tilt angles ω of -0.4°, -0.2°, 0°, 0.2°, and 0.4°, respectively. In some embodiments, the angular difference K1 is equal to or different from the angular difference K2. In some embodiments, the first region 310 is prevented from receiving the second ion beams 412 during the second ion beam projection.

[0030] When the second ion beams 412 are projected onto the surface 110S of the first wafer 110, the ionized particles in the second ion beams 412 are accelerated by the implanter and penetrate the internal lattice structure of the first wafer 110. Some of the ionized particles of the second ion beams 412 collide with the atoms in the lattice structure, generating second heat waves 414 that propagate outwards. These second heat waves 414, generated by the collision of the second ion beams 412 with the lattice structure, are detected by a heat wave detector, such as a thermometer. The intensity or temperature of the second heat waves 414 is determined by the extent of the collision, which is related to the actual angle of incidence of the second ion beams 412.Since the second ion beams 412 are projected onto the individual second areas 322 at different wafer tilt angles ω, the second heat waves 414 have different intensities at the different wafer tilt angles ω.

[0031] In representations (A) and (B) of Fig. 4. The crystal orientation angles β and -β are distinguished by a sign corresponding to the rotation of the first wafer 110 by a twist angle θ of 180°. In some embodiments, the second ion beam 412 strikes the second regions 322 at an angle of incidence (α + β) when a wafer tilt angle ω of 0° is assumed. By adjusting the wafer tilt angle ω, the actual angle of incidence can be made smaller than (α + β) to achieve greater ion penetration and less collision between the ionized particles and the lattice atoms, thereby reducing the wave intensity of the respective second heat wave 414.In some embodiments, when the wafer tilt angle ω is adjusted to compensate for the enclosed angle (α + β), the second ion beams 412 reach the crystal plane with a smallest angle of incidence (essentially 0°), so that the second heat waves 414 have a minimum wave intensity.

[0032] In step 212, a first crystal orientation angle β of the first wafer 110 is determined based on the first ion beams 402, the second ion beams 412, the first heat waves 404, and the second heat waves 414. In some embodiments, the implantation angle of the implanter is also determined based on the first ion beams 402, the second ion beams 412, the first heat waves 404, and the second heat waves 414. Fig. Figure 5 shows a schematic diagram 500 illustrating the heat wave intensity as a function of the wafer tilt angle ω according to some embodiments. The diagram 500 plots the intensities of the first heat waves 404 and the second heat waves 414. The diamond symbols denote the intensities of the first heat waves 404 at different wafer tilt angles ω, and the square symbols denote the intensities of the second heat waves 414 at different wafer tilt angles ω.

[0033] A curve fitting is performed to generate a curve that best matches the measurement results of the first heat waves 404, represented by the dashed line. Likewise, another curve fitting is performed to generate a curve that best matches the measurement results of the second heat waves 414, represented by the solid line. Subsequently, a wafer tilt angle ω1 is determined at which a minimum intensity of the first heat waves 404 is achieved. Similarly, another wafer tilt angle ω2 is determined at which a minimum intensity of the second heat waves 414 is achieved. In some embodiments, the value of the wafer tilt angle ω1 or ω2 is determined by solving an equation that describes the curve of the first heat waves 404 or the second heat waves 414, respectively.

[0034] As explained above, the wafer tilt angle ω1, which leads to the minimum wave intensity of the first heat waves 404, corresponds to the angle difference (α - β), while the wafer tilt angle ω2, which leads to the minimum wave intensity of the second heat waves 414, corresponds to the angle difference (α + β). Therefore, the values ​​for the implantation angle α and the crystal orientation angle β can be determined by linear algebra and can be represented as follows: α=(ω1+ω2) / 2 and β=(ω2−ω1) / 2.

[0035] Fig. Figure 6 is a flowchart of a process 600 for manufacturing semiconductor devices according to some embodiments. It is understood that further steps before, during, and after the processes described in Figure 6 are possible. Fig. The steps shown in the 6 examples can be used, and some of the steps described below can be replaced or omitted in other embodiments of method 600. The order of the steps is interchangeable.

[0036] In step 602, a first wafer is obtained. In some embodiments, the first wafer is wafer 110a of Fig. 1A or wafer 110 of the Fig. 3 and Fig. 4. In step 604, a first zone and a second zone are defined on the first wafer. In some embodiments, the first zone is the first zone 310 of Fig. 3, and the second zone is the second zone 320 of Fig. 3. In some embodiments, first areas 312 are defined in the first zone 310, and second areas 322 are defined in the second zone 320.

[0037] In step 606, a first ion beam projection and a second ion beam projection are performed, the first and second ion beams being projected, respectively, onto the first and second zones of the first wafer. In some embodiments, the first ion beams are the first ion beams 402, and the second ion beams are the second ion beams 412. In some embodiments, the first zones and the second zones receive the first and second ion beam projections, respectively, at the respective implanter tilt angles. In response to the first and second ion beam projections, first heat waves and second heat waves are received, respectively. In some embodiments, the first or second ion beam projection in step 606 is performed in a manner similar to steps 206, 208, and 210.

[0038] In step 608, a first crystal orientation angle of the first wafer is determined based on the first and second ion beams. In some embodiments, the first crystal orientation angle of the first wafer is further determined based on the first and second heat waves. In some embodiments, the implantation angle of the implanter is also determined in step 608 based on the first and second ion beams, the first heat waves, and the second heat waves. In some embodiments, the determination of the first crystal orientation angle of the first wafer and the implantation angle of the implanter in step 608 is carried out in a similar manner to step 212.

[0039] In step 610, a second wafer is obtained. In some embodiments, the second wafer is wafer 110b of Fig. 1A or wafer 110 of the Fig. 3 and Fig. 4. In some embodiments, the first and second wafers are test wafers. In some embodiments, the first and second wafers are produced from the same semiconductor blank and are separated from each other by one or more other wafers within the semiconductor blank. In some embodiments, the first and second wafers belong to the same wafer lot and are separated from each other by one or more other wafers.

[0040] In step 612, a third zone and a fourth zone are defined on the second wafer. In some embodiments, the third zone is the first zone 310 of Fig. 3, and the fourth zone is the second zone 320 of Fig. 3. In some embodiments, first areas 312 are defined in the first zone 310, and second areas 322 are defined in the second zone 320.

[0041] In step 614, a third and a fourth ion beam projection are performed, the third and fourth ion beam projections projecting third and fourth ion beams, respectively, onto the third and fourth zones of the second wafer. In some embodiments, the third ion beams are the first ion beams 402, and the fourth ion beams are the second ion beams 412. In some embodiments, the first regions 312 and the second regions 322 of the second wafer receive the third and fourth ion beam projections, respectively, at the respective implanter tilt angles. In some embodiments, third and fourth heat waves are received in response to the third and fourth ion beam projections.In some embodiments, the third or fourth ion beam projection in step 614 is performed in a similar manner to steps 206, 208 and 210.

[0042] In step 616, a second crystal orientation angle of the second wafer is determined based on the third and fourth ion beams. In some embodiments, the second crystal orientation angle of the second wafer is further determined based on the third and fourth heat waves. In some embodiments, the implantation angle of the implanter is also determined in step 616 based on the third and fourth ion beams, the third heat waves, and the fourth heat waves. In some embodiments, the determination of the second crystal orientation angle of the second wafer and the implantation angle of the implanter in step 616 is carried out in a similar manner to step 212.

[0043] In step 618, a third wafer is obtained. In some embodiments, the third wafer is a wafer prepared for the fabrication of a semiconductor device. In some embodiments, the third wafer is produced from a semiconductor blank from which the first and second wafers are also produced. In some embodiments, the third wafer belongs to the same wafer lot as the first and second wafers. In some embodiments, the third wafer is positioned in the semiconductor blank between the first and second wafers.

[0044] In step 620, a third crystal orientation angle of the third wafer is determined based on the first and second crystal orientation angles. In some embodiments, the third crystal orientation angle of the third wafer is determined by interpolation or extrapolation of the first and second crystal orientation angles based on the distances between the first, second, and third wafers in the semiconductor blank. In some embodiments, the third crystal orientation angle of the third wafer is an arithmetic mean of the first crystal orientation angle of the first wafer and the second crystal orientation angle of the second wafer.In some embodiments, a fourth crystal orientation angle of a fourth wafer is obtained in the same semiconductor blank, and the third crystal orientation angle of the third wafer is determined based on the first, second and fourth crystal orientation angles, e.g., using a suitable approximation method such as curve fitting or linear regression.

[0045] In some embodiments, the implanter used to perform the ion beam projection in steps 606 and 614 is one and the same implanter, and the final implanter angle is determined based on the results of the implanter angle determination performed in steps 608 and 616. In some embodiments, the final implanter angle is determined by averaging the results of the first wafer and second wafer implantation angle determinations performed in steps 608 and 616.

[0046] In step 622, ion implantation is performed on the third wafer according to the third crystal orientation angle. In some embodiments, the third wafer is not a test wafer, and the ion implantation is performed to create a trough region in the third wafer for fabricating a semiconductor device. In some embodiments, the ion implantation on the third wafer is performed according to the implanter's implantation angle.

[0047] Fig. Figure 7 is a flowchart of a process 700 for manufacturing semiconductor devices according to some embodiments. It is understood that further steps before, during, and after the processes described in Figure 7 are possible. Fig. The steps shown in the 7 examples can be provided for, and some of the steps described below can be replaced or omitted in other embodiments of method 700. The order of the steps is interchangeable.

[0048] In step 702, a plurality of wafers is obtained. In some embodiments, the plurality of wafers belong to one and the same wafer lot or to different wafer lots. In some embodiments, the plurality of wafers is produced from one and the same semiconductor blank or from different semiconductor blanks. In step 704, the crystal orientation angles of the plurality of wafers are determined. In some embodiments, the crystal orientation angle of each of the plurality of wafers is determined by method 200, wherein the crystal orientation angle is determined in step 212, or it is determined by method 600, wherein the crystal orientation angle is determined in step 602 based on the crystal orientation angles of the other wafers. In some embodiments, the crystal orientation angle is determined by another suitable method.In some embodiments, an implantation angle of an implanter is also determined in step 704. In some embodiments, the plurality of wafers comprises one or more test wafers, and the crystal orientation angles of the test wafers are determined. The crystal orientation angles of the remaining wafers of the plurality of wafers are determined based on the determined crystal orientation angles of the test wafers.

[0049] In step 706, the majority of wafers, optionally excluding the test wafers, are divided into more than one wafer group according to their crystal orientation angles. In some embodiments, each wafer group is identified by a characteristic crystal orientation angle. In other embodiments, the number of wafer groups is determined based on the accuracy of the assigned crystal orientation angles. A smaller standard deviation of the crystal orientation angles of the wafers in a wafer group may require more wafer groups, resulting in a more accurate characteristic crystal orientation angle for each wafer group. The wafers in each wafer group may originate from the same semiconductor blank or from different semiconductor blanks.

[0050] In step 708, at least one wafer is selected from a specific wafer group. In step 710, ion implantation is performed on the at least one selected wafer. In some embodiments, the ion implantation is performed using the implanter according to the determined tilt angle of the implanter and the characteristic crystal orientation angle of the wafer group from which the at least one wafer was selected. Since the selected wafers have a common characteristic crystal orientation angle, the ion implantation can be performed with a more precise tilt angle relative to these wafers by minimizing or eliminating the variability of the crystal orientation angles between different wafers during mass production.

[0051] Fig.Figure 8 is a schematic representation of a system 800 that implements a method for determining a crystal orientation angle. The system 800 comprises: one or more processors 801, a network interface 803, an input / output (I / O) device 805, a non-volatile memory 807, a volatile memory 809, and a bus 808. The bus 808 connects the network interface 803, the I / O device 805, the non-volatile memory 807, the volatile memory 809, and the processors 801.

[0052] The 801 processor is configured to execute program instructions comprising a tool configured to perform the method described and explained with reference to the figures of the present invention. Accordingly, the tool is configured to perform steps such as determining and providing crystal orientation angles and adjusting parameters, such as the tilt angle of an implanter, one or more semiconductor processing devices.

[0053] The 803 network interface is configured to access program commands and data accessed by the program commands, which are stored remotely via a network (not shown).

[0054] The I / O device 805 comprises an input device and an output device configured to enable user interaction with the System 800. In some examples, the input device includes a keyboard, a mouse, and other devices. The output device includes a display, a printer, and other devices.

[0055] The 807 non-volatile memory is configured to store program instructions and the data accessed by those instructions. In some examples, the 807 non-volatile memory includes a non-volatile, machine-readable storage medium, such as a magnetic disk and an optical disk.

[0056] The 809 volatile memory is configured to store program instructions to be executed by the 801 processor and data accessed by those program instructions. In some examples, the 809 volatile memory comprises a combination of random-access memory (RAM), another volatile memory device, solid-state memory (ROM), and another non-volatile memory device.

Claims

[1] Procedure with the following steps: Receiving a first wafer (110); Defining a first zone (310) and a second zone (320) on the first wafer (110); Defining a plurality of first areas (312) and second areas (322) for the first and second zones (320), respectively; Projecting first ion beams (402) onto the first areas (312) and receiving first heat waves in response to the first ion beams (402); Rotating the first wafer (110) by a rotation angle of essentially 180°; Projecting second ion beams (412) onto the second areas (322) and receiving second heat waves (414) in response to the second ion beams (412); and Determining a first crystal orientation angle of the first wafer (110) based on the first and second ion beams (412) and the first and second heat waves (414). [2] Method according to claim 1, wherein the projecting of the first ion beams (402) onto the first regions (312) comprises projecting each of the first ion beams (402) onto each of the first regions (312) at different times and tilting the first wafer (110) with respective first tilt angles, wherein the first tilt angles have an angular difference. [3] Method according to claim 1 or 2, wherein the projecting of the second ion beams (412) onto the second areas (322) comprises projecting each of the second ion beams (412) onto each of the second areas (322) at different times and tilting the first wafer (110) with respective second tilt angles, wherein the second tilt angles are separated by a second difference value. [4] Method according to any of the preceding claims, wherein determining the crystal orientation angle of the first wafer (110) comprises measuring first intensities and second intensities of the first and second heat waves (414), respectively. [5] A method according to any of the preceding claims, further comprising: Obtaining a second wafer and defining a third zone and a fourth zone on the second wafer, wherein the first wafer (110) and the second wafer are made from one and the same blank; Projecting third and fourth ion beams onto the third and fourth zones respectively; and Determining a second crystal orientation angle of the second wafer according to the third and fourth ion beams. [6] The method of claim 5, further comprising: Extracting a third wafer from the blank; and Determining a third crystal orientation angle of the third wafer based on the first and second crystal orientation angles. [7] Method according to claim 6, wherein the third crystal orientation angle of the third wafer comprises an arithmetic mean of the crystal orientation angles of the first and the second wafer. [8] Method according to any of the preceding claims, further comprising determining an implantation angle of an implanter projecting the first and second ion beams (412) based on the first and second ion beams (412) and the first and second heat waves (414). [9] The method of claim 8, insofar as it relates back to claims 6 or 7, further comprising performing an ion implantation on the third wafer according to the third crystal orientation angle and the implantation angle. [10] Method according to any of the preceding claims, wherein the first and second zones (320) are semicircular. [11] Method according to any of the preceding claims, wherein the first regions (312) comprise a first middle region which is enclosed by the other first regions (312) and the second zone (320). [12] Procedure with the following steps: Defining a first zone (310) and a second zone (320) on a first wafer (110); Projecting first and second ion beams (412) onto the first and second zones (320), respectively, wherein the first wafer (110) is rotated by an angle of rotation of substantially 180° between the projection of the first and second ion beams (412); Determining a first crystal orientation angle of the first wafer (110) based on the first and second ion beams (412); Defining a third zone and a fourth zone on a second wafer; Projecting third and fourth ion beams onto the third and fourth zones respectively, wherein the second wafer is rotated by an angle of rotation of substantially 180° between the projection of the third and fourth ion beams; Determining a second crystal orientation angle of the second wafer based on the third and fourth ion beams; and Determining a third crystal orientation angle of a third wafer based on the first and second crystal orientation angles. [13] The method of claim 12, further comprising producing a semiconductor blank (103) and separating the semiconductor blank (103) to produce the first, second and third wafer. [14] Method according to claim 12 or 13, wherein the projection of the first and the second ion beams (412) onto the first and the second zone (320) respectively further comprises projecting one of the first ion beams (402) onto a first region (312) of the first zone (310) and projecting one of the second ion beams (412) onto a second region (322) of the second zone (320), wherein one of the first ion beams (402) and one of the second ion beams (412) have identical energies and implantation angles. [15] Method according to claim 14, wherein the first region (312) and the second region (322) are symmetrical about a symmetry line of the first wafer (110). [16] Procedure with the following steps: Receiving a plurality of wafers; Determining crystal orientation angles of the majority of wafers, wherein determining the crystal orientation angles of a wafer (110) comprises projecting ion beams onto different areas of the wafer (110) at different wafer twist angles, the twist angles differing by substantially 180°; Dividing the majority of wafers into wafer groups according to their crystal orientation angles; Selecting at least one wafer (110) from one of the wafer groups; and Performing an ion implantation on the at least one wafer (110) according to a characteristic crystal orientation angle of one of the wafer groups. [17] Method according to claim 16, further comprising determining an implantation angle of an implanter that performs the ion implantation, wherein the ion implantation is performed according to the implantation angle. [18] Method according to claim 16 or 17, wherein the plurality of wafers comprises a test wafer, wherein determining the crystal orientation angles of the plurality of wafers comprises determining a crystal orientation angle of the test wafer prior to determining the crystal orientation angles of the remaining wafers. [19] Method according to claim 18, wherein determining the crystal orientation angle of the test wafer comprises projecting ion beams onto different areas of the test wafer with different inclination angles.

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