HIGH-SIDE SEMICONDUCTOR SWITCH WITH OVERCURRENT PROTECTION

Abstract

Circuit comprising:a high-side power transistor (TL) with a load current path connected between a supply node (VD) and an output node (OUT) and configured to supply a load current (iL) to a load (RL) during operation;a gate driver circuit (12) coupled to a control electrode of the power transistor (TL);a first stage (13a) of an overcurrent protection circuit (13) coupled to the control electrode of the power transistor (TL) and configured to drive the control electrode upon determining that the load current (iL) has reached a first threshold value (iTH1≈ k×VOS1 / RS1) such that a voltage drop (VDS) across the load current path of the power transistor (TL) increases;a second stage (13b) of the overcurrent protection circuit (13) coupled to the control electrode of the power transistor (TL) and configured to control the control electrode upon detection that the load current (iL) has reached a second threshold value (iTH2≈ k×VOS2 / RS2) such that the load current (iL) is limited to a maximum value (iLMAX) or that the power transistor (TL) is switched off;

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the field of intelligent semiconductor switches, in particular to a high-side semiconductor switch with overcurrent protection. BACKGROUND

[0002] A wide variety of types of intelligent semiconductor switches are known for different applications (e.g., automotive or industrial applications). In addition to the actual switch (usually a high-side power MOSFET), such semiconductor switches can contain additional circuitry to turn the semiconductor switch on and off and, if necessary, output diagnostic information (e.g., load current, temperature, etc.) or protect the switch from overload (e.g., due to excessive temperature or load currents). An intelligent semiconductor switch can also have multiple channels, each containing a semiconductor switch for controlling a load.

[0003] An overload of the semiconductor switch due to an excessive load current (overcurrent) can occur, for example, due to a short circuit or a similar malfunction of the load connected to the semiconductor switch. Various concepts for protecting the semiconductor switch against overcurrent are known. Such concepts typically combine a current detection circuit (current measuring circuit) and a type of comparator circuit that can trigger the semiconductor switch to turn off upon detecting that the load current exceeds a defined (current) threshold. Alternatively, load current limitation can be implemented instead of a hard shutdown. Current limitation typically ensures that the load current does not exceed a defined maximum current. Publication DE 102010064258 A1 describes a semiconductor component comprising a power transistor, a current sensor arrangement, and an evaluation circuit.The latter is designed to compare a current measurement signal of the current sensor arrangement with a threshold value and to signal an overcurrent if the measurement signal (still) exceeds the threshold value after a defined period of time has passed since the activation of the transistor.

[0004] Current sensing resistors (sometimes referred to as shunt resistors) can be used to sense (measure) the load current. However, in high-side switches, current measurement with a sense resistor can cause problems due to the limited voltage headroom available for the voltage drop across the resistor. In particular, precisely setting the aforementioned current threshold or current limit can be difficult. The object underlying the invention described here can be seen as improving existing concepts for overcurrent protection in intelligent semiconductor switches. SUMMARY

[0005] The mentioned object is achieved by the circuit according to claim 1 and the method according to claim 16. Various embodiments and further developments are the subject of the dependent claims.

[0006] The following describes a circuit that can be used as a smart semiconductor switch. According to one embodiment, the circuit includes a high-side power transistor with a load current path coupled between a supply node and an output node, which is configured to supply a load current to a load during operation. The circuit further includes a gate driver circuit coupled to a control electrode of the power transistor, and a first stage of an overcurrent protection circuit coupled to the control electrode of the power transistor and configured to drive the control electrode upon determining that the load current has reached a first threshold value, such that a voltage drop across the load current path of the power transistor increases.A second stage of the overcurrent protection circuit is coupled to the control electrode of the power transistor and is configured to drive the control electrode upon detecting that the load current has reached a second threshold value such that the load current is limited to a maximum value or that the power transistor is turned off.

[0007] Furthermore, a method for overcurrent protection in a smart semiconductor switch is described. According to one embodiment, the method includes controlling a power transistor into a conducting state by charging a control electrode of the power transistor. The method further includes controlling the control electrode such that a voltage drop across a load current path of the power transistor increases when the load current reaches a first threshold, and controlling the control electrode such that the load current is limited to a maximum value, or switching off the power transistor when the load current has reached a second threshold. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The invention will be better understood by reference to the following description and the drawings. The components in the figures are not necessarily to scale, but rather emphasis is placed upon illustrating the principles of the invention. Furthermore, like reference numerals designate corresponding parts throughout the drawings. In the drawings: Fig. Figure 1 shows an example of a high-side semiconductor switch with a simple overcurrent protection circuit. Fig. 2 shows a general example of an intelligent semiconductor switch with overcurrent protection according to the embodiments described herein. Fig. 3 shows an exemplary implementation of the intelligent semiconductor switch from Fig. 2. Fig. 4 shows another exemplary implementation of the intelligent semiconductor switch of Fig. 2. Fig. 5 shows a modification of the example of Fig. 4, according to which the overcurrent protection circuit switches off the intelligent semiconductor switch instead of limiting the current. Fig. 6 is a diagram showing an overcurrent protection method according to the embodiments described herein. DETAILED DESCRIPTION

[0009] Fig. Figure 1 shows an example of a high-side semiconductor switch with a simple overcurrent protection circuit. The high-side semiconductor switch can be implemented as a MOS (metal-oxide-semiconductor) field-effect transistor (MOSFET). For example, a DMOS (double-diffused MOS) transistor can be used, which is formed from several transistor cells connected in parallel (i.e., with a common gate, a common drain, and a common source electrode). The several transistor cells are typically arranged in a so-called cell array.

[0010] In the example shown, the (e.g. DMOS) power transistor, designated T L , between a supply node VD and an output node OUT, to which an electrical load is connected during operation. In Fig. 1 is the electrical load through the resistance R Lsymbolized. However, it should be understood that the load can also be a more complex circuit containing various active and passive electronic circuit components. The nodes VD and OUT can be connected to the respective terminals of the chip to enable the connection of external circuits. In the example shown, the supply voltage VD is connected to the supply node / terminal VD and thus also to the drain electrode of the power transistor T L The voltage present at the output node OUT is denoted by Vs.

[0011] The gate of the power transistor T L is usually controlled (charged / discharged) by a so-called gate driver circuit, which is Fig. 1 is designated by reference numeral 12. Various suitable gate driver circuits are known per se and will therefore not be explained in detail here. Fig. 1 shows only a simplified example of a gate driver in which, depending on the level of the logic signal IN, either a current source Q1 (which supplies a positive gate current i G >0) or a current source Q2 (which supplies a negative gate current i G <0) with the gate electrode of the transistor T L For example, a high level of the logic signal IN (IN=1) can cause the current source Q1 to supply a positive gate current i G and thereby the gate of the transistor T L to charge and turn on the transistor. Similarly, a low level of the logic signal IN (IN=0) can cause the current source Q2 to supply a negative gate current i G and thereby the gate of the transistor T L discharge and turn off the transistor.

[0012] The current source Q1 can be connected between a charge pump output (output voltage V CP ) and the gate electrode of the transistor T Lwhile the current source Q2 is connected between the gate electrode of the transistor T L and its source electrode (connected to the output node OUT). The charge pump (designated by reference numeral 11) is designed to supply a supply voltage V CP -V S for the gate driver 12 and other circuits for which the electrical potential V S which represents the reference potential (floating ground). Various suitable charge pump and other circuits for providing the voltage V CP are known as such and will therefore not be discussed further here.

[0013] The overcurrent protection circuit uses a so-called sense transistor T S and a resistance R S for current detection (current measurement) and an amplifier circuit (operational amplifier AMP and transistor T1) for current limiting. The sense transistor T Scan consist of one or more transistor cells of the cell array of the power transistor T L The transistors T S and T L have common gate and drain electrodes, but separate source electrodes. Therefore, the drain current (supplied by the voltage supply) is converted into the load current i L and the sense current is divided, where the sense current is approximately proportional to the load current and the proportionality factor is determined by the ratio of the active areas (or the ratio of the number of transistor cells) of the transistors T L and T S To determine the sense current i S into a voltage signal, a current detection resistor (current measuring resistor) is connected between the source electrode of the sense transistor T S and the output node OUT.

[0014] The tension i S · R S across the resistor Rs and a reference voltage VOS (offset voltage) are fed to the amplifier circuit, which is designed to draw such a current from the gate electrode of the power transistor T L to derive (“to sink”) that the sense current is approximately equal to a threshold current (maximum current) V OS / R S The threshold / maximum current is determined by the reference voltage V OS and the resistance of the resistor R S To determine the load current i L To limit the voltage, the transistor T1 is connected between the gate electrode and the source electrode of the transistor T L coupled, while the gate of transistor T1 is controlled by the output of the operational amplifier AMP based on the difference R S · i S -V OS (which is proportional to the difference i S -V OS / R S The operational amplifier AMP can be controlled by the voltage V S(Output voltage at the output node OUT) and the voltage V provided by the charge pump 11 CP In some embodiments, the operational amplifier AMP may operate as, or be replaced by, a comparator (considered a differential amplifier with a high gain). When replaced by a comparator, the operational amplifier AMP may operate in open-loop mode to trigger an overcurrent shutdown when the difference R S · i S -V OS becomes positive. This also applies to other examples described here.

[0015] As from Fig. 1, the offset voltage V OS the current threshold / current limit. When fully switched on, the power transistor T Ltypically an on-resistance of approximately 1 milliohm. Assuming that the overload protection is to be triggered at a load current of 30 amperes, the voltage drop across the on-resistance of the power transistor T L 30 millivolts (drain-source voltage V DS ). This means that the theoretical maximum voltage across the sense resistor in this example is also 30 millivolts, and of course the offset voltage V OS (significantly) less than 30 millivolts for the amplifier AMP to work properly.

[0016] The offset voltage V OS However, it cannot be set as small as desired, because if the offset voltage V OSis too small, it is no longer negligible compared to the systematic (but practically random) offset of the operational amplifier AMP, which degrades the accuracy. Accordingly, the required accuracy determines a lower limit for the offset voltage, which is typically greater than the drain-source voltage V DS of the power transistor T L . With the restriction that V OS during the on-state of the power transistor T L less than V DS must be, the overcurrent protection circuit 13 of Fig. 1 should only be used in applications where the accuracy requirements are rather low (so that V OS can be set to sufficiently low values).

[0017] To improve the situation, a novel concept is discussed below, which is more complex than the example in Fig. 1 higher offset voltages V OSby using an overcurrent protection circuit with two stages that are activated sequentially when the load current increases towards the preset current limit. An example is shown in Fig. 2 shown.

[0018] The circuit of Fig. 2 contains a high-side DMOS transistor T as a power semiconductor switch L , which has a load current path (drain-source current path) coupled between a supply node VD and an output node OUT. The nodes VD and OUT can be connected to respective chip terminals. The output node OUT supplies during operation (ie, when the transistor T L is switched on) a load current i L to an electrical load R L . A driver circuit 12 is connected to the control (gate) electrode of the power transistor T LVarious suitable gate driver implementations are known as such and will therefore not be discussed further here. Similar to the example of Fig. 1, a charge pump can be used to supply the gate driver with a supply voltage V CP which is higher than the voltage V S at the output node. Accordingly, the gate driver 12 “sees” the voltage difference V CP -V S as the supply voltage. The electrical potential at the output node OUT is the reference potential (floating ground) for the gate driver and for the overcurrent protection circuit described below.

[0019] As already mentioned, the circuit of Fig. 2 via a two-stage overcurrent protection circuit 13. The first stage 13a of the overcurrent protection circuit is connected to the gate electrode of the power transistor T Lcoupled and designed to switch the control electrode on the detection that the load current i L a first threshold i TH1 has been reached (by modifying the gate voltage V G ) in such a way that the voltage drop V DS across the load current path of the power transistor T L This first threshold i TH1 is lower than the actual current limit, which is determined by a second threshold i TH2 is represented.

[0020] The second stage 13b of the overcurrent protection circuit is also connected to the gate electrode of the power transistor T L coupled and designed to switch the control electrode on the detection that the load current i L the second threshold i TH2 has been reached (by further modifying the gate voltage V G ) in such a way that the load current i L to a maximum value i LMAXThe second threshold may (but does not necessarily have to) be equal to the maximum load current i LMAX Instead of the load current i L to the maximum current i LMAX To limit the voltage, the power transistor T L on the finding that the load current i L the second threshold i TH2 has been reached, be switched off.

[0021] If the load current i L increases and the first threshold i TH1 reached, the first stage 13a does not limit the load current and does not trigger a shutdown of the transistor T L but only discharges the gate of the power transistor T L slightly to reduce the gate voltage V G by such an amount that the drain-source voltage V DS from very low values of, for example, a few tens of millivolts to somewhat higher values of, for example, 70-150 millivolts. This increase in voltage VDS provides the second stage 13b with sufficient voltage margin to be able to carry out the current limitation (or an overcurrent shutdown) with the required accuracy.

[0022] The Fig. 3 and Fig. 4 show two very similar circuits, in which exemplary implementations of the two-stage overcurrent protection circuit are shown in more detail. Fig. In the example shown in Figure 3, each of the stages 13a and 13b of the overcurrent protection circuit contains a current detection circuit (current measuring circuit, current sensor circuit). Each current detection circuit is composed of a sense transistor, T S1 and T S2 , and a (current sensing) resistor, R S1 and R S2 , which are connected in series with the drain-source current path of the sense transistor. As described above with reference to Fig. 1, the sense transistors T S1 and T S2from one or more transistor cells of the cell array of the power transistor T L The transistors T S1 , T S2 and T L have common gate and drain electrodes, but separate source electrodes. Therefore, the drain current (supplied by the power supply) is converted into the load current i L (which is generated by the power transistor T L flows) and the sense currents i S1 and i S2 divided, with the sense currents i S1 and i S2 approximately proportional to the load current i L As mentioned above, the proportionality factor is determined by the ratio of the active areas (or the ratio of the number of transistor cells) of the transistors T L and T S1 or T L and T S2 To determine the sense currents i S1 and i S2 into voltage signals (current sense signals V RS1 =i S1 · R S1 and VRS2 =i S2 · R S2 ), the resistors R S1 and R S2 between the source electrode of the respective sense transistor (T S1 or T S2 ) and the output node OUT. According to some embodiments, the resistance of the resistor R S1 be lower than the resistance of the resistor R S2 (R S1 <R S2 ).

[0023] The first stage 13a of the protection circuit includes an amplifier AMP1 designed to detect a difference between the first current detection signal V RS1 and a first offset (reference) voltage V OS1 to amplify. The offset voltage V OS1 determines the first threshold i TH1 , which in the present example is approximately equal to k1×V OS1 / R S1 is (where k1 is the proportionality factor between i L and i S1 is).

[0024] A first control element is connected to the gate electrode of the power transistor T L coupled and configured to draw current from the gate electrode in response to an output signal from the amplifier AMP1, resulting in an increased drain-source voltage V DS In the Fig. In the example shown in Figure 3, this control element is a transistor T1, which is connected between the gate electrode and the source electrode of the power transistor T L is coupled, the conductivity of the transistor T1 being controlled by the output of the amplifier AMP1, which drives the gate of the transistor T1.

[0025] If the load current i L the first threshold i TH1 reached (which is indicated by the current detection signal V RS1 the offset voltage V OS1reached), the amplifier generates a positive output voltage high enough to drive transistor T1 into a conducting state. Transistor T1 is not fully turned on, but provides a current path conductive enough to drain enough charge from the gate of the power transistor to maintain the gate voltage V G of the power transistor such that the drain-source voltage V DS of the power transistor T L from a few 10 millivolts to higher values (e.g. 70 to 150 mV).

[0026] As soon as the drain-source voltage V DS of the power transistor T L (because the first stage is active) is at an elevated level, the second stage 13b of the overcurrent protection circuit is activated. The second stage 13b can operate essentially in the same way as the single-stage protection circuit of Fig. 1 with the (important) difference that the offset (reference) voltage V OS2 compared with the example of Fig. 1 can be set to a significantly higher value, thereby significantly increasing the achievable accuracy of the current limiting circuit. The improved accuracy is achieved because the offset (reference) voltage V OS2 can be set to a level high enough that the intrinsic offset voltage at the input of the operational amplifier APM2 compared to the voltage V OS2 is negligible, while V OS2 is still lower than the increased drain-source voltage V DS .

[0027] In the example of Fig. 3, the second overcurrent protection stage 13b includes an amplifier AMP2 which is designed to detect a difference between the second current detection signal V RS2 and the second reference voltage V OS2to amplify. The second offset (reference) voltage V OS2 determines the second threshold i TH2 , which in the present example is approximately equal to k2×V OS2 / R S2 is (where k2 is the proportionality factor between i L and i S2 The factors k1 and k2 can be equal (k1=k2=k).

[0028] A second control element is connected to the gate electrode of the power transistor T L and configured to draw current from the gate electrode of the power transistor in response to an output signal from the amplifier AMP2. Fig. In the example shown in Figure 3, the second control element is a transistor T2, which is connected between the gate electrode and the source electrode of the power transistor T L is coupled, the conductivity of the transistor T2 being controlled by the output of the amplifier AMP2, which drives the gate of the transistor T2.

[0029] If the load current i L the second threshold i TH2 reached (which is indicated by the current detection signal V RS2 the offset voltage V OS2 reached), then the amplifier AMP2 generates a positive output voltage to drive the transistor T2 into a conducting state. In this case, the transistor T2 is not fully turned on, but provides a current path whose conductivity is controlled (by the amplifier output of the amplifier AMP2) such that the gate voltage V G of the power transistor is reduced by such an amount that the load current is limited to the desired value (given by the second threshold).

[0030] The amplifier AMP2 can be an operational amplifier with a very high gain G (e.g. G>10 5 ... 10 7 ). As can be seen from Fig. 3, the output of the operational amplifier AMP2 (via the transistor T1, which supplies the gate voltage V G and thus the load current i L and the current detection signal V RS2 influenced) is fed back to the input of the amplifier. This feedback loop allows current limitation of the load current such that the current detection signal V RS2 approximately equal to the offset voltage V OS2 It is emphasized again that this current limitation is made possible by the first stage 13a of the overcurrent protection circuit, which compensates for the increased drain-source current V DS in response to an increasing load current before the current limit is actually triggered.

[0031] Both examples of Fig. 3 and Fig. 4, the same driver circuit 12 described above with reference to Fig. 1. However, depending on the actual application, many other well-known driver circuits can be used. The examples of Fig. 3 and Fig. 4 are essentially the same, the only difference being the first overcurrent protection stage 13a. Accordingly, Fig. 4 the transistor T1 (see Fig. 3) by a controllable current source Q3, which is configured to be controlled by the output of the amplifier AMP1. In another example, the amplifier AMP1 can operate as a comparator (or can be replaced by a comparator). In this case, the controllable current source Q3 can be configured to be activated and deactivated in accordance with the output signal of the comparator. That is, when the current detection signal V RS1 =R S1 · i S1 the (low) offset voltage V OS1reaches or exceeds, the comparator (or amplifier) activates the current source Q3 and thus causes a reduction in the gate voltage V G and a corresponding increase in the drain-source V DS .

[0032] Fig. Figure 5 shows another embodiment that does not provide current regulation, but rather an overcurrent shutdown. The example of Fig. 5 is the example in Fig. 4, with the only difference being that an RS flip-flop (also called an SR latch) is inserted between the output of amplifier AMP2 and the gate of transistor T2. In this example, the amplifier can also function as a comparator (or be replaced by one).

[0033] The RS flip-flop R S2 is set by the output of the amplifier AMP2 delivering a high level (S=1) when the current detection signal V RS2 =R S2 ·i S2 the second offset voltage VOS2 reaches or exceeds. Setting the RS flip-flop R S2 causes the flip-flop output Q, which is connected to the gate electrode of transistor T2, to output a high level (Q=1) and thus turn on transistor T2. As soon as transistor T2 is turned on, the gate electrode of the power transistor T L discharged via the drain-source current path of transistor T2, causing the power transistor T L is switched off.

[0034] The power transistor T L cannot be switched on again as long as the RS flip-flop R S2 is set because the activated transistor T2 is the gate electrode of the power transistor T L downwards towards the source potential. The RS flip-flop R S2However, it can be reset by a reset signal RES (RES=1), which can be generated by an external controller or any other external circuit and fed to the intelligent semiconductor switch, e.g., via a dedicated chip pin. Once the RS flip-flop R S2 is reset, the transistor T2 is deactivated (turned off) and the power transistor T L can be turned on again when a suitable input signal IN is applied to the gate driver circuit 12.

[0035] It is understood that the circuits and block diagrams shown in the figures discussed above are merely examples and that the functions described herein with reference to the figures may be implemented in various ways by a person skilled in the art using different circuit components. For example, as described above with reference to Fig. 4 or Fig. As explained in Figure 5, comparators can be implemented using high-gain operational amplifiers. However, other circuits can also be used to achieve essentially the same function.

[0036] Fig. Figure 6 is a diagram illustrating an overcurrent protection method according to the embodiments described herein. In particular, Fig. 6 exemplary timing diagrams of the load current i L and the gate voltage V G and drain-source voltage V DS of the power transistor. According to the embodiments described herein, the method includes controlling the power transistor T L into a conducting state (on state) by charging the gate electrode of the power transistor T L . The method further includes driving the gate electrode such that the voltage drop V DS across the load current path of the power transistor TL increases when the load current i L a first threshold i TH1 ≈ k×V OS1 / R S1 reached (or exceeded) (see Fig. 6, step S1, starting at time t1). Furthermore, the method includes driving the gate electrode such that the load current i L to a maximum value i LMAX is limited when the load current i L the second threshold i TH2 ≈ V OS2 / R S2 has been reached (see Fig. 6, step S2 starting at time t2). As already described above with reference to Fig. As discussed in section 5, the power transistor can also be switched off instead of current control.

[0037] In the example in Fig. 6 the load current i L- for whatever reason (e.g., due to a fault in the load) - to rise at time t0. Between times t0 and t1, the drain-source voltage V DS of the power transistor when the load current i L increases (V DS = i L ×R ON ). The gate voltage V G is at its nominal (maximum) value and the drain-source current path of the transistor T L has the ON resistance R ON At time t1, the load current reaches the first threshold i TH1 , which causes the first overcurrent protection stage to reduce the gate voltage V G and thus the drain-source voltage V DS This increases the voltage margin for the current sensing circuit and the offset voltage V OS2 in the second overcurrent protection stage, as explained in detail above. At time t2, the load current i L the second threshold i TH2and thus releases the current limitation to the maximum value i LMAX =i TH2 In the embodiments described here, the two stages 13a, 13b of the overcurrent protection circuit, in particular the amplifiers AMP1 and AMP2, as well as the voltage sources that generate the offset voltages V OS1 and V OS2 provide, using the electrical potential of the output node (source potential of the n-channel power MOS transistor T L ) as a reference / floating ground potential. The supply voltage V CP , which is generated by the charge pump (see Fig. 1) is generated and used to supply the components of the two stages 13a, 13b of the overcurrent protection circuit, uses the electrical potential of the output node as a floating ground.

[0038] Although the invention has been illustrated and described with respect to one or more implementations, changes and / or modifications may be made to the illustrated examples without departing from the spirit and scope of the appended claims. As noted above, the various functions performed by the components or structures (units, assemblies, devices, circuits, systems, etc.) described above; unless otherwise noted, the terms (including a reference to a "means") used to describe such components are intended to correspond to any component or structure that performs the stated function of the described component (e.g., that is functionally equivalent), even if it is not structurally equivalent to the disclosed structure that performs the function in the exemplary implementations of the invention illustrated herein.

Claims

[1] Circuit that has: a high-side power transistor (T L ) with a load current path which is connected between a supply node (VD) and an output node (OUT) and which is designed to supply a load current (i L ) to a load (R L ) to deliver; a gate driver circuit (12) connected to a control electrode of the power transistor (T L ) is coupled; a first stage (13a) of an overcurrent protection circuit (13) connected to the control electrode of the power transistor (T L ) and is designed to switch the control electrode on the detection that the load current (i L ) a first threshold value (i TH1 ≈ k×V OS1 / R S1 ) has been reached, in such a way that a voltage drop (V DS ) across the load current path of the power transistor (T L ) increases; a second stage (13b) of the overcurrent protection circuit (13) connected to the control electrode of the power transistor (T L ) and is designed to switch the control electrode on the detection that the load current (i L ) a second threshold (i TH2 ≈ k×V OS2 / R S2 ) has been reached, in such a way that the load current (i L ) to a maximum value (i LMAX ) is limited or that the power transistor (T L ) is switched off. [2] A circuit according to claim 1, wherein the first threshold value (i TH1 ≈ k×V OS1 / R S1 ) is lower than the second threshold (i TH2 ≈ k×V OS2 / R S2 ). [3] Circuit according to claim 1 or 2, wherein the first stage (13a) comprises a first current detection circuit (T S1 , R S1 ) which is designed to generate a first current detection signal (V RS1), which determines the load current (i L ) represents, and wherein the second stage (13b) comprises a second current detection circuit (T S2 , R S2 ) which is designed to generate a second current detection signal (V RS2 ), which determines the load current (i L ) represents. [4] A circuit according to claim 3, wherein the first stage further includes: an amplifier (AMP1) configured to detect a difference between the first current detection signal (V RS1 ) and a first reference voltage (V OS1 ) which exceeds the first threshold (i TH1 ≈ V OS1 / R S1 ) intended to reinforce; and a control element (T1, Q3) connected to the control electrode of the power transistor (T L ) and is adapted to derive current from the control electrode in response to an output signal of the amplifier (AMP1). [5] Circuit according to claim 4, wherein the control element (T1) is a transistor. [6] A circuit according to claim 4, wherein the control element (Q3) is a controllable current source. [7] A circuit according to claim 3, wherein the first stage further includes: a comparator (AMP1) configured to convert the first current detection signal (V RS1 ) and a first reference voltage (V OS1 ) which exceeds the first threshold (i TH1 ≈ k×V OS1 / R S1 ) determines to compare; and a control element (T1, Q3) connected to the control electrode of the power transistor (T L ) and is designed to derive current from the control electrode. [8] A circuit according to claim 7, wherein the control element (Q3) is a controllable current source. [9] A circuit according to any one of claims 3 to 8, wherein the increase in the voltage drop (V DS) across the load current path of the power transistor (T L ) to a change in the properties of the second current detection circuit (T S2 , R S2 ) leads. [10] A circuit according to any one of claims 3 to 8, wherein the increase in the voltage drop (V DS ) across the load current path of the power transistor (T L ) the activation of the second current detection circuit (T S2 , R S2 ) is caused. [11] Circuit according to one of claims 3 to 10, wherein the second stage (13b) further comprises: an amplifier (AMP2) configured to detect a difference between the second current detection signal (V RS2 ) and a second reference voltage (V OS2 ) which exceeds the second threshold (i TH2 ≈ V OS2 / R S2 ) intended to reinforce; and a control element (T2) connected to the control electrode of the power transistor (T L) and is adapted to derive current from the control electrode in response to an output signal of the amplifier (AMP2). [12] Circuit according to claim 11, wherein the control element (T2) is designed to control the voltage generated by the power transistor (T L ) flowing load current (i L ) to a desired maximum current (i LMAX ) by drawing current from the control electrode of the power transistor (T L ) is derived. [13] A circuit according to any one of claims 3 to 10, wherein the second stage (13b) further comprises: a comparator (AMP2) configured to convert the second current detection signal (V RS2 ) and a second reference voltage (V OS2 ) which exceeds the second threshold (i TH2 ≈ k×V OS2 / R S2 ) determines to compare; and a control element (T2) connected to the control electrode of the power transistor (T L) and is adapted to derive current from the control electrode in response to an output signal of the comparator (AMP2); and a latch (RS2) coupled between the output of the comparator (AMP2) and a control electrode of the control element. [14] Circuit according to one of claims 3 to 13, wherein the first current detection circuit (T S1 , R S1 ) a first sense transistor (T S1 ) and a first resistance (R S1 ) coupled in series and arranged between the supply node (VD) and the output node (OUT), wherein the first current detection signal (V RS1 ) the voltage across the first resistor (R S1 ), and wherein the second current detection circuit (T S2 , R S2 ) a second sense transistor (T S2 ) and a second resistor (R S2) coupled in series and arranged between the supply node (VD) and the output node (OUT), wherein the second current detection signal (V RS2 ) the voltage across the second resistor (R S2 ) is. [15] A circuit according to claim 14, wherein the first resistor (R S1 ) has a lower resistance than the second resistor (R S2 ). [16] Method comprising: Controlling a power transistor (T L ) into a conducting state by charging a control electrode of the power transistor (T L ), Controlling the control electrode in such a way that a voltage drop (V DS ) across a load current path of the power transistor (T L ) increases when the load current (i L ) a first threshold value (i TH1 ≈ k×V OS1 / R S1 ) reached; and Controlling the control electrode in such a way that the load current (i L) to a maximum value (i LMAX ) is limited, or switching off the power transistor (T L ) when the load current (i L ) a second threshold (i TH2 ≈ k×V OS2 / R S2 ) has been reached.

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