SEAMLESS OPERATING MODE SWITCHING IN DC / DC CONVERTERS

Abstract

Circuit that features: a converter stage designed to convert an input voltage (V IN ) according to a modulated control signal (S ON ) to convert into an output voltage (Vo); an error amplifier (EA) designed to amplify an error signal (V E ), which represents a difference between the output voltage (Vo) and a reference voltage; a first modulator (11b) configured to generate a first control signal (S PFM ) based on the error signal (V E ) and a reference signal (Vx), where the reference signal (Vx) depends on the input voltage (V IN ) and the output voltage (Vo) is controlled; a second modulator (11a) configured to generate a second control signal (S PWM ) based on the error signal (V E to generate; where the reference signal (Vx) is controlled such that for the current input voltage (V IN ) and the current output voltage (Vo) a duty cycle of the first control signal (S PFM ), which is provided by the first modulator (11b), approximately with a duty cycle of the second control signal (S PWM ), which is provided by the second modulator (11a); a logic circuit designed to receive the control signal (S ON ) based on the first control signal (S PFM ) or the second control signal (S PWM to provide.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the field of switching converters such as DC / DC buck converters or the like. BACKGROUND

[0002] Switching converters can typically operate in different operating modes, depending on one or more parameters such as the input voltage, the output voltage, and the output current (i.e., the load). The different operating modes are distinguished by the switching scheme, which determines the switching operation of the electronic switches that control the current flow through an inductance (choke) of the switching converter. Publications US 2020 / 0 228 009 A1 and DE 10 2011 077 174 B4 also deal with switching converters.

[0003] The switching operation of the electronic switches is determined by a logic signal (switching signal) that triggers the activation / deactivation of the electronic switches. The logic signal, which can only assume a logic high or a logic low level, can be modulated using various modulation schemes to regulate, for example, the output voltage or the output current. Common modulation schemes are pulse width modulation (PWM) and pulse frequency modulation (PFM). When using PWM, the duty cycle of the switching signal is set by adjusting the on-time (i.e., the pulse width) of the switching signal in each switching cycle, while the switching frequency remains constant. When using PFM, the switching frequency is set by adjusting the time spacing of the pulses (i.e., the frequency) of the switching signal, while the pulse width (i.e., the on-time in one switching cycle) remains constant.

[0004] Both modulation schemes can be combined in a switching converter. Accordingly, a switching controller that generates the switching signal(s) can operate in different modes, e.g., PWM mode or PFM mode. In some applications, different PFM or PWM modes can be implemented, such as continuous conduction mode (PWM-CCM) and discontinuous conduction mode (PWM-DCM).

[0005] For a given operating point (e.g., for a specific combination of input voltage, output voltage, output current), the achievable power conversion efficiency may vary for different operating modes. Furthermore, some operating modes may not be suitable for a certain range of operating points. To optimize efficiency, multi-mode switching converters designed to operate in two or more different operating modes have been developed. The operating point of the switching converter is monitored (e.g., by a controller), and when a mode change condition is reached, the operating mode is changed.

[0006] Stability issues can occur in some operating modes. Furthermore, a sudden change in operating mode can lead to unwanted overshoots and undershoots in the switching converter's output voltage. The inventor's goal is to improve the control of switching converters with multiple operating modes to achieve a smooth mode transition and reduce these overshoots and undershoots. OVERVIEW

[0007] The above-mentioned object is achieved by the circuit of claim 1 and the method of claim 9. Various embodiments and further developments are covered by the dependent claims.

[0008] Accordingly, one embodiment relates to a circuit comprising a converter stage configured to convert an input voltage into an output voltage according to a modulated drive signal, an error amplifier configured to generate an error signal representing a difference between the output voltage and a reference voltage, a first and a second modulator, and a logic circuit. The first modulator is configured to generate a first control signal based on the error signal and a reference signal, wherein the reference signal is controlled as a function of the input voltage and the output voltage. The second modulator is configured to generate a second control signal based on the error signal. The logic circuit is configured to provide the drive signal based on the first control signal or the second control signal.Furthermore, the reference signal (Vx) is controlled so that for the current input voltage (V. IN ) and the current output voltage (Vo) is a duty cycle of the first control signal (S PFM ) provided by the first modulator (11b), approximately with a duty cycle of the second control signal (S PWM ) provided by the second modulator (11a).

[0009] A further embodiment relates to a method for a switching converter. The method includes converting - by a converter stage - an input voltage into an output voltage according to a modulated drive signal, wherein an error signal representing a difference between the output voltage and a reference voltage is generated. A first modulator generates a first control signal based on the error signal and a reference signal, and a second modulator generates a second control signal based on the error signal, wherein the modulated drive signal is supplied to the converter stage based either on the first control signal or on the second control signal. The method further includes controlling the reference signal for the first modulator as a function of the input voltage and the output voltage. Furthermore, in a first operating mode, the first control signal (S PFM) of the converter stage as a modulated control signal (S ON ) and in a second operating mode the second control signal (S PWM ) of the converter stage as a modulated control signal (S ON ), wherein the reference signal (Vx) for the first modulator (11b) is controlled such that a duty cycle of the first control signal (S PFM ) provided by the first modulator (11b), approximately with a duty cycle of the second control signal (S PWM ) provided by the second modulator (11a). BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The invention will be better understood with reference to the following drawings and descriptions. The components in the figures are not necessarily to scale; instead, emphasis is placed upon illustrating the principles of the invention. Like reference numerals designate corresponding parts throughout the figures. Regarding the drawings: Fig. Figure 1 is a circuit diagram illustrating a general example of a buck converter that controls both the output voltage and the inductor current (current mode control). Fig. Figure 2 is a circuit diagram illustrating an example of a switching controller for PWM operation. Fig. Figure 3 is a circuit diagram illustrating an example of a switching controller for PFM operation. Fig. Figure 4 is a circuit diagram illustrating one embodiment of a switching controller for PFM operation with current feedback. Fig. Figure 5 is a diagram showing PFM and PWM mode operation characteristics of a multi-mode switching converter; the characteristic curves show the error voltage versus duty cycle. Fig. Figure 6 is a diagram illustrating how the characteristic curve associated with PFM operation can be shifted so that it approximately intersects the other characteristic curve at the current operating point. Fig. Figure 7 shows a circuit that generates the reference signal for the PFM modulator based on the output voltage and the input voltage. Fig. 8 shows an alternative to the circuit of Fig. 7. DETAILED DESCRIPTION

[0011] Fig. Figure 1 is a circuit illustrating a general example of a buck converter. However, it should be understood that the concepts described here can be readily applied to other switching converter topologies, such as flyback converters, buck-boost converters, boost converters, Cuk converter topologies, etc.

[0012] In the present example, the buck converter includes a switching circuit connected between an input circuit node N IN and a reference node GND (e.g. ground node). Between the input circuit node N IN and the reference node GND is an input voltage V IN which are normally connected to a reference potential V GND (e.g. ground potential). In this example, the switching circuit is a transistor half-bridge consisting of a high-side transistor T HS and a low-side transistor T LS The two transistors T LSand T HS are at an output circuit node N B the switching circuit in series. In the present examples, the two transistors T LS and T HS as MOS transistors (MOSFETs). However, any other type of transistor can be used instead. In some examples, instead of the low-side transistor T LS a diode can be used.

[0013] The switching converter also contains an inductance Lo, which is connected between the output circuit node N Bthe switching circuit (e.g., the transistor half-bridge) and an output circuit node No (referred to as output for short) of the switching converter, at which the output voltage Vo is provided. According to the present example, an output capacitor Co is connected between the output No of the switching converter and the reference node GND to buffer the output voltage Vo. In general, the switching circuit is designed to supply the input voltage V IN and the reference voltage V GND alternately to the LC circuit consisting of the inductance Lo and the capacitor Co.

[0014] The switching operation of the switching circuit can be determined by one or more switching signals generated by the switching controller 10. In the present example of Fig. 1 is the switching signal applied to the high-side transistor T HS is supplied as S ONwhile the switching signal supplied to the low-side transistor is referred to as S ON It is noted that the signal S ON basically an inverse version of the signal S ON (apart from a small dead time, if applicable). In other implementations, a single switching signal S ON be sufficient, for example, because the switching circuit contains only one active electronic switch or alternatively a circuit for distributing the switching signal S ON to two or more electronic switches. It should be noted that in some specific operating modes, both transistors of the half-bridge can be temporarily turned off simultaneously to avoid discharging the output capacitor Co.

[0015] Pulse width modulation (PWM) is well known in the field of switching converters, and therefore the generation of the switching signal is only briefly summarized here. In general, the switching signal S ON one with f SW constant frequency, while the on-time T ON of the switching signal S ON =S PWM is set in each switching cycle. The ratio T ON / T SW between the on-time T ON and the switching period T SW =f SW -1 is commonly referred to as duty cycle D. In other words, the duty cycle of the switching signal is updated in each switching cycle to regulate the output voltage, while the switching period T SW is essentially constant. The switching frequency f SW can be controlled by a clock signal S CLK, which can be generated by an oscillator OSC. The oscillator OSC can be implemented using any known oscillator circuit, such as a relaxation oscillator circuit or the like. For a buck converter operating in PWM-CCM mode and in an idealized case without losses, etc., the duty cycle D is equal to V O / V IN .

[0016] Another modulation technique commonly used in switching converters is pulse frequency modulation (PFM). When PFM is used, the on-time T ON of the switching signal S ON essentially constant and the switching frequency f SW is adjusted by the switching controller to maintain the output voltage Vo at or near a desired setpoint.

[0017] To regulate the output voltage Vo, the switching controller requires some information about the output voltage. Therefore, the switching converter may include a voltage sensing circuit VS configured to directly or indirectly sense the output voltage Vo and generate a corresponding voltage sensing signal V VS , which is indicative of the actual output voltage Vo (voltage feedback). According to one specific example, the voltage sensing circuit can be implemented as a simple voltage divider. However, in other examples, more complex voltage sensing circuits can also be used.

[0018] In some implementations, the switching controller 10 may use a so-called current mode control, which employs additional current feedback. Accordingly, the switching controller may include a current sensing circuit CS configured to sense the inductor current iL directly or indirectly and a corresponding current detection signal Vcs, which is based on the actual inductance current i L In a simple example, the current sensing circuit may include a current sensing resistor. In other examples, more complex current sensing circuits, such as so-called sense FET arrangements, may be used to sense the current. In other implementations, the switching controller 10 may use a so-called voltage mode control, which does not require current feedback.

[0019] Fig. Figure 2 shows an exemplary implementation of the switching controller 10, showing only the components used for current mode control during PWM operation and relevant to the following explanation. As shown in Fig. As shown in Figure 2, the current mode control uses two feedback loops, i.e., a current feedback and a voltage feedback. In principle, a first (inner) control loop regulates the inductor current i L . The (peak) current setpoint (see Fig. 2, error signal V E ) for current control is determined by a second (outer) control loop and adjusted so that the output voltage V O is stabilized to a desired voltage setpoint.

[0020] In the example of Fig. 2, the switching controller 10 contains an RS flip-flop FF1, which generates the clock signal S CLK at the set input S. Accordingly, the switching signal S provided at the output Q of the RS flip-flop FF1 PWM regularly and synchronously with the clock signal S CLK set to a high level. The RS flip-flop FF1 receives a reset signal S OFFat the reset input R, where the reset signal S OFF (by applying a high level to the reset input R) the time at which the inductance current i L the current setpoint is reached. The inductance current i L is determined by the current detection signal Vcs and the current setpoint by the level of the error signal V E represents.

[0021] The switching controller 10 contains a comparator K1 which is designed to compare the current detection signal Vcs with the error signal V E In the present example, this comparison is implemented in such a way that the comparator K1 actually calculates the difference V E - compares Vcs with the reference potential (e.g. 0 volts). Each time the current detection signal Vcs exceeds the current level of the error signal V E reached (and thus the difference V E - Vcs becomes zero), the comparator K1 signals the RS flip-flop FF1 to output the switching signal SPWM to a low level. In this example, the difference V E - Vcs obtained from subtraction block 13.

[0022] The RS flip-flop FF1 in combination with the comparator K1 can be used as a PWM modulator 11a, which essentially modulates the duty cycle of the switching signal S PWM Accordingly, the RS flip-flop is set in each switching cycle, while the reset (and thus the duty cycle) is triggered by the comparator K1. It is understood that Fig. 2 is only an illustrative example and many possibilities for implementing the function of the generic circuit of Fig. 2 are known as such.

[0023] The mentioned error signal V E (ie the current setpoint for the inner control loop) is applied to an output of the error amplifier EA, which is designed to detect the control error V VS - V REFto strengthen, provided, with V VS is a voltage detection signal representing the output voltage Vo, and V REF a reference voltage representing the voltage setpoint for the outer control loop. Optionally, an integrator and / or a loop filter can be coupled between the error amplifier EA and the comparator K1. The logic circuit 12 is designed to generate the switching signal S PWM to the electronic switches. In the present example, the logic circuit 12 can distribute the switching signal S PWM to the control electrode of transistor T HS and the inverted signal S PWM to the control electrode of transistor T LS However, other embodiments may also use more complex logic circuits.

[0024] To summarize the above, the switching controller 10 in the PWM-CCM uses two feedback loops, the first feedback loop being formed by the current detection circuit CS and the comparator K1, and the second feedback loop being formed by the voltage detection circuit VS and the error amplifier EA. The first feedback loop is part of a control loop used to control the inductor current i L is used, while the second feedback loop is part of a control loop used to control the output voltage Vo. Other implementations do not require current feedback and have only a voltage feedback loop.

[0025] As mentioned above, PWM-CCM may not be suitable in some situations. For example, if the switching converter is only loaded with a very light load (low output current) or if the ratio V IN / VO is high, a mode change to PFM-DCM or PFM-CCM (or other modes such as burst mode) may be necessary to maintain output voltage regulation. Since multi-mode switching controllers are known as such, mode change conditions are not discussed in detail here.

[0026] An example of a switching controller operating in a PFM mode (e.g. PFM-DCM mode or PFM-CCM mode) is shown in Fig. 3, where, to keep the illustration simple, only the components relevant to the following explanations are shown. Accordingly, only the parts of the switching controller 10 used for PFM control are shown. It is understood that both the circuit components used for PWM operation and the circuit components used for PFM operation, as well as additional circuits for triggering operating mode changes or the like, can be included in the switching controller 10.

[0027] According to Fig. 3 are the converter stage (transistor half-bridge, the inductance L O and the output capacitor Co), the voltage detection circuit VS and the error amplifier EA are the same as in the example of Fig. 2. However, the configuration of the switching controller differs from the previous example. Accordingly, the output signal V Eof the error amplifier EA (error signal) is fed to the (inverting) integrator INT, and the integrated error signal is fed through a comparator K2 with a threshold value V X (reference voltage). The output of the comparator K2 is connected to a monoflop MF1, which is designed to generate a pulse with a defined (and constant) pulse length T ON,min to generate, coupled.

[0028] In response to the comparator K2 detecting that the integrated error signal exceeds the threshold value V supplied to the comparator K2, the integrated error signal is X A pulse is generated. The pulse length (on-time T ON,min ) of the pulses in the switching signal, whereby the switching frequency f SW (Pulse repetition frequency) corresponding to the measured error signal V E As with the previous example of Fig. 2 the switching signal S PFM the logic circuit 12, which is connected to the high-side transistor T HSand the low-side transistor T LS the half-bridge corresponding control signals. It is noted that the integrator INT and the comparator K2 in combination with the monoflop MF1, which supplies the reset signal RES INT for the integrator INT, as a kind of voltage controlled oscillator or PFC modulator circuit 11b in Fig. 3. The higher the input voltage V E is, the steeper the slope of the integrator output voltage V I and therefore the higher the pulse repetition frequency (switching frequency f SW ) of the pulses at the output of the monoflop MF1 (signal S PFM ). In each switching cycle, the integration time begins at the end of the on-time T ON,min new.

[0029] As in Fig. As can be seen in Figure 3, only one feedback circuit is used during conventional PFM operation; the current detection circuit CS may or may not be used in PFM modes. Fig. The control structure shown in Figure 3 generates in principle a pulse of the switching signal S each time PFM , if the integrated error signal V E a certain threshold V X achieved. It is noted that various alternative implementations of the PFM modulator 11b may be used to provide essentially the same function.

[0030] Fig. Figure 4 shows an example of how a PWM modulator and a PFM modulator can be combined to implement a multi-mode switching converter. Again, the drawing shows only those components relevant to the further discussion. In particular, the circuit responsible for monitoring mode change conditions and triggering a mode change has been omitted.

[0031] Fig. 4 contains, on the left side, the output capacitor Co of the switching converter and the voltage detection circuit VS, which in this example is a simple voltage divider (consisting of resistors R1 and R2). The error amplifier EA receives the voltage detection signal V VS and the reference voltage V REF , which represents the target value for the output voltage. An impedance Z COMPis, depending on the specific implementation, coupled to the output of the error amplifier EA. The error signal V supplied by the error amplifier EA Eis routed via switch SW1 either to the PWM modulator 11a or the PFM modulator 11b. Depending on the operating mode, the electronic switch SW1 connects the output of the error amplifier EA to either the input of the PWM modulator 11a or the PFM modulator 11b in accordance with a selection signal SEL, which may be provided, for example, by a mode changeover circuit or other suitable control circuit, which may be included, for example, in an external controller device. Similarly, the output of either the PWM modulator 11a or the PFM modulator 11b is connected to the input of the logic circuit 12 via another electronic switch SW2, which may also be controlled by the selection signal SEL. As mentioned, the logic circuit provides the control signals for the transistors T LS and T HS based on the operating mode-dependent switching signal S PWM or S PFMNote that the electronic switch SW2 may be omitted depending on the actual implementation of the overall circuit. Its function may also be provided by the logic circuit 12. The function of the additional electronic switch SW2 may also be included in the logic circuit 12, depending on the actual implementation. The selection signal SEL can be considered a mode selection or mode change signal.

[0032] The diagram of Fig. Figure 5 illustrates a problem that can result from a sudden change in operating mode, e.g., from PWM-CCM mode to PFM mode or vice versa. The diagram shows characteristic curves for PWM and PFM operation, indicating how—in steady-state—the output voltage V E of the error amplifier from the ratio T ON / T SW(On-time over cycle time), which is equal to the duty cycle. The two characteristic curves are straight lines (characterized by offset and slope), with the dashed line representing the characteristic curve for PWM-CCM mode and the solid line representing PFM mode.

[0033] For the further discussion, it is assumed that the switching converter operates in PWM mode and in steady state has a certain duty cycle, which is Fig. 5 is referred to as “Case 3”. In PFM mode, for the same ratio T ON / T SW the steady-state fault voltage V E lower than in PWM mode. As a result, the error voltage V EImmediately after a mode change to PFM mode, the voltage is too high for the current operating point (output voltage), and as a result, the transient response of the switching controller causes a significant overshoot at the output of the switching converter. Conversely, after a mode change from PFM to PWM mode, an undershoot is generated. The opposite effect can be observed when the switching converter operates in PWM mode and has a certain steady-state duty cycle, which is Fig. 5 is referred to as “Case 2.” Then switching to PFM would cause an undershoot. Only for a specific ratio T ON / T SW , indicated as "Case 1," the error voltages are equal because the two characteristic curves intersect. In this situation, a mode change would not cause any overshoots or undershoots in the output voltage Vo.

[0034] The embodiments described here are designed to avoid or at least reduce the mentioned overshoots and undershoots in response to a change in operating mode. Accordingly, the embodiments described here are designed to shift the characteristic curve for the PFM operating mode such that the two characteristics change in the ratio T ON / T SW Accordingly, the ratio T ON / T SW (duty cycle) in steady state during a mode change (e.g., from PWM to PFM or vice versa), and therefore transients such as undershoots and overshoots are avoided. A shift in the characteristic curve can be avoided by tuning the reference voltage Vx generated by the PFM modulator (see Fig. 3). Another theoretical option would be to tilt the characteristic curve for PFM mode. However, this is generally not possible due to other limitations imposed by the circuit design.

[0035] It can be shown that in PWM mode the output voltage V E of the error amplifier EA is a function of the input voltage V IN and the output voltage Vo. In particular, it is a function of the ratio V O / V IN . This function can be linearized so that it has the following form VE=(α⋅VO−β⋅VIN)+VE0,PWM where α and β are constant parameters that depend on the circuit design, and V E0,PWM the offset of the characteristic curve (ie V E0,PWM = V E (0) in PWM mode, see Fig. 5). Furthermore, the circuit can be designed so that the offsets V E0,PWM and VE0,PFM are equal (V E0,PWM = V E0,PFM = V E0 ). The additional shift of the characteristic curve is in Fig. 6. The difference (in volts) by which the curve is shifted is shown as V Tune This shift leads to a situation similar to that in Fig. 5. Accordingly, the steady-state duty cycle value is approximately the same for PWM and PFM modes. In other words, the reference signal V X for the PFM modulator 11b is controlled so that the resulting duty cycle of the modulated signal S PFM , which is provided by the PFM modulator 11b, approximately with the duty cycle of the modulated signal S PWMprovided by the PWM modulator 11a. As a result, transients are avoided or at least reduced in amplitude when switching from one operating mode to another (e.g., from PWM to PFM and vice versa).

[0036] An exemplary approach for how the shift of the characteristic curve can be implemented is shown in Fig. 7. To keep the illustration simple, Fig. 7 only the PFM modulator 11b and the circuit used to generate the reference voltage V X for the PFM modulator 11b. The Fig. The concept shown in Figure 7 can also be applied to the switching converter with multiple operating modes Fig. 4 apply.

[0037] To set the reference voltage V XTo generate this voltage, a first controllable current source Q1 and a second controllable current source Q2 are connected to a circuit node Nx. The current source Q1 is configured to draw a current i1 from the circuit node Nx, while the current source Q2 supplies a current i2 to the circuit node Nx. The current i1 depends on the input voltage V IN and the current i2 depends on the output voltage Vo. The transconductances of the current sources depend on the parameters α and β mentioned above. The differential current i2 - i1 is applied via a resistor R X and the offset voltage source Q3, which provides the offset voltage V E0 The resistance R X and the voltage source Q3 are connected in series between the node Nx and the reference potential (ground). The voltage drop V Tune above the resistance R X is equal to R X i2 - R X i1 = αV O - βV IN. As a result, the total reference voltage Vx supplied to the PFM modulator 11b is V Tune + V E0 . Essentially, the reference signal V X a weighted sum of input and output voltages plus an offset. For example, the offset can be V E0 be adjusted so that the characteristic curves are approximately at T ON / T SW =0 cut (cf. Fig. 6).

[0038] It is understood that the circuit of Fig. 7 is merely an example. A similar function can be implemented in various ways. Another example is shown in Fig. 8. Accordingly, three voltage sources are connected in series to generate the voltage V X as the sum of the voltages V E0 , V Tune1 and V Tune2 A first controllable voltage source supplies the voltage V Tune1 as a function of the input voltage V IN (V Tune1 = βV IN), a second controllable voltage source supplies the voltage V Tune2 as a function of the output voltage V O (V Tune2 = αV IN ), while a third voltage source provides the constant offset voltage V E0 as in the previous example. The three voltages add up to V Tune2 -V Tune1 +V E0 (see Fig. 8). V Tune1 has a negative sign because the first voltage source has reversed polarity.

[0039] Various embodiments described herein are summarized below. It should be understood that the following is not an exhaustive list, but rather an exemplary overview. A first embodiment relates to a circuit for a switching converter with multiple operating modes. The circuit includes a converter stage configured to convert an input voltage into an output voltage according to a modulated drive signal, and an error amplifier configured to generate an error signal representing a difference between the output voltage and a reference voltage. The circuit further includes a first modulator (e.g., the PFM modulator 11b) configured to generate a first control signal based on the error signal and a reference signal (see Fig. 4, Reference signal V X), whereby the reference signal is controlled depending on the input voltage and the output voltage (see Fig. 7 and Fig. 8), and a second modulator (e.g., the PWM modulator 11a) configured to generate a second control signal based on the error signal. Furthermore, the circuit includes a logic circuit configured to provide the drive signal based on either the first control signal or the second control signal.

[0040] In one embodiment, the error amplifier is configured to generate a first signal (see Fig. 4, Voltage detection signal V VS ), which represents the output voltage, and a second signal, which represents a reference voltage (see Fig. 4, Reference voltage V REF), wherein the error signal represents the difference between the first signal and the second signal. The first modulator may be a pulse frequency modulator, and therefore the first control signal has a pulse frequency that depends on the error signal and the reference signal. The second modulator may be a pulse width modulator, and therefore the second control signal has a specific frequency and a duty cycle that depends on the error signal.

[0041] In one embodiment, the logic circuit is configured to output either the first control signal or the second control signal as a modulated control signal for the switching stage. In one embodiment, a switching circuit may be coupled to an output of the error amplifier and configured to route the error signal—depending on a selection signal—either to the first modulator or the second modulator (see Fig. 4, first switch SW1). A further switching circuit can be coupled to the outputs of the first and second modulators and configured to supply either the first control signal or the second control signal as a modulated control signal to the switching stage, depending on the selection signal. The function of the further switching circuit can also be implemented by the logic circuit.

[0042] A further embodiment relates to a method for a switching converter. Accordingly, the method includes converting—by a converter stage—an input voltage into an output voltage corresponding to a modulated drive signal. For this purpose, an error signal representing a difference between the output voltage and a reference voltage is generated, wherein a first modulator generates a first control signal based on the error signal and a reference signal (see Fig. 4, Reference signal V X) and a second modulator generates a second control signal based on the error signal. The modulated control signal is supplied to the converter stage based on the first control signal or the second control signal. The method includes controlling the reference signal for the first modulator as a function of the input voltage and the output voltage.

Claims

[1] Circuit that has: a converter stage configured to convert an input voltage (V IN ) according to a modulated control signal (S ON ) into an output voltage (Vo); an error amplifier (EA) which is designed to generate an error signal (V E ) representing a difference between the output voltage (Vo) and a reference voltage; a first modulator (11b) which is designed to generate a first control signal (S PFM ) based on the error signal (V E ) and a reference signal (Vx), wherein the reference signal (Vx) is dependent on the input voltage (V IN ) and the output voltage (Vo); a second modulator (11a) which is designed to generate a second control signal (S PWM ) based on the error signal (V E ) to generate; wherein the reference signal (Vx) is controlled so that for the current input voltage (V IN ) and the current output voltage (Vo) is a duty cycle of the first control signal (S PFM ) provided by the first modulator (11b), approximately with a duty cycle of the second control signal (S PWM ) provided by the second modulator (11a); a logic circuit which is designed to receive the control signal (S ON ) based on the first control signal (S PFM ) or the second control signal (S PWM ). [2] Circuit according to claim 1, wherein the error amplifier (EA) is designed to generate a first signal (V VS ), which represents the output voltage (Vo), and a second signal (V REF ), which represents the reference voltage, and where the error signal (V E) the difference between the first signal (V VS ) and the second signal (V REF ) represents. [3] Circuit according to claim 1 or 2, wherein the first modulator (11) is a pulse frequency modulator and the first control signal (S PFM ) a pulse frequency which is determined by the error signal (V E ) and the reference signal (Vx). [4] Circuit according to one of claims 1 to 3, wherein the second modulator (11b) is a pulse width modulator and the second control signal (S PWM ) a specific frequency (f SW ) and a duty cycle which is determined by the error signal (V E ) depends. [5] Circuit according to one of claims 1 to 4, wherein the logic circuit is designed to generate the first control signal (S PFM ) or the second control signal (S PWM ) as a modulated control signal for the switching stage. [6] A circuit according to any one of claims 1 to 5, further comprising: a switching circuit (SW1) coupled to an output of the error amplifier (EA) and configured to output the error signal (V E ) in dependence on a selection signal (SEL) either to the first modulator (11b) or to the second modulator (11a). [7] A circuit according to any one of claims 1 to 5, further comprising: a further switching circuit (SW2) which is coupled to the outputs of the first and second modulators (11b, 11a) and is designed to output either the first control signal (S PFM ) or the second control signal (S PWM ) as a modulated control signal (S ON ) to the switching stage. [8] A circuit according to claim 6 or 7, wherein the selection signal (SEL) is provided by an external controller device. [9] Method comprising: Converting an input voltage (V IN ) by a converter stage into an output voltage (Vo) corresponding to a modulated control signal (S ON ), where an error signal (V E ), which detects a difference between the output voltage (Vo) and a reference voltage (V REF ) represents, is generated, wherein a first modulator (11b) generates a first control signal (S PFM ) based on the error signal (V E ) and a reference signal (Vx) and a second modulator (11a) generates a second control signal (S PWM ) based on the error signal (V E ) and the method further comprising: Controlling the reference signal (Vx) for the first modulator (11b) as a function of the input voltage (V IN ) and the output voltage (V O ); wherein in a first operating mode the first control signal (SPFM ) of the converter stage as a modulated control signal (S ON ) and in a second operating mode the second control signal (S PWM ) of the converter stage as a modulated control signal (S ON ) and wherein the reference signal (Vx) for the first modulator (11b) is controlled such that a duty cycle of the first control signal (S PFM ) provided by the first modulator (11b), approximately with a duty cycle of the second control signal (S PWM ) provided by the second modulator (11a). [10] The method of claim 9, further comprising: Conducting the error signal (V E ) in dependence on a selection signal either to the first modulator (11b) or the second modulator (11a).

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