Power module for an inverter to minimize parasitic inductivities and vehicle with such a power module

Abstract

Power module (400) for an inverter (204), which includes: a high-side bus (406) containing a first switch (SW1) wherein a high-side current is configured to flow through the first switch (SW1) in a first direction; a low-side bus (410) containing a second switch (SW2), wherein the low-side bus (410) is parallel to the high-side bus (406) and a low-side current is configured to flow through the second switch (SW2) in the first direction; and an alternating current output bus (AC output bus) (414) which is parallel to the high-side bus (406) and the low-side bus (410), wherein an output current flows through the AC output bus (410) in a second direction which is opposite to the first direction; characterized by the fact that either the high-side bus (406) and the low-side bus (410) are coplanar to each other in a first level and the AC output bus (414) is in a second level; or the high-side bus (406) is in a first level (502), the low-side bus (410) is in a second level (504) which is parallel to the first level (502), and the AC output bus (414) is in a third level (506), wherein either (i) the second level (504) is between the first level (502) and the third level (506) or (ii) the first level (502) is between the second level (504) and the third level (506).

Description

INTRODUCTION

[0001] The present invention relates to electrical inverters for converting direct current to alternating current and in particular to a power module according to the preamble of claim 1, which reduces the occurrence of parasitic inductances in the inverter.

[0002] A generic power module is essentially derived from US 6 021 060 A.

[0003] An inverter circuit has an inherent power loop in which a high current flows from a high-voltage side to a low-voltage side and back. This power loop generates magnetic fields that produce parasitic inductance for each current path traversing it. Accordingly, it is desirable to design an inverter to reduce the occurrence of parasitic inductance. SUMMARY

[0004] According to the invention, a power module for an inverter is presented, which is characterized by the features of claim 1.

[0005] In addition to one or more of the features described here, the power module also includes a first heat sink coupled to the first level and a second heat sink coupled to the second level.

[0006] In addition to one or more of the features described here, a first magnetic field is generated by the high-side current, a second magnetic field is generated by the low-side current, and a third magnetic field is generated by the AC output current, with the first magnetic field, the second magnetic field, and the third magnetic field canceling each other out to minimize or reduce the occurrence of parasitic inductances in a commutation loop.

[0007] In addition to one or more of the features described here, the first switch and the second switch in a first level are coplanar to each other, and a third switch and a fourth switch in a second level, which is parallel to the first level, are coplanar to each other, with the AC output bus between the first level and the second level.

[0008] In addition to one or more of the features described herein, the power module further comprises a first level, a second level and a third level, each parallel to the others, wherein the AC output bus includes a first AC output bus located between the first level and the second level and a second AC output bus located between the second level and the third level.

[0009] In addition to one or more of the features described here, the first AC output bus connects to switches in the first level and in the second level at one end of the power module, and the second AC output bus connects to switches in the second level and in the third level at the end of the power module.

[0010] In addition to one or more of the features described here, the second AC output bus connects to switches in the second level and in the third level at a first end of the power module, and the first AC output bus connects to switches in the first level and in the second level at a second end of the power module.

[0011] In addition to one or more of the features described here, the inverter is a T-type inverter, an H-type inverter, and an X-type inverter.

[0012] Furthermore, according to the invention, a vehicle is presented which is characterized by the features of claim 4 or of claim 7.

[0013] In addition to one or more of the features described herein, the vehicle further includes a first heat sink coupled to the first level and a second heat sink coupled to the second level.

[0014] In addition to one or more of the features described here, a first magnetic field of the high-side current, a second magnetic field of the low-side current, and a third magnetic field generated by the AC output current cancel each other out to minimize or reduce the occurrence of parasitic inductances in a commutation loop.

[0015] In addition to one or more of the features described here, the first switch and the second switch in the first level of switches are coplanar to each other, and a third switch and a fourth switch in a second level of switches, which is parallel to the first level of switches, are coplanar to each other, with the AC output bus being between the first level of switches and the second level of switches.

[0016] In addition to one or more of the features described here, the first AC output bus connects to switches in the first level of switches and the second level of switches at one end of the power module, and the second AC output bus connects to switches in the second level of switches and the third level of switches at the other end of the power module.

[0017] In addition to one or more of the features described here, the second AC output bus connects to switches in the second level of switches and the third level of switches at a first end of the power module, and the first AC output bus connects to switches in the first level of switches and the second level of switches at a second end of the power module.

[0018] In addition to one or more of the features described here, the inverter is a T-type inverter, an H-type inverter, and an X-type inverter.

[0019] The features and advantages described above, and further features and advantages of the invention, will become apparent from the following detailed description when taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Further features, advantages and details appear only as examples in the following detailed description, which refers to the drawings; they show: Fig. 1 a vehicle according to an exemplary embodiment; Fig. 2 an electrical system of the vehicle in one embodiment; Fig. 3 a schematic diagram of one branch of the inverter of Fig. 2; Fig. 4 a power module that corresponds to the branch of the schematic diagram of Fig. 3 corresponds to; Fig. 5A-5C possible stacking arrangements for the power module in various embodiments; Fig. 6 another stack arrangement for the power module; Fig. 7 a schematic diagram of a branch of a T-type inverter; Fig. 8 a bus stack corresponding to the T-type branch shown in the schematic diagram; Fig. 9 a bus stack for the branch of the T-type inverter in a further embodiment; Fig. 10A a power module comprising a T-type inverter in an alternative embodiment; Fig. 10B a power module comprising a T-type inverter in an alternative embodiment; Fig. 11 a schematic diagram of a branch of the H-type inverter in an embodiment; Fig. 12 a bus stack for the branch of the H-type from Fig. 11 in one embodiment; Fig. 13 a perspective view of the bus stack in a first embodiment; Fig. 14 a perspective view of the bus stack in a second embodiment; Fig. 15 a perspective view of the bus stack in a third embodiment; Fig. 16 a perspective view of the bus stack in a fourth embodiment; Fig. 17 a side view of a power module having a two-sided cooling system for an H-type inverter; and Fig. 18 a side view of a power module having a two-sided cooling system for an X-type inverter. DETAILED DESCRIPTION

[0021] The following description is merely exemplary. It should be understood that throughout the drawings, corresponding reference symbols indicate similar or corresponding sections and features.

[0022] According to an exemplary embodiment, Fig. 1. A vehicle 10 comprising a vehicle body 12 which at least partially defines a passenger compartment 14. The vehicle body 12 also carries various vehicle subsystems, including a propulsion system 16 and further subsystems to support functions of the propulsion system 16, and other vehicle components such as a brake subsystem, a suspension system, a steering subsystem, and others.

[0023] The vehicle 10 can be an electric vehicle (EV), a hybrid vehicle, or another type of vehicle. In one embodiment, the vehicle 10 is an electric vehicle that includes multiple motors and / or drive systems. It can include any number of drive units, such as one or more drive units for applying torque to front wheels (not shown) and / or rear wheels (not shown). The drive units are controllable to operate the vehicle 10 in various operating modes, such as a normal mode, a high-performance mode (in which additional torque is applied), all-wheel drive (AWD), front-wheel drive (FWD), rear-wheel drive (RWD), and others.

[0024] For example, the propulsion system 16 is a multi-drive system that includes a front drive unit 20 for driving the front wheels and rear drive units for driving the rear wheels. The front drive unit 20 includes a front electric motor 22 and a front inverter 24 (e.g., a front power inverter module or FPIM), as well as other components such as a cooling system. A left rear drive unit 30L includes an electric motor 32L and an inverter 34L. A right rear drive unit 30R includes an electric motor 32R and an inverter 34R. The inverters 24, 34L, and 34R (e.g., power inverter units or PIMs) each convert direct current (DC) power from a high-voltage battery system (HV battery system) 40 to multi-phase alternating current (AC) power (e.g., two-phase AC power, three-phase AC power, six-phase AC power, etc.).) (multi-phase AC power) to power the front electric motor 22 and the rear electric motors 32L and 32R.

[0025] As in Fig. As shown in Figure 1, the drive systems feature separate electric motors. However, embodiments are not limited to this. For example, instead of separate motors, multiple drives can be provided by a single machine that has several sets of windings that are physically independent.

[0026] As in Fig. As also shown in Figure 1, the drive systems are configured such that the front electric motor 22 drives the front wheels (not shown) and the rear electric motors 32L and 32R drive the rear wheels (not shown). However, embodiments are not limited in this way, as any number of drive systems and / or motors can be located at different points (e.g., one motor driving each wheel, partner motors per axle, etc.). Furthermore, embodiments are not limited to a dual drive system, as embodiments can be used with a vehicle that has any number of motors and / or power inverters.

[0027] In the propulsion system 16, the front drive unit 20, the left rear drive unit 30L, and a right rear drive unit 30R are electrically connected to the battery system 40. The battery system 40 can also be electrically connected to other electrical components (also referred to as "electrical loads") such as vehicle electronics (e.g., via an auxiliary power module or APM 42), heating devices, cooling systems, and other components. The battery system 40 can be configured as a rechargeable energy storage system (RESS).

[0028] In one embodiment, the battery system 40 comprises several separate battery assemblies, each of which can be charged independently and used to supply power to a drive system or drive systems independently. For example, the battery system 40 comprises a first battery assembly, such as a first battery subpack 44, which is connected to the front inverter 24, and a second battery subpack 46. The first battery subpack 44 comprises several battery modules 48, and the second battery subpack 46 comprises several battery modules 50. Each battery module 48, 50 contains a number of individual cells (not shown). In various embodiments, one or more of the battery packs may include a MODACS battery (a battery with multiple outputs and dynamically adjustable capacity).

[0029] Each of the front electric motor 22 and the rear electric motors 32L and 32R is a three-phase motor having three-phase motor windings. However, the embodiments described here are not limited in this way. For example, the motors can be any multi-phase machines supplied by multi-phase inverters, and the drive units can be realized using a single machine having independent sets of windings.

[0030] The battery system 40 and / or the propulsion system 16 includes a switching system comprising various switching devices for controlling the operation of the battery packs 44 and 46 and for selectively connecting the battery packs 44 and 46 to the front-drive unit 20, the left rear-drive unit 30L, and the right rear-drive unit 30R. The switching devices can also be used to selectively connect the first battery subpack 44 and the second battery subpack 46 to a charging system. The charging system can be used to charge the first battery subpack 44 and the second battery subpack 46 and / or to supply power from the first battery subpack 44 and / or the second battery subpack 46 to charge another energy storage system (e.g., vehicle-to-vehicle (V2V) and / or vehicle-to-everything (V2X) charging). The charging system includes one or more charging modules.For example, a first on-board charging module (OBCM) 52 is electrically connected to a charging port 54 for charging to and from an AC system or AC device, such as a mains AC power supply. A second OBCM 53 may be included for DC charging (e.g., DC fast charging or DCFC).

[0031] In one embodiment, the switching system comprises a first switching device 60 that selectively connects the first battery pack 44 to the inverters 24, 34L, and 34R, and a second switching device 62 that selectively connects the second battery pack 46 to the inverters 24, 34L, and 34R. The switching system also comprises a third switching device 64 (also referred to as a "battery switching device") for selectively connecting the first battery pack 44 in series with the second battery pack 46.

[0032] Any number of different controllers can be used to control functions of the battery system 40, the switching system, and the drive units. A controller contains any suitable processing device or unit and can utilize an existing controller, such as a drive system controller, a RESS controller, and / or controllers within the drive system. For example, a controller 65 can be used to control switching and drive control operations, as discussed here.

[0033] The Controller 65 may include a processing circuit arrangement that may contain an application-specific integrated circuit (ASIC), an electronic circuit, a processor (shared, dedicated, or a group) with memory executing one or more software or firmware programs, a combinational logic circuit, and / or other suitable components that provide the described functionality. The Controller 65 may include a non-transient, computer-readable medium that stores instructions which, when processed by one or more processors of the Controller 65, implement a method for heating a battery pack according to one or more embodiments detailed herein.

[0034] Fig. Figure 2 shows an electrical system 200 of the vehicle 10 in one embodiment. The electrical system 200 includes a battery 202 or a DC power source, an inverter 204 for converting the DC power to and from AC power, and a motor 206 that operates using the AC power. The motor 206 is generally a three-phase motor. The inverter 204 includes at least three branches 208a, 208b, 208c of switches. Each switch contains switches that control the conversion of DC power to AC power along the branch. In one embodiment, the switches include a transistor having a diode extending from the source to the drain of the transistor. The transistor can be controlled by a gate voltage to control the flow of current through the transistor.The transistor can be an insulated gate bipolar transistor (IGBT), a metal oxide semiconductor field-effect transistor (MOSFET), or any other suitable transistor.

[0035] Fig. Figure 3 shows a schematic diagram 300 of a branch 301 (such as branch 208a) of the inverter 204 of Fig. 2. Branch 301 contains a high side 302 and a low side 304. The high side 302 contains a high-voltage bus 306, coupled to a positive DC voltage, and a first switch 308 (SW1) between the high-voltage bus and node A. The low side 304 contains a low-voltage bus 310, coupled to a negative DC voltage, and a second switch 312 (SW2) between the low-voltage bus and node A. An AC output bus 314 supplies an output current from node A.

[0036] Fig. Figure 4 shows a power module 400, which corresponds to branch 301 of the schematic diagram 300 of Fig. 3 corresponds to the power module 400, which extends from a first end 402 to a second end 404. The power module 400 includes a high-side bus 406, corresponding to the high-voltage bus 306, which contains a first switching device 408, corresponding to the first switch 308 (SW1). The power module 400 includes a low-side bus 410, corresponding to the low-voltage bus 310, which contains a second switching device 412, corresponding to the second switch 312 (SW2). The first switching device 408 and the second switching device 412 are each in the form of a plane or flat chip. An AC output bus 414, corresponding to the AC output bus 314, is located between the first switching device 408 and the second switching device 412. The AC output bus 414 is in the form of a flat plate.

[0037] The first switching device 408, the second switching device 412, and the AC output bus 414 are aligned between the first end 402 and the second end 404. The first switching device 408 and the second switching device 412 connect to their respective voltage sources at the first end 402. At the second end 404, the first switching device 408, the second switching device 412, and the AC output bus 414 connect to each other at the connector 415. The high-side current 416 flows through the first switching device 408 in a first direction (e.g., from the first end 402 to the second end 404), thereby generating a high-side magnetic field B. HS (a first magnetic field) is generated. The low-side current 418 flows through the second switching device 412 in the first direction, thereby generating a low-side magnetic field B. LS(a second magnetic field) is generated. The AC output current 420 flows through the AC output bus 414 in a second direction, opposite to the first direction, thereby generating an AC output magnetic field B. AC (a third magnetic field). As a result of the arrangement, the power module 400, the high-sided magnetic field B, is extinguished. HS and the lower magnetic field B LS the alternating current output magnetic field B ACat the location of the AC output bus 414. This cancellation minimizes or reduces the occurrence of parasitic inductances in a commutation loop containing the high-side current (e.g., a current through the high-side bus 406 and the first switching device 408), the low-side current (e.g., a current through the low-side bus 210 and the second switching device 412), and the AC output current (e.g., a current through the connector 415 and the AC output bus 414), thereby reducing ringing effects and electromagnetic interference.

[0038] Fig. 5A- Fig. Figure 5C shows possible stacking arrangements for the power module 400 in various embodiments. Fig. Figure 5A shows a first stacking arrangement 500 not according to the invention. The high side (HS) 302 (containing the high-voltage bus 306 and the first switch 308) is located in a first level 502. The low side (LS) 304 (containing the low-voltage bus 310 and the second switch 312) is located in a second level 504, which is separated from and parallel to the first level 502. The AC output bus 314 is located in a third level 506. The third level 506 is parallel to and between the first level 502 and the second level 504.

[0039] Fig. Figure 5B shows a second stacking arrangement 510. The first level 502 (high side), the second level 504 according to the invention (low side), and the third level 506 (the AC output bus) are parallel to each other. The second level 504 is arranged between the first level 502 and the third level 506.

[0040] Fig. Figure 5C shows a third stacking arrangement 520 according to the invention. The first level 502 (high side), the second level 504 (low side) and the third level 506 (the AC output bus) are parallel to each other. The first level 502 is arranged between the second level 504 and the third level 506.

[0041] Fig. Figure 6 shows a further stacking arrangement 600 according to the invention for the power module 400. The high side 302 (including the high-voltage bus 306 and the first switch 308) is located in a first planar chip 602. The low side 304 (including the low-voltage bus 310 and the second switch 312) is located in a second planar chip 604, which is coplanar with the first planar chip 602. The AC output bus 314 is arranged in a third planar chip 606, which is located on one side of the first planar chip 602 and the second planar chip 604 (i.e., above or below). The width W ACThe third plane chip 606 can be approximately equal to the sum of the widths W. HS of the first flat chip 602 and the width W LS of the second level chip 604 is selected.

[0042] Fig. Figure 7 shows a schematic diagram 700 of a T-type branch of an inverter. The T-type branch contains a positive voltage bus 702, which includes a first switch SW1, a negative voltage bus 704, which includes a second switch SW2, and a neutral bus 706, which includes a third switch SW3 and a fourth switch SW4. The neutral bus 706 is connected to a neutral voltage. The positive voltage bus 702, the negative voltage bus 704, the neutral bus 706, and an AC output path 708 are interconnected at node A.

[0043] Fig. Figure 8 shows a bus stack 800, corresponding to the T-type branch shown in schematic diagram 700. The bus stack 800 contains a high-side bus 802, a low-side bus 804, and a neutral bus 806. The high-side bus 802 corresponds to the positive voltage bus 702. The low-side bus 804 corresponds to the negative voltage bus 704. The neutral bus 806 corresponds to the neutral bus 706. A first AC output bus 808 and a second AC output bus 810 correspond to the AC output path 708.

[0044] The bus stack 800 runs from a first end 820 to a second end 822. At the first end 820, the high-side bus 802 connects to the DC+ voltage, the low-side bus 804 connects to the DC voltage, and the neutral bus 806 connects to a neutral voltage. At the second end 822, the connector 815 connects the second ends of the high-side bus 802, the low-side bus 804, the neutral bus 806, the first AC output bus 808, and the second AC output bus 810.

[0045] The high-side bus 802, the low-side bus 804, and the neutral bus 806 each form planar chips arranged parallel to each other. The first AC output bus 808 is located between the high-side bus 802 and the neutral bus 806. The second AC output bus 810 is located between the neutral bus 806 and the low-side bus 804. A high-side current 812 (flowing through the high-side bus 802), a low-side current 814 (flowing through the low-side bus 804), and a neutral current 816 (flowing through the neutral bus 806) flow from the first end 820 to the second end 822. The AC output current flows through one or more of the first AC output bus 808 and the second AC output bus 810 in a second direction (e.g., from the second end 822 to the first end 820), opposite to the first direction.

[0046] The high-side magnetic field generated by the high-side current 812 flowing through the high-side bus 802, the low-side magnetic field generated by the low-side current 814 flowing through the low-side bus 804, and the neutral bus magnetic field generated by the neutral current 816 flowing through the neutral bus 806 cancel each other out at the first AC output bus 808. Furthermore, the high-side magnetic field generated by the high-side current 812 flowing through the high-side bus 802, the low-side magnetic field generated by the low-side current 814 flowing through the low-side bus 804, and the neutral bus magnetic field generated by the neutral current 816 flowing through the neutral bus 806 cancel each other out at the second AC output bus 810.

[0047] Fig. Figure 9 shows a bus stack 900 for the T-type branch of the inverter in a further embodiment. The high-side bus 802 (and switch SW1) and the low-side bus 804 (and switch SW2) are located side by side in the same plane. The neutral bus 806 (and the third switch SW3 and the fourth SW4) is arranged on one side of the high-side bus 802 and the low-side bus 804. An AC output bus 902 is arranged between the neutral bus 806 (on one side) and the high-side bus 802 and the low-side bus 804 (on an opposite side). These buses are connected to each other at the connector 815, which is located at a second end 822 of the bus stack 900.

[0048] Fig. Figure 10A shows a power module 1000 comprising a T-type inverter in an alternative embodiment. The power module 1000 includes a P-chip 1002 containing the positive bus and the first switch SW1, an N-chip 1004 containing the negative bus and the second switch SW2, an O-chip 1006 containing the third switch SW3 and the fourth switch SW4 and connecting to the neutral point O, and the AC bus 1008. The P-chip 1002 and the N-chip 1004 are coplanar in a first plane 1010, which corresponds to the plane of Fig. The 10A is vertical. The O-Chip 1006 is located in a second layer 1012, which is parallel to the first layer 1010. The AC bus 1008 is located in a third layer 1014, which is arranged between and parallel to the first layer 1010 and the second layer 1012.

[0049] Fig. Figure 10B shows an alternative embodiment of a power module 1015 comprising a T-type inverter. The power module 1015 contains the P-chip 1002 in a first layer 1020, which is perpendicular to the plane of the side, and the N-chip 1004 in a second layer 1022, which is parallel to the first layer. Two O-chips 1006 and 1007 are located in a third layer 1024. The AC bus 1008 is located in a fourth layer 1026. The third layer 1024 and the fourth layer 1026 are arranged between the first layer 1020 and the second layer 1022 and are parallel to the first and second layers, respectively.

[0050] Fig. Figure 11 shows a schematic diagram 1100 of a branch of the H-type inverter 1101 in one embodiment. The H-type branch 1101 includes a first section 1102 above the power source and a second section 1104 above the power source. The first section 1102 includes a first high-side path 1106 and a first low-side path 1108, which are connected in series. The first high-side path 1106 includes a first switch SW1 and the first low-side path 1108 includes a second switch SW2. The second section 1104 includes a second high-side path 1110 and a second low-side path 1112, which are connected in series. The second high-side path 1110 includes a third switch SW3 and the second low-side path 1112 includes a fourth switch SW4.A bridge path 1114 connects to the first section 1102 between the first switch SW1 and the second switch SW2, and connects to the second section 1104 between the third switch SW3 and the fourth switch SW4. The bridge path 1114 includes a fifth switch SW5 and a sixth switch SW6. A first AC output 1116 connects to a first node A between the first switch SW1 and the second switch SW2. A second AC output 1118 connects to a second node B between the third switch SW3 and the fourth switch SW4.

[0051] Fig. Figure 12 shows a bus stack of 1200 for branch 1101 of the H-type of Fig. Figure 11 in one embodiment. The switches are arranged in three layers, which for the sake of simplicity are referred to here as a top layer 1202, a middle layer 1204, and a bottom layer 1206. The first switch SW1 and the second switch SW2 are arranged next to each other in the top layer 1202. The third switch SW3 and the fourth switch SW4 are arranged next to each other in the bottom layer 1206. The fifth switch SW5 and the sixth switch SW6 are arranged next to each other in the middle layer 1204. Viewed from the side, switches SW2, SW5, and SW3 are in the foreground, and switches SW1, SW6, and SW4 are in the background.

[0052] The first high-level bus 1208 connects to switch SW1. The first low-level bus 1210 connects to switch SW2. The second high-level bus 1212 connects to switch SW3. The second low-level bus 1214 connects to switch SW4. A first AC output bus 1216 runs between the top layer 1202 and the middle layer 1204 and connects to switches SW1, SW2, and SW5 at a first connector 1226. A second AC output bus 1218 runs between the middle layer 1204 and the bottom layer 1206 and connects switches SW3, SW4, and SW6 at the second connector 1228. A jumper bar 1230 connects switches SW5 and SW6.

[0053] Fig. Figure 13 shows a perspective view 1300 of the bus stack 1200 in a first embodiment. The perspective view shows the connections between the switches. The first AC output bus 1216 extends from the first connector 1226 and runs between the top layer 1202 and the middle layer 1204. Thus, the magnetic fields due to currents flowing in the top layer 1202, the middle layer 1204 (switches SW1, SW2, and SW5), and the first AC output bus 1216 cancel each other out at the first AC output bus 1216. The second AC output bus 1218 extends from the second connector 1228 and runs between the middle layer 1204 and the bottom layer 1206. Thus, the magnetic fields due to currents flowing in the middle layer 1204, the bottom layer 1206 (switches SW3, SW4 and SW6) and the second AC output bus 1218 cancel each other out at the second AC output bus 1218.

[0054] Fig. Figure 14 shows a perspective view 1400 of the bus stack 1200 in a second embodiment. The switches are arranged in two layers, which, for the sake of simplicity, are referred to here as a top layer 1402 and a bottom layer 1404. The first switch SW1, the second switch SW2, the third switch SW3, and the fourth switch SW4 are arranged side by side in the top layer 1402. The switch SW5 is arranged in the bottom layer 1404 below the first switch SW1 and the second switch SW2. The switch SW6 is arranged in the bottom layer 1404 next to the fifth switch SW5 and below the third switch SW3 and the fourth switch SW4.

[0055] A first connector 1406 (corresponding to node A) connects switches SW1, SW2, and SW5 at the second end. A first AC output bus 1408 extends from the first connector 1406 and runs between the top layer 1402 and the bottom layer 1404. The magnetic fields due to currents flowing in the top layer 1402, the bottom layer 1404 (switches SW1, SW2, and SW5), and the first AC output bus 1408 cancel each other out at the first AC output bus 1408 to minimize or reduce the total parasitic inductance.

[0056] A second connector 1410 (corresponding to node B) connects switches SW3, SW4, and SW6 at the second end. A second AC output bus 1412 extends from the second connector 1410 and runs between the top layer 1402 and the bottom layer 1404. The magnetic fields due to currents flowing in the top layer 1402, the bottom layer 1404 (switches SW3, SW4, and SW6), and the second AC output bus 1412 cancel each other out at the second AC output bus 1412 to minimize or reduce the total parasitic inductance.

[0057] Fig. Figure 15 shows a perspective view 1500 of the bus stack 1200 in a third embodiment. The switches are arranged in three layers: a top layer 1502 (containing switches SW1 and SW2), a middle layer 1504 (containing a bidirectional switch SW5), and a bottom layer 1506 (containing switches SW3 and SW4). The layers extend from a first end 1508 to a second end 1510. A first connector 1512 (corresponding to node A) connects switches SW1, SW2, and SW5 at the second end 1510. A first AC output bus 1514 extends from the first connector 1512 and runs between the top layer 1502 and the middle layer 1504 to the first end 1508.The magnetic fields due to currents flowing in the top layer 1202, the middle layer 1204 (switches SW1, SW2 and SW5) and the first AC output bus 1514 cancel each other out at the first AC output bus 1514 in order to minimize or reduce the total parasitic inductance.

[0058] A second connector 1516 connects switches SW3, SW4, and SW5 at the first end 1508. A second AC output bus 1518 extends from the second connector 1516 and runs between the middle layer 1204 and the bottom layer 1206 to the second end 1510. The magnetic fields due to currents flowing in the middle layer 1504, the bottom layer 1506 (switches SW3, SW4, and SW5), and the second AC output bus 1518 cancel each other out at the second AC output bus 1518 to minimize or reduce the total parasitic inductance.

[0059] Fig. Figure 16 shows a perspective view 1600 of the bus stack 1200 in a fourth embodiment. The first connector 1512 connects switches SW1, SW2, and SW5 at the second end, and the first AC output bus 1514 extends from the first connector 1512 in a direction away from the switches. Similarly, the second connector 1516 connects switches SW3, SW4, and SW6 at the second end, and the second AC output bus 1518 extends from the second connector 1516 in a direction away from the switches.

[0060] Fig. Figure 17 shows a side view 1700 of a power module having a two-sided cooling system for an H-type inverter 1710, which includes switches SW1-SW6. The side view 1700 shows a switch section 1702 containing switches SW1, SW2, and SW5 on a first side and switches SW3, SW4, and SW6 on a second side, opposite switches SW1, SW2, and SW5, respectively. A first heat sink 1704 is coupled to the first side, and a second heat sink 1706 is coupled to the second side.

[0061] Fig.Figure 18 shows a side view 1800 of a power module having a two-sided cooling system for an X-type inverter 1810, which includes switches SW1-SW8 and diodes D1 and D2. The side view 1800 shows a switch section 1802 containing switches SW5, SW6, SW7, and SW8 on a first side and switches SW1, SW2, SW3, and SW4 on a second side. Switches SW1 and SW8 are opposite each other. Switches SW2 and SW7 are opposite each other. Switches SW3 and SW6 are opposite each other. Switches SW4 and SW5 are opposite each other. Diode D1 is located on the first side and D2 is located on the second side. A first heat sink 1804 is coupled to the first side and a second heat sink 1806 is coupled to the second side.

Claims

[1] Power module (400) for an inverter (204) comprising: a high-side bus (406) containing a first switch (SW1) wherein a high-side current is configured to flow through the first switch (SW1) in a first direction; a low-side bus (410) containing a second switch (SW2), wherein the low-side bus (410) is parallel to the high-side bus (406) and a low-side current is configured to flow through the second switch (SW2) in the first direction; and an alternating current output bus (AC output bus) (414) which is parallel to the high-side bus (406) and the low-side bus (410), wherein an output current flows through the AC output bus (410) in a second direction which is opposite to the first direction; characterized by , that either the high-side bus (406) and the low-side bus (410) are coplanar to each other in a first level and the AC output bus (414) is in a second level; or the high-side bus (406) is in a first level (502), the low-side bus (410) is in a second level (504) which is parallel to the first level (502), and the AC output bus (414) is in a third level (506), wherein either (i) the second level (504) is between the first level (502) and the third level (506) or (ii) the first level (502) is between the second level (504) and the third level (506). [2] Power module (400) according to claim 1, wherein a first magnetic field generated by the high-side current, a second magnetic field generated by the low-side current and a third magnetic field generated by the AC output current cancel each other out in order to minimize or reduce the occurrence of parasitic inductances in a commutation loop. [3] Power module (400) according to claim 1, wherein the first switch (SW1) and the second switch (SW2) are coplanar to each other in a first plane and a third switch (SW3) and a fourth switch (SW4) are coplanar to each other in a second plane which is parallel to the first plane, wherein the AC output bus (902) is between the first plane and the second plane. [4] Vehicle (10) with an inverter (204) comprising a power module (400) according to claim 1. [5] Vehicle (10) according to claim 4, wherein a first magnetic field of the high-side current, a second magnetic field of the low-side current and a third magnetic field generated by the AC output current cancel each other out in order to minimize or reduce the occurrence of parasitic inductances in a commutation loop. [6] Vehicle (10) according to claim 4, wherein the first switch (SW1) and the second switch (SW2) are coplanar to each other in a first level of switches and a third switch (SW3) and a fourth switch (SW4) are coplanar to each other in a second level of switches which is parallel to the first level of switches, wherein the AC output bus (902) is between the first level of switches and the second level of switches. [7] Vehicle (10) comprising: an inverter (204) comprising a power module, the power module comprising the following: a first high-side bus (1208) containing a first switch (SW1) wherein a high-side current is configured to flow through the first switch (SW1) in a first direction; a first low-side bus (1210) containing a second switch (SW2), wherein the low-side bus (1210) is parallel to the high-side bus (1208) and a low-side current is configured to flow through the second switch (SW2) in the first direction; and an AC output bus that is parallel to the high-side bus (1208) and the low-side bus (1210), wherein an output current flows through the AC output bus in a second direction opposite to the first direction; characterized by , that the vehicle (10) further comprises a top layer (1202) of switches, a middle layer (1204) of switches and a bottom layer (1206) of switches, each parallel to the others, wherein the AC output bus includes a first AC output bus (1216) arranged between the top layer (1202) of switches and the middle layer (1204) of switches and a second AC output bus (1218) arranged between the middle layer (1204) of switches and the bottom layer (1206) of switches.

Images