Method for producing an isolating diffused power semiconductor component and power semiconductor component

Abstract

A method for producing a power semiconductor component in a wafer assembly is presented, comprising the following production steps: providing a semiconductor body with a basic doping and with a front and a back side, wherein the semiconductor body has a two-dimensional matrix of directly adjacent component regions; locally arranging a first diffusion source, which in a central edge region between two component regions has a first plurality of rows of first diffusion source elements, which are jointly assigned to both component regions; diffusion from this first diffusion source to form a separation diffusion region. Furthermore, a correspondingly produced power semiconductor component is presented.

Description

[0001] The invention describes a method for producing a power semiconductor component, in particular a thyristor in a wafer composite with an isolation diffusion region. The invention further describes a power semiconductor component produced using this method.

[0002] DE10 2016 124 669 B3 discloses a thyristor with a semiconductor body having a first semiconductor body main side, a second semiconductor body main side and a semiconductor body edge surrounding the semiconductor body and connecting the first and second semiconductor body main sides, wherein the semiconductor body has a first semiconductor zone, wherein the first semiconductor zone extends in a semiconductor body edge region as far as the second semiconductor body main side, and a second outer surface of the first semiconductor zone forms the semiconductor body edge, and a third outer surface of the first semiconductor zone adjacent to the semiconductor body edge forms a first surface region of the second semiconductor body main side, wherein the semiconductor body has a second semiconductor zone arranged on the first semiconductor zone and not extending as far as the semiconductor body edge,wherein the semiconductor body has a third semiconductor zone arranged on the second semiconductor zone and a fourth semiconductor zone arranged in the third semiconductor zone, wherein the semiconductor body has a recess extending from a first surface of the second semiconductor body main side, running parallel to the semiconductor body edge and extending into the second semiconductor zone.

[0003] In view of the prior art, the invention is based on the object of presenting a method for producing a power semiconductor component and a power semiconductor component which has an improved source for the isolation diffusion region.

[0004] This object is achieved according to the invention by a method for producing a power semiconductor component, in particular a diode or a thyristor, in a wafer assembly with the following production steps: a) providing a semiconductor body with a basic doping and with a front and a back side, wherein the semiconductor body has a two-dimensional matrix of immediately adjacent component regions; b) Local arrangement of a first diffusion source having, in a central edge region between two component regions, a first plurality of rows of first diffusion source elements which are jointly assigned to both component regions; c) diffusion from this first diffusion source to form a separation diffusion region; d) Further steps to complete the formation of the power semiconductor component.

[0005] The described method can of course also be applied in an analogous manner from the front and the back and preferably simultaneously, if possible.

[0006] Here and in the following, a central edge region is understood to be that portion of the overall edge region of a component area that extends evenly in both directions from the center of this overall edge region to the end of the overall edge region. The central edge region is therefore always a true sub-region of the overall edge region.

[0007] It may be preferred if a second plurality of rows of second diffusion source elements are arranged in one, preferably all, corner regions of one, preferably each, component region which connects two central edge regions to one another.

[0008] It may in principle be advantageous if the length of the central edge region 104 is a maximum of 75%, preferably a maximum of 90% and particularly preferably a maximum of 95% of the total length of an entire edge region.

[0009] It is also fundamentally advantageous if the first, the second or both diffusion source elements are arranged offset from one another in the respective rows.

[0010] It may be advantageous if the first diffusion source elements each have a base area that is hexagonal or round.

[0011] It may also be advantageous if the second diffusion source elements each have a base area that is hexagonal or round.

[0012] It is particularly advantageous if the ratio of the minimum distance between two adjacent diffusion source elements to the radius or edge length of the diffusion source elements is 1:2 to 0.5:1, preferably 1.2:1 to 0.8:1.

[0013] Furthermore, it is advantageous if the radius or the edge length of the diffusion source elements is 5µm to 50µm, preferably 10µm to 25µm and the thickness of the diffusion source elements is preferably between 0.5µm and 5µm and particularly preferably between 1µm and 2µm.

[0014] In addition, it may be advantageous if, before step d), a planar application, preferably of an identical second diffusion source 340, 440, is carried out on the front and rear sides 3, 4 and subsequent diffusion from these diffusion sources takes place to form a diffusion region 342, 442 on the front and rear sides 3, 4, wherein a front-side and a rear-side pn junction is formed.

[0015] In principle, it is preferred if, after step d), a trench region is created in a step e) in the section of the separation diffusion region, extending from the front side into the separation diffusion region. It is further preferred if the trench region is formed as a single, preferably two-stage, stepped trench. Furthermore, it may be advantageous if, after step e), a passivation, preferably a polyimide passivation, is introduced into the trench region. This passivation preferably only partially closes the trench region, but extends as far as the planar section of the front side.

[0016] It may also be advantageous in principle if the diffusion source elements are produced from a flat metal layer, preferably an aluminum layer, by structuring, preferably etching, this metal layer.

[0017] The object is further achieved by a power semiconductor component produced according to the method mentioned, wherein the ratio of the depth of the front-side pn junction to the depth of the rear-side pn junction is between 1.5:1 and 5:1, preferably between 2:1 and 3:1.

[0018] It is also advantageous if the ratio of the depth of the trench region to the depth of the front-side pn junction is between 1.1:1 and 2:1, preferably between 1.2:1 and 1.4:1.

[0019] Of course, unless this is explicitly or per se excluded or contradicts the idea of the invention, the features mentioned in the singular can also be present multiple times in the method according to the invention or the power semiconductor component according to the invention or can be implemented in the manufacturing process.

[0020] It is understood that the various embodiments of the invention, regardless of whether they are mentioned in connection with the method or with the power semiconductor component, can be implemented individually or in any combination to achieve improvements. In particular, the features mentioned and explained above and below can be used not only in the specified combinations, but also in other combinations or on their own, without departing from the scope of the present invention.

[0021] Further explanations of the invention, advantageous details and features emerge from the following description of the Fig. 1 to 8 schematically illustrated embodiments of the invention or of respective parts thereof. Fig. 1 to 7 show different stages in the process according to the invention. Fig. 8 shows a power semiconductor component according to the invention.

[0022] Fig. 1 to 7 show various stages in the process of the invention in a non-scale representation and in section through or in plan view of the wafer composite.

[0023] Fig. 1 shows a cross-sectional view of a section of a power semiconductor component according to the invention, here a thyristor, in a wafer assembly after manufacturing step b). A semiconductor body 2 with a basic doping, here a weak n-doping, and with a front side 3 and a back side 4 was provided. This semiconductor body has a two-dimensional matrix of directly adjacent component regions 10, see FIG. Fig. 3. A first diffusion source was arranged locally in a central edge region 104 between two component regions 10.

[0024] This first diffusion source, for a p-doping, in the central edge region 104 has a first plurality of rows 410, 420 of first diffusion source elements 430, which are jointly assigned to both component regions 10, see also Fig. 3 and Fig. 5 and in particular Fig. 4 and is symmetrical to a separation line 6. This separation line also lies on the entire edge region 100 of the individual component regions 10. As is customary in the art, the wafer assembly of the power semiconductor components is divided into the individual power semiconductor components by sawing along this separation line, cf. Fig. 8 and Fig. 9.

[0025] Fig. 2 shows the design of the power semiconductor component according to the invention according to Fig. 1 after the manufacturing step c). During this step, an isolation diffusion region 412 was formed from this first diffusion source by its diffusion into the semiconductor body 2, which isolation diffusion region extends from the rear side to near the front side.

[0026] Fig. Figure 3 shows a plan view of a plurality of component regions 10 of a power semiconductor component according to the invention. Also shown is the position of the central edge regions relative to the respective overall edge region of one side of a component region. Two central edge regions arranged orthogonally to one another are connected to each other by a respective corner region 102.

[0027] Three rows of first diffusion source elements 430 are arranged in the central edge regions 104 of two adjacent component regions 10, with the central row lying on a singulation line and thus being assigned to both component regions 10. The length of the central edge region 104 here is approximately 85% of the total length of the entire edge region 100.

[0028] In the respective corner regions 102 of the component regions 10, two rows of second diffusion source elements are arranged.

[0029] Fig. 4 shows a section of three rows 410, 420 of first diffusion source elements 430, wherein the middle row is arranged on a separation line 6. Advantageously, the rows of second diffusion source elements 430, those in the corner regions 102, cf. Fig. 5 identically designed.

[0030] The respective diffusion source elements 430 are arranged offset from one another in the respective rows by half the distance within a row and have a hexagonal base area. Thus, the edge distance, which here is equal to the minimum distance between adjacent diffusion source elements 430, can be designed the same for all diffusion source elements 430. This is particularly useful for the diffusion process of manufacturing step c). In this manufacturing step, the aluminum of the diffusion source elements 430 melts and, due to the base, does not form a flat aluminum layer in individual diffusion source elements 430, which leads to a more uniform formation of the separation diffusion region 412. The diffusion process is better controllable and more precise than the prior art.In this embodiment, the minimum distance 432 between two adjacent diffusion source elements 430 is 12µm, the edge length 434 of the respective diffusion source elements is 20µm and their thickness is 1.6µm.

[0031] The respective diffusion source elements 430 were manufactured and formed from a flat metal layer, here an aluminum layer, by structuring processes, here by etching, of this metal layer.

[0032] Fig. 5 shows a plan view of a plurality of component regions 10 of a further power semiconductor component according to the invention, similar to that in Fig. 3. In contrast to this, here in all corner areas 102 of all component areas 10, the same number of rows as in the middle edge areas 104 are provided, namely purely as an example, three rows.

[0033] Fig. Figure 6 shows an embodiment of a power semiconductor component according to the invention, here a thyristor, in a wafer assembly before or during manufacturing step d). Shown here are second aluminum layers 340, 440, which are formed over the entire surface and are thinner than the first and which were applied simultaneously to the front and rear sides 3, 4, respectively.

[0034] Fig. 7 shows the power semiconductor component in a wafer composite, wherein an aluminum diffusion region 342, 442 was created on the front side 3 and on the back side 3, 4 by a diffusion process of the second aluminum layers 340, 440. The aluminum diffusion region 342 on the front side 3 extends, but not necessarily, into the separation diffusion region 412. At the respective boundaries of the aluminum diffusion regions 342, 442 with the semiconductor body 2, these form a front-side and back-side pn junction, respectively.

[0035] Fig. Figure 8 shows the power semiconductor component in the wafer assembly after further manufacturing steps d). In this case, a trench region 5 is created in the section of the separation diffusion region 412, symmetrically around its center, i.e., around the dicing line 6, from the front side 3. As is customary in the art, the wafer assembly of the power semiconductor components is divided into the individual power semiconductor components 1 by sawing along this dicing line 6, see Figure 1. Fig. 9. The trench region 5 necessarily extends into the isolation diffusion region 412. Furthermore, in this embodiment, the trench region 5 is formed deeper than the aluminum diffusion region 342 on the front side 3.

[0036] Trench region 5 is also designed as a two-stage, stepped trench, which is also common in the industry. After creating trench region 5, a passivation layer 50, in this case a polyimide passivation layer, was applied to this trench region 5. This passivation extends laterally to the respective flat section of front side 3 and otherwise does not completely seal it.

[0037] Fig. 9 shows a power semiconductor component according to the invention, after the separation of the wafer composite, cf. Fig. 8. This results in a power semiconductor component whose ratio of the depth 324 of the front pn junction to the depth 424 of the rear pn junction is 2:1. Specifically, the depth 324 of the front pn junction is 90µm, while that of the rear pn junction is only 45µm.

[0038] In addition, the ratio of the depth 504 of the trench region 5 to the depth of the front-side pn junction is 3:4, since the depth of the trench region 5, of course without the passivation, is 120µm. QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] DE 10 2016 124 669 B3

[0002]

Claims

[1] Method for producing a power semiconductor component (1), in particular a diode or a thyristor, in a wafer assembly, comprising the following production steps: a) providing a semiconductor body (2) with a basic doping and with a front side (3) and a back side (4), wherein the semiconductor body has a two-dimensional matrix of immediately adjacent component regions (10); b) Local arrangement of a first diffusion source having, in a central edge region (104) between two component regions (10), a first plurality of rows (410, 420) of first diffusion source elements (430) which are jointly assigned to both component regions (10); c) diffusion from this first diffusion source to form a separation diffusion region (412); d) Further steps to complete the formation of the power semiconductor component. [2] The method of claim 1, wherein a second plurality of rows of second diffusion source elements (430) are arranged in a corner region (102) of a component region (10) connecting two central edge regions (104) to one another. [3] Method according to one of the preceding claims, wherein the second plurality of rows of second diffusion source elements (430) are arranged in each of the corner regions (102) of each of the component regions (10). [4] Method according to one of the preceding claims, wherein the length of the central edge region (104) is a maximum of 75%, preferably a maximum of 90% and particularly preferably a maximum of 95% of the total length of an entire edge region (100). [5] Method according to one of the preceding claims, wherein the first, the second or both diffusion source elements (430) are arranged offset from one another in the respective rows. [6] Method according to one of the preceding claims, wherein the first diffusion source elements (430) each have a base area which is hexagonal or round. [7] Method according to one of the preceding claims, wherein the second diffusion source elements each have a base area which is hexagonal or round. [8] Method according to one of the preceding claims, wherein the ratio of the minimum distance (432) between two adjacent diffusion source elements (430) to the radius or edge length (434) of the diffusion source elements is 1:2 to 0.5:1, preferably 1.2:1 to 0.8:

1. [9] Method according to one of the preceding claims, wherein the radius or the edge length (434) of the diffusion source elements (430) is 5µm to 50µm, preferably 10µm to 25µm and the thickness of the diffusion source elements (430) is preferably between 0.5µm and 5µm and particularly preferably between 1µm and 2µm. [10] Method according to one of the preceding claims, wherein before step d) a planar application, preferably in each case of an identical, second diffusion source (340,440) on the front and back sides (3,4) and subsequent diffusion from these diffusion sources takes place to form a diffusion region (342,442) on the front and back sides (3,4), wherein a front-side and a back-side pn junction is formed. [11] Method according to one of the preceding claims, wherein after step d), in a step e), in the section of the separation diffusion region (412) from the front side (3), a trench region (5) is produced which extends into the separation diffusion region (412). [12] Method according to claim 11, wherein the trench region (5) is formed as a, preferably two-stage, stepped trench. [13] Method according to claim 11 or 12, wherein after step e) a passivation (50), preferably a polyimide passivation, is introduced into the trench region (5), which preferably only partially closes the trench region (5), but reaches up to the planar section of the front side (3). [14] Method according to one of the preceding claims, wherein the diffusion source elements (430) are produced from a flat metal layer, preferably an aluminum layer, by structuring, preferably etching, this metal layer. [15] Power semiconductor component manufactured according to one of claims 10 to 14, wherein the ratio of the depth (324) of the front-side pn junction to the depth (424) of the rear-side pn junction is between 1.5:1 and 5:1, preferably between 2:1 and 3:

1. [16] Power semiconductor component according to claim 15, wherein the ratio of the depth (504) of the trench region (5) to the depth of the front-side pn junction is between 1.1:1 and 2:1, preferably between 1.2:1 and 1.4:1.

Images