SILICON WAFER AND METHOD FOR ITS MANUFACTURING

Abstract

The objective of this disclosure is to provide a silicon wafer suitable for IGBT applications, exhibiting high resistivity and low resistivity variations, and capable of suppressing the occurrence of sliding dislocations, as well as a manufacturing process for this wafer. A silicon wafer is provided in which a region of high nitrogen concentration with a maximum nitrogen concentration of 2 × 10⁻⁶ is present in a nitrogen concentration profile in one thickness direction of the silicon wafer. 15 atoms / cm² 3 or higher and 1×10 16 atoms / cm² 3 or lower in a range from the top surface to 20 µm in the thickness direction of the back side of the silicon wafer, the nitrogen concentration in a range from the top surface to 20 µm, in the thickness direction of the front side of the silicon wafer 1×10 14 atoms / cm² 3 or higher and 1×10 15 atoms / cm² 3or lower, and the oxygen concentration (ASTM F121, 1979) of the silicon wafer 1×10 17 atoms / cm² 3 or lower.

Description

TECHNICAL AREA

[0001] This disclosure relates to a silicon wafer and a manufacturing process for it. BACKGROUND

[0002] In recent years, thyristors, bipolar transistors, MOSFETs (metal-oxide-semiconductor field-effect transistors), and insulated-gate bipolar transistors (IGBTs), among others, have been actively developed as switching devices for power applications. IGBTs are devices that combine the high-speed characteristics of MOSFETs with the low saturation voltage characteristics of bipolar transistors and are attracting considerable attention in applications requiring high capacitance, high breakdown voltage, and high switching speed, such as power supplies for motors in hybrid and electric vehicles.

[0003] IGBTs are gate-controlled switching devices (also called "vertical IGBTs") that have a gate electrode and an emitter electrode on the front side of the silicon wafer and a collector electrode on the back side. The switching current flows through the entire silicon wafer between the emitter on the front and the collector on the back. Therefore, it is important that the silicon wafer is free of crystal defects from front to back, as the presence of crystal defects within the silicon wafer degrades the device's performance.

[0004] It is also important that the specific resistance of silicon wafers is high and uniformly distributed across the entire wafer. If the oxygen concentration in the silicon wafer is high, oxygen atoms become oxygen donors, and the specific resistance of the silicon wafer fluctuates. Therefore, it is also important that the silicon wafers have a low oxygen concentration.

[0005] In view of this, it was proposed, as described in patent document 1, to obtain silicon wafers with uniform resistivity by irradiating silicon blocks with low interstitial oxygen concentration, produced by the Choklarsky process, doping them with phosphorus, cutting the wafers and then annealing them in an oxidizing atmosphere.

[0006] Furthermore, patent document 2 proposes a method for producing n-type silicon single-crystal blocks with high resistivity and uniform resistivity in the longitudinal drawing direction by controlling the amount of evaporation of n-type dopants from the silicon melt during the drawing of the silicon single-crystal blocks.

[0007] It is known that when using oxygen-depleted silicon wafers to reduce resistance variations, the occurrence of sliding dislocations is to be expected. Sliding dislocations on the back side of silicon wafers can significantly impair the device yield due to leakage current and alignment problems in the photolithography process. It is assumed that the lower the oxygen concentration in the wafer, the lower the critical decomposition shear stress of the silicon wafer, and thus the more likely sliding dislocations are to occur.

[0008] From this perspective, attempts were made to increase the nitrogen concentration instead of the oxygen concentration in the silicon wafers, as described in patent document 3, but it was not possible to achieve a sufficiently high nitrogen concentration to suppress the occurrence of sliding dislocations. CITATION LIST Patent literature PTL 1: JP 2012-134517 A1 PTL 2: WO 2018 / 159108 PTL 3: JP 2017-122033 A1 SUMMARY

[0009] Therefore, efforts have been made to produce silicon wafers with high resistivity and low resistivity variations suitable for IGBT applications, using various methods. However, it has been difficult to prevent the occurrence of sliding dislocations while simultaneously suppressing high resistivity variations in conventional technology using silicon wafers with low oxygen concentrations.

[0010] Therefore, the purpose of the present disclosure is to provide a silicon wafer suitable for IGBT applications, which exhibits high resistance and low resistance variation and can suppress the occurrence of sliding dislocations, as well as a manufacturing process for it.

[0011] The inventors conducted extensive studies to solve the aforementioned problems. Firstly, nitrogen atoms in silicon wafers have the effect of increasing their resistance to sliding dislocations. One known method for increasing the nitrogen concentration in silicon wafers involves forming a nitride film on the surface of the wafer by heat-treating it in a nitrogen atmosphere, and then creating areas of high nitrogen concentration on the wafer's surface through the diffusion of nitrogen atoms from this nitride film towards the wafer.

[0012] On the other hand, since the device pattern is fabricated on the front side of the silicon wafer, the nitride layer formed by heat treatment in a nitrogen atmosphere must be removed. And, of course, it is on the back side, where the silicon wafer is stored, that sliding dislocations become a problem during the fabrication of the IGBT device. Therefore, the inventor came up with the idea of ​​creating the area of ​​high nitrogen concentration only in the surface portion of the back side.Based on this idea, the inventor developed the concept of obtaining a silicon wafer in which the area with the high nitrogen concentration remains on the back side by heat-treating the silicon wafer with a low oxygen concentration in a nitrogen atmosphere, so that only the nitrogen concentration on the front and back of the silicon wafer is increased once, and afterwards only the area with the high nitrogen concentration on the front side is removed.

[0013] That is to say, the core of the present revelation is as follows. <1> A silicon wafer in which a nitrogen concentration profile in the thickness direction of the silicon wafer, an area with high nitrogen concentration with a maximum nitrogen concentration of 2×10 15 atoms / cm² 3 or higher and 1×10 16 atoms / cm² 3or lower in a range from the top surface down to 20 µm in the thickness direction of the back side of the silicon wafer, the nitrogen concentration in a region from the uppermost surface to 20 µm in the thickness direction of the front face of the silicon wafer 1×10 14 atoms / cm² 3 or higher and 1×10 15 atoms / cm² 3 or lower, and the oxygen concentration (ASTM F121, 1979) of the silicon wafer 1×10 17 atoms / cm² 3 or lower. <2> The silicon wafer according to <1> , wherein the area with high nitrogen concentration exists in a region from the uppermost surface to 15 µm in the thickness direction of the back side of the silicon wafer. <3> The silicon wafer according to <1> or <2> , where the specific resistance of the silicon wafer is 30 ohm-cm or more and 10000 ohm-cm or less. <4> The silicon wafer according to a <1> until <3> , where the silicon wafer is free of dislocation clusters and COPs. <5> Method for producing a silicon wafer, comprising, A method for forming layers with high nitrogen concentration, wherein a layer with high nitrogen concentration is formed in a surface part of both the front and back of a pre-polished silicon wafer by heat treatment of the pre-polished silicon wafer in which the oxygen concentration (ASTM F121, 1979) 1×10 17 atoms / cm² 3 or less, is formed in a nitrogen atmosphere; and a method for removing layers with high nitrogen concentration, wherein at least a part of the layer with high nitrogen concentration in the surface part of the front or back of the prepolished silicon wafer is removed by the method for forming layers with high nitrogen concentration, and wherein the maximum nitrogen concentration in a region from the uppermost surface to 20 µm in the thickness direction of the back side of the silicon wafer after the method for removing layers with high nitrogen concentration 2×10 15 atoms / cm² 3 or higher and 1×10 16 atoms / cm² 3 or lower, and the nitrogen concentration in a region from the uppermost surface to 20 µm in the thickness direction of the front face of the silicon wafer after the method for removing layers with high nitrogen concentration 1×10 14 atoms / cm² 3 or higher and 1×1015 atoms / cm² 3 or lower. <6> The process for producing a silicon wafer according to <5> , wherein the maximum nitrogen concentration in a region from the uppermost surface to 15 µm in the thickness direction of the back side of the silicon wafer after the method for removing layers with high nitrogen concentration 2×10 15 atoms / cm² 3 or higher and 1×10 16 atoms / cm² 3 or lower. <7> The process for producing a silicon wafer according to <5> or <6> , wherein the layer with high nitrogen concentration is formed by a rapid thermal nitriding treatment in the process for forming layers with high nitrogen concentration. <8> The process for producing a silicon wafer according to a <5> until <7> , wherein the method for removing layers with high nitrogen concentration comprises a double-sided polishing process in which the front and back sides of the pre-polished silicon wafer are polished simultaneously using a double-sided polishing device. <9> The process for producing a silicon wafer according to a <5> until <8> , where during the removal of layers with high nitrogen concentration, the extent of polishing on the front side is 10 µm or more and 12 µm or less, and The extent of polishing on the reverse side is 4 µm or more and 8 µm or less. <10> The process for producing a silicon wafer according to a <5> until <9> , where the pre-polished silicon wafer is a silicon wafer produced by the FZ process.

[0014] According to the present disclosure, it is possible to provide a silicon wafer suitable for IGBT applications, which exhibits high resistance and low resistance variation and can suppress the occurrence of sliding dislocations, as well as a manufacturing process for it. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In the attached drawings: is Fig. 1 a diagram showing the nitrogen concentration profiles in the thickness direction of silicon wafers in preliminary experiments 1 to 6; shows Fig. 2 an observational view of the sliding dislocation length on the surface of the silicon wafer by x-ray topographic observation in preliminary experiment 1; is Fig. 3 a diagram showing the sliding dislocation lengths of the silicon wafers in preliminary experiments 1 to 6; is Fig. 4 a diagram showing the calculated values ​​of the nitrogen concentration profiles in the thickness direction of the silicon wafers from preliminary experiments 4 to 6; is Fig. 5 a schematic cross-sectional view showing a method for producing silicon wafers according to an embodiment of the present disclosure; is Fig. 6. A schematic cross-sectional view of a silicon wafer after heat treatment and a schematic drawing of the nitrogen concentration profile in the thickness direction; and is Fig. 7 a schematic cross-sectional view of a silicon wafer after SMP treatment and a schematic diagram of the nitrogen concentration profile in the thickness direction. DETAILED DESCRIPTION

[0016] Prior to describing this embodiment, the following preliminary tests were carried out to confirm the relationship between the nitrogen concentration profile in the thickness direction of the silicon wafer and the occurrence of sliding dislocations. <vorversuche>

[0017] To confirm the relationship between the nitrogen concentration profile in silicon wafers and the generation of sliding dislocations, we used silicon wafers with a diameter of 200 mm and an oxygen concentration (ASTM F121, 1979) of 1.0×10 16 atoms / cm² 3 or less, produced by the FZ process. The "oxygen concentration of silicon wafers" is a value measured using Fourier-transform infrared spectroscopy (FTIR) according to ASTM F121-1979. To modify the nitrogen concentration in the surface portion of these silicon wafers, preliminary experiment 1 was conducted without heat treatment, and preliminary experiments 2 through 6 were performed with different heat treatment conditions. To suppress the diffusion of nitrogen from the surface portion of the silicon wafer during temperature reduction, the silicon wafer was heat-treated by rapid thermal nitridation (RTN). [Preliminary test 1]

[0018] In preliminary experiment 1, the manufactured silicon wafer was used as is, and no heat treatment was carried out. [Preliminary test 2]

[0019] In preliminary experiment 2, the manufactured silicon wafer was heat-treated in an RTN furnace, which performs rapid thermal nitriding to raise the temperature to 1050°C in 20 seconds, hold this temperature for 30 seconds and lower the temperature to room temperature in 13 seconds. [Preliminary Experiment 3]

[0020] In preliminary experiment 3, the manufactured silicon wafer was heat-treated in an RTN oven to increase the temperature to 1050°C in 20 seconds, to hold this temperature for 120 seconds and to lower the temperature to room temperature in 13 seconds. [Preliminary Experiment 4]

[0021] In preliminary experiment 4, the manufactured silicon wafer was heat-treated in an RTN oven to increase the temperature to 1150°C in 22 seconds, to hold this temperature for 30 seconds and to lower the temperature to room temperature in 15 seconds. [Preliminary test 5]

[0022] In preliminary experiment 5, the manufactured silicon wafer was heat-treated in an RTN oven to raise the temperature to 1150°C in 22 seconds, hold this temperature for 60 seconds, and lower the temperature to room temperature in 15 seconds. [Preliminary Experiment 6]

[0023] In preliminary experiment 6, the manufactured silicon wafer was heat-treated in an RTN oven to increase the temperature to 1250°C in 24 seconds, to hold this temperature for 30 seconds and to lower the temperature to room temperature in 16 seconds.

[0024] Fig. Figure 1 shows the nitrogen concentration profiles in the thickness direction of the surface portion of each silicon wafer after each heat treatment in preliminary experiments 1 to 6, measured by secondary ion mass spectrometry (SIMS). The silicon wafer from preliminary experiment 1, which was not heat-treated, exhibits a nitrogen concentration of 6 × 10⁻⁶ due to nitrogen gas doping during crystal growth. 14 (Atoms / cm² 3 ) in the mass. When treated at 1050°C, the concentration in the surface area is reduced by outward diffusion. It was observed that the nitrogen concentration at 1150°C and above is higher the higher the temperature, which is attributed to inward diffusion.

[0025] Then, for each of the heat-treated silicon wafers in these preliminary experiments 1 to 6, we performed a two-stage heat treatment at 1150°C and 450°C in a vertical furnace to simulate the general heat treatment used in the fabrication of IGBT devices, and investigated the sliding dislocation length of contact scratches with the boat supporting the silicon wafer. Here, the sliding dislocation length was measured based on the X-ray topographic image. Fig. Figure 2 shows an observed image of the sliding dislocation length of the silicon wafer produced in preliminary experiment 1, where the sliding dislocation length can be confirmed at three points in the contact area with the boat.

[0026] Similar observations were made in preliminary trials 1 to 6. Fig. Figure 3 is a diagram comparing the glide displacement lengths observed at three points in this boat contact area, with shorter glide displacement lengths indicating greater resistance to glide displacement.

[0027] Based on these results, it was determined that the resistance to sliding dislocations of silicon wafers can be improved by increasing the nitrogen concentration in the near-surface region of the silicon wafer down to a certain depth. Specifically, it was found that by performing RTN at 1150°C to 1250°C, such that the nitrogen concentration in the region from the uppermost surface down to 15 µm in the thickness direction of the silicon wafer is 2 × 10 15 atoms / cm² 3 up to 1×10 16 atoms / cm² 3 is such that the resistance to sliding dislocations of the silicon wafers can be sufficiently increased. <Vorhersage der Stickstoffkonzentration in Siliciumwafern>

[0028] Due to heat treatment in a nitrogen atmosphere, the nitrogen concentration profile in the silicon wafer is expected to decrease from the surface to deeper layers. However, the nitrogen concentration profile that can be measured with SIMS is limited to the region near the surface of the silicon wafer. Therefore, we calculated the nitrogen concentration at a deeper position in the thickness direction from the surface of the silicon wafer by calculating the inward diffusion of nitrogen in a general way. Fig. Figure 4 shows the calculated nitrogen concentration profiles inside the silicon wafers from preliminary tests 4 to 6. The profile represented by the dashed line near the surface is the actual measured value, and the profile represented by the curve along the entire depth direction is the calculated value resulting from the heat treatment conditions of each preliminary test. As can be seen from these results, the nitrogen concentration across the entire thickness of the silicon wafer can be roughly predicted by solving the diffusion calculation. This predicted value can be used to estimate the amount of polishing required to expose the surface with the desired nitrogen concentration.For example, on the front side of a silicon wafer, where the area with high nitrogen concentration is not needed, grinding and polishing can be carried out until the area with high nitrogen concentration is removed, and on the back side of the silicon wafer, where the area with high nitrogen concentration is to be exposed, grinding and polishing can be carried out until the area with high nitrogen concentration is exposed.Therefore, by heat-treating silicon wafers with low oxygen concentration in a nitrogen atmosphere, only the nitrogen concentration on the surface part of the front and back of the silicon wafer can be increased once, and then only the area with high nitrogen concentration on the front is removed, leaving the area with high nitrogen concentration on the back, so that the entire wafer has high resistance and resistance variations can be suppressed, and the generation of sliding dislocations on the back of the wafer, which is problematic in the fabrication of IGBT devices, can be suppressed. (Method for producing a silicon wafer)

[0029] Based on the preliminary test results above, embodiments of the process for producing a silicon wafer are described in detail below with reference to the drawings. Identical components are generally assigned the same reference numeral with the last two digits of the number, and duplicate explanations are omitted. Furthermore, the following is described in the Fig. Figures 5 to 7 exaggerate the thickness of the individual components for the sake of simplicity in the drawings, in contrast to the actual thickness ratio. The method for producing a silicon wafer according to this embodiment is characterized in that the method comprises the following: a method for forming layers with a high nitrogen concentration, in which a layer with a high nitrogen concentration is formed in a surface part of both the front and back of a pre-polished silicon wafer by heat treatment of the pre-polished silicon wafer, in which the oxygen concentration (ASTM F121, 1979) 1×10 17 atoms / cm² 3 or lower, is formed in a nitrogen atmosphere; and a method for removing a high nitrogen concentration layer, wherein at least a portion of the high nitrogen concentration layer in the surface part of the front or back of the pre-polished silicon wafer is removed according to the high nitrogen concentration layer formation method, and the maximum nitrogen concentration in a region from the top surface to 20 µm in the thickness direction of the back of the silicon wafer according to the high nitrogen concentration layer removal method is 2×10 15 atoms / cm² 3 or higher and 1×10 16 atoms / cm² 3 or lower, and the nitrogen concentration in a region from the uppermost surface to 20 µm in the thickness direction of the front face of the silicon wafer after the high nitrogen concentration layer removal process 1×10 14 atoms / cm² 3 or higher and 1×10 15 atoms / cm² 3 or lower.

[0030] The following is a detailed description of the individual components and procedures of our method.

[0031] In the process for producing a silicon wafer according to this embodiment, a heat treatment is applied to the silicon wafer to form a region of high nitrogen concentration only on the back side of the finished silicon wafer. In one embodiment, which is described in Fig. As shown in Figure 5 as an example, a front layer with a high nitrogen concentration 112 and a back layer with a high nitrogen concentration 113 are first formed by heat treatment on each surface portion of the front and back of the pre-polished silicon wafer 110. A grinding device is then used to remove the front layer with a high nitrogen concentration from the pre-polished silicon wafer 110, and the back is ground with the specified amount of abrasive to retain the high nitrogen concentration layer. Double-sided and single-sided polishing processes are then performed to adjust the surface roughness of the top surface 110a of the front, which represents the low nitrogen concentration region. The details of each process in the first embodiment are described below in turn.Grinding involves scraping the wafer with a hard grinding wheel to remove the nitride layer formed on the wafer surface and to adjust the wafer thickness. Polishing refers to polishing the wafers with a soft abrasive cloth to adjust their flatness. <Vorpolierter Siliciumwafer>

[0032] A single-crystal silicon wafer 110, used in the fabrication of a silicon wafer according to the present disclosure, can be used as a pre-polished silicon wafer 110, which is cut from a silicon single crystal. The single-crystal silicon wafer can be one produced from a single-crystal silicon block grown by the Choklarsky method (CZ method) or the floating-zone melting method (FZ method) and cut into wafers by wire sawing or other means. From the point of view of its use as a low-oxygen silicon wafer, the silicon wafer produced by the FZ method is preferable. The oxygen concentration of the silicon wafer (ASTM F121, 1979) is 1 × 10⁻⁶ 17 atoms / cm² 3 or less, preferably 2×10 16 atoms / cm² 3 or less, and even more preferably 1x10 16 atoms / cm² 3 or less. When the silicon wafer is used for vertical devices, the presence of defects in any region in the vertical direction of the device formation area affects the device properties, as these defects generate leakage currents. To achieve better device properties, it is therefore preferable that the pre-polished silicon wafer 110 is free of dislocation clusters and vacancy aggregation defects (COP: Crystal Originated Particle).

[0033] The term "COP-free silicon wafers" refers to silicon wafers where COPs are not detected by the observational evaluation described below. This involves first performing SC-1 cleaning (i.e., cleaning with a mixture of ammonia water, hydrogen peroxide water, and ultrapure water in a 1:1:15 ratio) on silicon wafers cut and machined from single-crystal silicon blocks grown using the CZ process; observing and evaluating the surface of the cleaned silicon wafers using the KLA-Tencor Surfscan SP-2 surface inspection system; and identifying light point defects (LPDs), which are considered surface holes. In this case, the observation mode is oblique (oblique incidence), and the surface holes are estimated based on the wide-narrow-channel detection size ratio.For the LPDs identified in this way, atomic force microscopy (AFM) is used to assess whether they are COPs or not. Silicon wafers on which no COPs are detected in this assessment are referred to as "COP-free silicon wafers".

[0034] On the other hand, dislocation clusters are large-scale (about 10 µm) defects formed as aggregates of excess interstitial silicon (dislocation loops), and the presence of dislocation clusters can be easily confirmed visually by applying an etching technique such as seco etching or by making them visible through Cu decoration. <Verfahren zur Bildung von Schichten mit hoher Stickstoffkonzentration>

[0035] The process for forming high nitrogen concentration layers is a method for forming high nitrogen concentration layers in a surface portion of both the front and back sides of the pre-polished silicon wafer 110 by heat-treating the pre-polished silicon wafer 110 in a nitrogen atmosphere. The heat treatment in this process is preferably carried out using a rapid thermal annealing (RTN) furnace capable of rapid thermal nitriding, in which the wafers are heated in a nitrogen atmosphere, although batch heat treatment devices (vertical or horizontal heat treatment devices), etc., may also be used. The furnace may also contain an inert gas in addition to nitrogen. The heat treatment temperature is preferably 1100°C or higher, and more preferably 1150°C or higher.Furthermore, the heat treatment temperature is preferably 1350°C or below, and even more preferably 1300°C or below. The heat treatment time should be adjusted according to the furnace used. For example, in an RTN furnace, the heat treatment time is preferably at least 10 seconds and even more preferably at least 30 seconds. Likewise, it is preferably not more than 150 seconds and even more preferably not more than 120 seconds. To carry out the rapid thermal nitriding treatment, the time for the temperature rise to the maximum temperature is preferably 24 seconds or less, and even more preferably 20 seconds or less. Similarly, the time for the temperature reduction from the maximum temperature to room temperature is preferably 16 seconds or less, and more preferably 13 seconds or less, to carry out the rapid thermal nitriding treatment.During heat treatment in a batch heat treatment unit, the heat treatment time is preferably at least 10 minutes and at most 3 hours. Furthermore, the high nitrogen concentration layer formed on each side in the high nitrogen concentration layer formation process is preferably formed in every region from the top surface down to 20 µm in the thickness direction of the front and back sides of the silicon wafer.

[0036] In the process of forming layers with high nitrogen concentration, as in Fig. As shown in Figure 6, nitrogen diffuses inwards in the furnace to the surface areas of the front and back of the pre-polished silicon wafer 110, forming the front-side high nitrogen concentration layer 112 and the back-side high nitrogen concentration layer 113 on the surface areas of each side. The higher the heat treatment temperature, the higher the nitrogen concentration in the surface areas of the pre-polished silicon wafer 110 and the more nitrogen diffuses to the upper surfaces of the pre-polished silicon wafer 110. The heat treatment of the pre-polished silicon wafer 110 results in the formation of a high nitrogen concentration layer with a nitrogen concentration of 2 × 10⁻⁶ in the nitrogen concentration profile in the thickness direction of the pre-polished silicon wafer 110. 15 atoms / cm² 3 or higher education. Fig. Figure 6 shows a schematic drawing of a silicon wafer with the front layer with high nitrogen concentration 112 and the back layer with high nitrogen concentration 113, together with a schematic conceptual drawing of the nitrogen concentration profile in the thickness direction of the silicon wafer with each of the formed high nitrogen concentration layers. As in Fig. As shown in Figure 6, the concentration profile of the nitrogen diffused inwards in the silicon wafer exhibits peaks in the surface parts of the front and back sides. <Entfernungsverfahren für Schichten mit hoher Stickstoffkonzentration>

[0037] When removing layers with high nitrogen concentrations, as in Fig. As shown in Figure 7, after the formation of high nitrogen concentration layers, at least a portion of the high nitrogen concentration layer is removed from the surface portion of the front and back faces of the pre-polished silicon wafer. When grinding and polishing silicon wafer surfaces, it is common practice to perform one-sided polishing (SMP) on the front face of the silicon wafer after double-sided polishing (DSP) on both the front and back faces. Double-sided polishing removes the nitride layer from the front and back faces of the silicon wafer and simultaneously eliminates process stress to ensure a certain degree of flatness. By performing one-sided polishing only on the front face, the surface roughness of the silicon wafer can be achieved.However, if polishing is performed on both sides, so that the same amount of material is removed from the front and back, the layer with the high nitrogen concentration remains on the front of the silicon wafer, which is used as the active layer for the device. In this case, the nitrogen atoms in the layer with the high nitrogen concentration cause fluctuations in the specific resistance of the wafer and the appearance of surface defects such as precipitates, rendering the wafer unusable as a product.Therefore, in this embodiment, in the process for removing high nitrogen concentration layers from the front high nitrogen concentration layer 112 and the back high nitrogen concentration layer 113, which was formed in the high nitrogen concentration layer formation process, the wafer is ground on one side at a time after heat treatment to remove only the high nitrogen concentration layer 112 on the front side, and then a double-sided polishing process is carried out to adjust the flatness. However, during double-sided polishing, the conditions can be adjusted so that the front side of the silicon wafer is polished faster than the back side. For this purpose, for example, the operating conditions between the upper and lower polishing plates can be changed.In particular, the polishing pads on the top and bottom surfaces can differ, for example, using a solid abrasive pad with embedded abrasive grains only on the top surface, or a combination of a urethane pad and a non-woven / suede pad on both surfaces, depending on the requirements. Other ways to achieve this include varying the pressure or rotational speed of the top and bottom polishing plates. By processing under these conditions, the degree of removal of high nitrogen concentration layers can be finely tuned, ensuring that the entire high nitrogen concentration layer 112 on the front of the silicon wafer is removed, leaving the high nitrogen concentration area 114 on the back surface.The removal of the front-side layer with high nitrogen concentration 112 in the process for removing layers with high nitrogen concentration can be carried out by any method other than polishing, e.g. by etching, and is not limited to polishing.

[0038] Furthermore, as described above, rapid thermal nitriding using an RTN furnace enables the localization of a high nitrogen concentration layer near the surface of the silicon wafer, thereby reducing the amount of polishing required on the front and back surfaces of the silicon wafer following the high nitrogen concentration layer formation process. The amount of polishing required on the front surface of the pre-polished silicon wafer in the high nitrogen concentration layer removal process can be 15 µm or less, and preferably 10 µm or more and 12 µm or less. Similarly, the amount of polishing required on the back surface of the pre-polished silicon wafer in the high nitrogen concentration layer removal process can be 10 µm or less, and preferably 4 µm or more and 8 µm or less.

[0039] The maximum nitrogen concentration in a region from the top surface to 20 µm in the thickness direction of the back side of the silicon wafer after the high nitrogen concentration layer removal process is 2×10 15 atoms / cm² 3 or higher and 1×10 16 atoms / cm² 3 or lower. The maximum nitrogen concentration is preferably 3×10 15 atoms / cm² 3 or higher, and even more preferred 4×10 15 atoms / cm² 3 or higher; and is preferably 9×10 15 atoms / cm² 3 or lower, and even more preferred 8×10 15 atoms / cm² 3 or lower. Furthermore, the range of such nitrogen concentration according to the method for removing layers with high nitrogen concentration is preferably in a range from the uppermost surface to 18 µm in the thickness direction of the back side of the silicon wafer, and even more preferably in a range from the uppermost surface to 15 µm in the thickness direction.

[0040] On the other hand, the nitrogen concentration in a region from the uppermost surface down to 20 µm in the thickness direction of the front face of the silicon wafer after the process for removing layers with high nitrogen concentration is 1×10 14 atoms / cm² 3 or higher and 1×10 15 atoms / cm² 3 or lower. It is preferably 2×10 14 atoms / cm² 3 or higher, and even more preferably 3×10 14 atoms / cm² 3 or higher; and it is preferably 9×10 14 atoms / cm² 3 or lower, and even more preferred 8×10 14 atoms / cm² 3 .

[0041] In this way, only the layer with high nitrogen concentration on the front side is removed, while the area with high nitrogen concentration on the back side remains, thus producing a silicon wafer suitable for IGBT applications that exhibits high resistance and low resistance fluctuations and can suppress the occurrence of sliding dislocations.

[0042] Silicon wafers that can be produced using the manufacturing process described above are described in detail below. (silicon wafer)

[0043] The silicon wafer according to the present disclosure is a silicon wafer in which a region of high nitrogen concentration with a maximum nitrogen concentration of 2×10 is present in a nitrogen concentration profile in a thickness direction of the silicon wafer. 15 atoms / cm² 3 or higher and 1×10 16 atoms / cm² 3 or lower in a region from the top surface to 20 µm in the thickness direction of the back side of the silicon wafer, the nitrogen concentration in a region from the top surface to 20 µm in the thickness direction of the front side of the silicon wafer is 1×10 14 atoms / cm² 3 or higher and 1×10 15 atoms / cm² 3 or lower, and the oxygen concentration (ASTM F121, 1979) of the silicon wafer 1×10 17 atoms / cm² 3 or lower. The details of each configuration are described below in turn. Since the area with high nitrogen concentration in the surface part on the back side of the silicon wafer constitutes only a small percentage of the total silicon wafer, the oxygen concentration of the silicon wafer as a whole can be considered practically the same as that of the silicon wafer before heat treatment, etc. <sauerstoffkonzentration>

[0044] Since the oxygen concentration of silicon wafers remains almost constant before and after the formation of high nitrogen layers and the polishing process, the oxygen concentration of the silicon wafers can be measured as the oxygen concentration before the formation of the high nitrogen layers. Here, the oxygen concentration refers to the oxygen concentration measured by FT-IR. <Spezifischer Widerstand des Siliciumwafers>

[0045] The resistivity of the silicon wafer is preferably 30 ohm-cm or more and 10,000 ohm-cm or less. Here, the resistivity is measured using the four-point probe method. This can be done, in particular, by measuring the center of the front face of the silicon wafer using the four-point probe method.

[0046] Although the generation of sliding dislocations is a problem in silicon wafers with low oxygen content, the wafers according to the present disclosure are suitable for IGBT devices because there is a region of high nitrogen concentration on the back of the wafer which suppresses the generation of sliding dislocations, and there are no resistance variations except in the surface part on the back of the wafer. INDUSTRIAL APPLICABILITY

[0047] According to the present disclosure, it is possible to provide a silicon wafer suitable for IGBT applications, which exhibits low resistance fluctuations and can suppress the occurrence of sliding dislocations, as well as a corresponding manufacturing process. QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] JP 2012-134517 A1

[0008] WO 2018 / 159108

[0008] JP 2017-122033 A1

[0008] < / sauerstoffkonzentration> < / vorversuche>

Claims

[1] Silicon wafer in which, in a nitrogen concentration profile in the thickness direction of the silicon wafer, an area of high nitrogen concentration with a maximum nitrogen concentration of 2×10 15 atoms / cm 3 or higher and 1×10 16 atoms / cm 3 or lower in a range from the top surface to 20 µm in the thickness direction of the back side of the silicon wafer, the nitrogen concentration in a range from the top surface to 20 µm in the thickness direction of the front side of the silicon wafer 1×10 14 atoms / cm 3 or higher and 1×10 15 atoms / cm 3 or lower, and the oxygen concentration (ASTM F121, 1979) of the silicon wafer 1×10 17 atoms / cm 3 or less. [2] The silicon wafer according to claim 1, wherein the high nitrogen concentration region exists in a range from the top surface to 15 µm in the thickness direction of the back surface of the silicon wafer. [3] The silicon wafer according to claim 1 or 2, wherein the resistivity of the silicon wafer is 30 ohm-cm or more and 10000 ohm-cm or less. [4] The silicon wafer according to any one of claims 1 to 3, wherein the silicon wafer is free of dislocation clusters and COPs. [5] A method for producing a silicon wafer, comprising: a method for forming high nitrogen concentration layers, in which a high nitrogen concentration layer is formed in a surface part of both the front and back surfaces of a pre-polished silicon wafer by heat-treating the pre-polished silicon wafer in which the oxygen concentration (ASTM F121, 1979) is 1×10 17 atoms / cm 3or less, in a nitrogen atmosphere; and a high nitrogen concentration layer removal method comprising removing at least a portion of the high nitrogen concentration layer in the surface portion of the front side or the back side of the pre-polished silicon wafer after the high nitrogen concentration layer formation method, and wherein the maximum nitrogen concentration in a range from the top surface to 20 µm in the thickness direction of the back side of the silicon wafer after the high nitrogen concentration layer removal method is 2×10 15 atoms / cm 3 or higher and 1×10 16 atoms / cm 3 or lower, and the nitrogen concentration in a range from the top surface to 20 µm in the thickness direction of the front side of the silicon wafer after the high nitrogen concentration layer removal method 1×10 14 atoms / cm 3 or higher and 1×10 15 atoms / cm 3 or lower. [6] A method for producing a silicon wafer according to claim 5, wherein the maximum nitrogen concentration in a range from the top surface to 15 µm in the thickness direction of the back surface of the silicon wafer after the high nitrogen concentration layer removal method is 2×10 15 atoms / cm 3 or higher and 1×10 16 atoms / cm 3 or lower. [7] A method for producing a silicon wafer according to claim 5 or 6, wherein the high nitrogen concentration layer is formed by a rapid thermal nitriding treatment in the process for forming high nitrogen concentration layers. [8] A method for producing a silicon wafer according to any one of claims 5 to 7, wherein the high nitrogen concentration layer removal method comprises a double-side polishing process in which the front and back surfaces of the pre-polished silicon wafer are simultaneously polished using a double-side polishing apparatus. [9] A method for producing a silicon wafer according to any one of claims 5 to 8, wherein when removing layers with high nitrogen concentration, the polishing degree on the front side is 10 µm or more and 12 µm or less, and the degree of polishing on the back side is 4 µm or more and 8 µm or less. [10] A method for producing a silicon wafer according to any one of claims 5 to 9, wherein the pre-polished silicon wafer is a silicon wafer produced by the FZ method.

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