Hardware-supported coding with weighted prediction using software-generated weighted prediction parameters

By employing hardware-assisted coding with weighted prediction parameters, the method addresses inefficiencies in video encoding due to rapid luminance and chrominance changes, reducing residual data and bit rates while improving predictive accuracy and visual quality.

DE102025133307A1Pending Publication Date: 2026-04-23NVIDIA CORP
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Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Applications
Current Assignee / Owner
NVIDIA CORP
Filing Date
2025-08-20
Publication Date
2026-04-23

AI Technical Summary

Technical Problem

Existing video encoding methods struggle with sequences exhibiting large, rapid changes in luminance and/or chrominance, leading to low temporal correlation and high inter-frame costs, resulting in inefficient video streams with high bit rates.

Method used

A computer-implemented method using hardware-assisted coding with software-generated weighted prediction parameters to reduce or eliminate inter-frame differences caused by large luminance and chrominance changes, applying weighted prediction parameters based on variance and mean calculations to improve predictive accuracy and encoding efficiency.

Benefits of technology

The method reduces residual data and bit rates, enhances predictive accuracy, and improves visual quality by identifying better matching blocks in reference media images, resulting in more efficient video encoding.

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Abstract

Various embodiments include methods for performing hardware-assisted weighted prediction coding with software-generated weighted prediction parameters for a media image. The disclosed weighted prediction coding methods exploit a temporal inter-image correlation between adjacent media images in a video stream. In certain examples, a media image, or portions thereof, may exhibit a rapid change in luminance, such as during a fade-in from black, a fade-out to black, a video depicting an explosion or bursting, and / or the like. This rapid change in luminance reduces the inter-image correlation, even in cases where the inter-image correlation would be higher without the change in luminance. The disclosed methods remove this change in luminance before coding, resulting in a higher temporal correlation between adjacent images.The higher temporal correlation can lead to a reduced bitrate and improved visual quality of the resulting output video stream.
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Description

BACKGROUND Area of ​​the different designs

[0001] Various embodiments generally relate to video coding architectures and, in particular, to hardware-assisted coding with weighted prediction using software-generated weighting prediction parameters. Description of the state of the art

[0002] When streaming live or pre-recorded video, a first computer system, such as a server, data center, cloud storage system, and / or the like, transmits a video stream to a second computer system, such as a smartphone, tablet computer, laptop computer, and / or the like. Transmitting video streams between computer systems can consume a significant amount of network bandwidth, reducing the bandwidth available for other uses. Therefore, one goal of computer systems transmitting video streams is to compress and encode the video streams before transmission without substantially reducing the video quality. Computer systems receiving such video streams decompress and decode them before displaying them on one or more display devices.

[0003] When compressing and encoding a video stream, a computer system may include a hardware video encoder that divides each media frame in the video stream into blocks, with each block containing a group of adjacent pixels of the media frame. Each block of adjacent pixels can be an 8×8 block of pixels, a 16×16 block of pixels, and / or the like. Depending on the video format used for encoding, these blocks are referred to as macroblocks, coding tree units (CTUs), and / or the like. The video encoder encodes the blocks as a set of lines, with the blocks of each line being encoded sequentially from left to right and the lines being encoded from top to bottom.

[0004] When a video encoder encodes a current block of a media frame, it can perform either inter-frame coding or intra-frame coding. In inter-frame coding, the encoder determines the difference between the pixel data of a current block and the pixel data of a matching block in a reference media frame. This difference is called an inter-frame candidate. The reference media frame is typically the media frame immediately before or after the current media frame. Inter-frame coding can take advantage of strong temporal correlations between adjacent media frames in a video stream. In intra-frame coding, the encoder determines the difference between the pixel data of a current block and the pixel data of neighboring pixels in the same block and / or in adjacent blocks within the current media frame. This difference is called an intra-frame candidate.Intra-image coding can exploit a strong spatial correlation between pixels of a current block of a media image and neighboring pixels that are located near the pixels of the current block.

[0005] For each block of a media frame, the video encoder can generate an inter-frame candidate containing the difference data between the current block and the matching block of the reference media frame. Furthermore, the video encoder can generate an intra-frame candidate containing the difference data between the pixels of the current block and the pixels adjacent to the current block and adjacent blocks of the current media frame. This difference data is also referred to as residuals or residual data. The amount of difference data can be measured by the number of bits in the encoded video stream required to carry it. The video encoder determines inter-frame costs, with low costs when the difference between the current block and the matching block of the reference media frame is small, indicating a high temporal correlation.Furthermore, the video encoder determines intra-frame costs, where costs are low when the difference between the pixels of the current block and neighboring pixels in the same block and adjacent blocks of the current media image is small, indicating high spatial correlation. The video encoder selects a winning candidate for the current block by choosing the inter-frame candidate when the inter-frame costs are lower than the intra-frame costs, and the intra-frame candidate when the intra-frame costs are lower than the inter-frame costs. By selecting the winning candidate associated with the lowest costs (i.e., the smallest amount of difference data), the video encoder can reduce the amount of data to be encoded while maintaining the same visual quality of the resulting video stream.

[0006] One problem with this approach to encoding media images is that certain sequences of media images in a video stream can exhibit large, rapid changes in luminance and / or chrominance between adjacent media images, even if the media images have strong temporal inter-image correlation beyond the change in luminance and / or chrominance. For example, a sequence of media images might exhibit a large, rapid change in luminance and / or chrominance during a fade-in from black or a fade-out to black. Each block of a current media image can exhibit a large, rapid change in luminance and / or chrominance from one media image to the next, even if the camera angle and / or objects in the scene show little to no movement.In another example, a sequence of media frames during an explosion or the bursting of an object in the scene may exhibit a large, rapid change in luminance and / or chrominance. Objects near the explosion may be moving rapidly, while objects far from the explosion may show little to no movement. However, the entire media frame, or large portions of it, may exhibit a large, rapid change in luminance and / or chrominance from frame to frame due to the bright light resulting from the explosion.

[0007] In these and other similar examples, the large, rapid change in luminance and / or chrominance from frame to frame leads to low temporal correlation and, consequently, high inter-frame costs. When the video encoder selects inter-frame candidates under such conditions, the amount of difference data can be large. This condition can cause the intra-frame costs to be lower than the inter-frame costs, leading the video encoder to select intra-frame candidates even if the spatial correlation of the blocks in the media image is also relatively low. In either case, the difference data for both the inter-frame and intra-frame candidates can be relatively large, resulting in a video stream with low coding efficiency and therefore a high bit rate.

[0008] As the above illustrates, more effective methods for encoding blocks of a media image by a video encoder in a computing system are required in the prior art. SUMMARY

[0009] Various embodiments of the present disclosure describe a computer-implemented method for performing hardware-assisted coding with weighted prediction using software-generated weighted prediction parameters for a current media image. The method includes determining a first mean and a first variance for the current media image. The method further includes determining a second mean and a second variance for a reference media image. The method further includes determining one or more first weighted prediction parameters based on the first variance, the first mean, the second variance, and the second mean.In the disclosed embodiments, one or more first weighting prediction parameters are applied to at least a part of predicted samples of the current media image before encoding the at least part of the predicted samples of the current media image.

[0010] Other embodiments include, but are not limited to, a system implementing one or more aspects of the disclosed techniques, and one or more computer-readable media containing instructions for carrying out one or more aspects of the disclosed techniques, as well as a method for carrying out one or more aspects of the disclosed techniques.

[0011] At least one technical advantage of the disclosed techniques or methods over the prior art is that, in the disclosed techniques, the video encoder reduces or eliminates inter-frame differences resulting from a large, rapid change in the overall luminance and / or chrominance level before encoding blocks of an actual media image in a video stream. The video encoder generates inter-frame candidates for the blocks of the actual media image based on inter-frame differences other than those resulting from a change in the overall luminance and / or chrominance level. As a result, the video encoder can produce a video stream with a lower residual, a lower bit rate, and correspondingly higher encoding efficiency when encoding video streams with rapid changes in luminance and / or chrominance compared to conventional methods.Furthermore, by reducing or eliminating inter-image differences resulting from changes in the overall luminance and / or chrominance levels, the video encoder can identify matching blocks in the reference media image that exhibit a better match with blocks in the current media image. As a result, the predictive accuracy of the video encoder is improved, leading to better visual quality of the resulting video stream. These advantages represent one or more technological improvements over prior art approaches. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] To enable a detailed understanding of the nature of the aforementioned features of the various embodiments, a more precise description of the inventive concepts summarized above can be provided by reference to various embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the accompanying drawings only illustrate typical embodiments of the concepts according to the invention and are therefore in no way to be considered as limiting the scope, and that other equally effective embodiments exist. Fig. Figure 1 is a block diagram of a computer system designed to implement one or more aspects of the various embodiments; Fig. Figure 2 is a block diagram of a parallel processing unit (PPU), which, according to various embodiments, is located in the auxiliary processing subsystem of Fig. 1 is present; Fig. Figure 3 is a block diagram of a general processing cluster (GPC) located in the parallel processing unit (PPU) of Fig. 2 according to different embodiments; Fig. Figure 4 is a block diagram of a video encoder designed to provide encoding data for multiple blocks of a media image to the computer system of the Fig. 1-3 to produce and process according to different embodiments; Fig. Figure 5 illustrates a functional view of a video encoder that converts a media image for the computer system of the Fig. 1-4 can be coded according to different embodiments; Fig. Figures 6A-6B illustrate the application of a weighted prediction to a media image processed by the video encoders of the Fig. 4-5 is coded according to different embodiments; Fig. Figures 7A-7B illustrate the application of a weighted prediction to multiple regions within a media image processed by the video encoders of the Fig. 4-5 is coded according to different embodiments; and Fig. Figure 8 is a flowchart of process steps for performing a weighted inter-image prediction for a media image by the computer system of the Fig. 1-7B according to various embodiments. DETAILED DESCRIPTION

[0013] The following description presents numerous specific details to enable a more thorough understanding of the various embodiments. However, it is clear to those skilled in the art that the concepts according to the invention can also be implemented without one or more of these specific details. System overview

[0014] Fig. Figure 1 is a block diagram of a computer system 100, designed to implement one or more aspects of the various embodiments. As shown, the computer system 100, without restriction, has a central processing unit (CPU) 102 and a system memory 104, which is coupled to an auxiliary processing subsystem 112 via a memory bridge 105 and a communication path 113. The memory bridge 105 is furthermore coupled to an input / output (I / O) bridge 107 via a communication path 106, and the I / O bridge 107 is in turn coupled to a switch 116.

[0015] In operation, the I / O bridge 107 is configured to receive user input information from input devices 108, such as a keyboard or mouse, and forwards the input information to the CPU 102 for processing via the communication path 106 and the memory bridge 105. In some examples, the input devices 108 are used to verify the identity of one or more users, to grant authorized users access to the computer system 100, and to deny unauthorized users access. The switch 116 is configured to establish connections between the I / O bridge 107 and other components of the computer system 100, such as a network adapter 118 and various add-in cards 120 and 121.In some examples, network adapter 118 serves as the primary or exclusive device for receiving input data for processing by the disclosed methods.

[0016] As also shown, the I / O bridge 107 is coupled to a system disk 114, which can be configured to store content, applications, and data for use by the CPU 102 and the auxiliary processing subsystem 112. In general, the system disk 114 provides non-volatile storage for applications and data and can include fixed or removable hard disk drives, flash memory devices, and CD-ROM (Compact Disc Read-Only Memory), DVD-ROM (Digital Versatile Disc-ROM), Blu-ray, HD-DVD (High Definition DVD), or other magnetic, optical, or solid-state storage devices. Finally, although not explicitly shown, other components, such as Universal Serial Bus or other connectors, Compact Disc drives, Digital Versatile Disc drives, movie recording devices, and the like, can also be connected to the I / O bridge 107.

[0017] In various embodiments, the memory bridge 105 can be a northbridge chip and the I / O bridge 107 a southbridge chip. Furthermore, the communication paths 106 and 113, as well as other communication paths within the computer system 100, can be implemented using any technically suitable protocols, including, but not limited to, Peripheral Component Interconnect Express (PCle), HyperTransport, or other bus or point-to-point communication protocols known in the art.

[0018] In some embodiments, the auxiliary processing subsystem 112 comprises a graphics subsystem that supplies pixels to a display device 110, which may be a conventional cathode ray tube, liquid crystal display, light-emitting diode display, or the like. In such embodiments, the auxiliary processing subsystem 112 includes a circuit optimized for graphics and video processing, which, for example, includes a video output circuit. As in Fig. As described in more detail in Section 2, such circuits can be contained in one or more auxiliary processors present in Auxiliary Processing Subsystem 112. An auxiliary processor has one or more processing units capable of executing instructions, such as a RISC (Reduced Instruction Set Computer), a central processing unit (CPU), or a parallel processing unit (PPU). Fig. 2-4, a graphics processing unit (GPU), a direct memory access (DMA) unit, an intelligence processing unit (IPU), a neural accelerator unit (NAU), a tensor processing unit (TPU), a neural network processor (NNP), a data processing unit (DPU), a vision processing unit (VPU), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) and / or the like.

[0019] In some embodiments, the auxiliary processing subsystem 112 includes two processors, referred to herein as the primary processor (normally a CPU) and the secondary processor. Typically, the primary processor is a CPU and the secondary processor is a GPU. Additionally or alternatively, both the primary processor and the secondary processor may consist of one or more of the types of auxiliary processors disclosed herein, in any technically feasible combination. The secondary processor receives safe instructions from the primary processor via an unsecured communication path. The secondary processor accesses memory and / or other storage systems, such as system memory 104, Compute Express Link (CXL) memory extensions, memory-managed disk storage, on-chip memory, and / or the like.The secondary processor accesses this memory and / or another storage system over an insecure connection. The primary and secondary processors can communicate with each other via a GPU-to-GPU communication channel, such as Nvidia Link (NVLink). Additionally, the primary and secondary processors can communicate with each other via network adapter 118. Generally, the distinction between an insecure and a secure communication path is application-dependent. A given application program generally considers communication within a die, chip, or packet to be secure. The communication of unencrypted data over a standard communication channel such as PCIe is considered insecure.

[0020] In some embodiments, the auxiliary processing subsystem 112 includes circuits optimized for general-purpose use and / or data processing. Such circuitry may also be contained in one or more auxiliary processors within the auxiliary processing subsystem 112, configured to perform such general-purpose and / or computational operations. In other embodiments, the one or more auxiliary processors within the auxiliary processing subsystem 112 may be configured to perform graphics processing, general-purpose processing, and arithmetic operations. The system memory 104 includes at least one device driver 103 configured to manage the processing operations of the one or more auxiliary processors within the auxiliary processing subsystem 112.

[0021] In other versions, the auxiliary processing subsystem 112 can be combined with one or more other elements of the Fig. 1 can be integrated into a single system. For example, the auxiliary processing subsystem 112 can be integrated with the CPU 102 and other interconnect circuitry on a single chip to form a system on a chip (SoC).

[0022] It is clear that the system shown here is illustrative and that variations and modifications are possible. The connection topology, which includes the number and arrangement of the bridges, the number of CPUs 102, and the number of auxiliary processing subsystems 112, can be changed as desired. In some embodiments, for example, the system memory 104 could be connected directly to the CPU 102, rather than via the memory bridge 105, and other devices could communicate with the system memory 104 via the memory bridge 105 and the CPU 102. In other alternative topologies, the auxiliary processing subsystem 112 could be connected to the I / O bridge 107 or directly to the CPU 102, rather than via the memory bridge 105. In other embodiments, the I / O bridge 107 and the memory bridge 105 could be integrated on a single chip, instead of existing as one or more discrete devices.Finally, in certain embodiments, one or more of the features described in . Fig. The components shown in Figure 1 may not be present. For example, the switch 116 can be omitted, and the network adapter 118 and the add-on cards 120, 121 can be directly connected to the I / O bridge 107.

[0023] Fig. Figure 2 is a block diagram of a parallel processing unit (PPU) 202, which is located in the auxiliary processing subsystem 112 of Fig. 1 according to various embodiments. Although in Fig. Since PPU 202 is represented in Figure 2, the auxiliary processing subsystem 112, as indicated above, can have any number of PPUs 20. Furthermore, PPU 202 is the Fig. 2. An example of an auxiliary processor located in the auxiliary processing subsystem 112 of the Fig. 1 is included. Alternative auxiliary processors include, without limitation, RISCs, CPUs, GPUs, DMA units, IPUs, NPUs, TPUs, NNPs, DPUs, VPUs, ASICs, FPGAs and / or the like. The ones in the Fig. The methods disclosed in Sections 2 and 3 relating to the PPU 202 apply equally to any type of auxiliary processor(s) included in the auxiliary processing subsystem 112, in any combination. As shown, the PPU 202 is coupled to a local parallel processing (PP) memory 204. The PPU 202 and the PP memory 204 can be implemented with one or more integrated circuits, such as programmable processors, application-specific integrated circuits (ASICs), or memory devices, or in any other technically feasible form.

[0024] In some embodiments, the PPU 202 includes a graphics processing unit (GPU) that may be configured to implement a graphics rendering pipeline for performing various operations related to generating pixel data based on graphics data supplied by the CPU 102 and / or the system memory 104. When processing graphics data, the PP memory 204 can be used as graphics memory, storing one or more conventional image buffers and, if necessary, one or more other rendering targets. The PP memory 204 can be used, among other things, to store and update pixel data and to deliver the final pixel data or display images to the display device 110 for display. In some embodiments, the PPU 202 may also be configured for general-purpose processing and computational operations.

[0025] In operation, the CPU 102 is the main processor of the computer system 100 and controls and coordinates the operations of other system components. In particular, the CPU 102 issues instructions that control the operation of the PPU 202. In some embodiments, the CPU 102 writes a stream of instructions for the PPU 202 into a data structure (neither in Fig. 1 still in Fig. 2 (explicitly shown), which may be located in system memory 104, PP memory 204, or another memory location accessible to both CPU 102 and PPU 202. Additionally or alternatively, processors and / or auxiliary processors other than CPU 102 may write one or more instruction streams for PPU 202 into a data structure. A pointer to the data structure is written to a push buffer to initiate the processing of the instruction stream in the data structure. PPU 202 reads the instruction streams from the push buffer and then executes the instructions asynchronously to the operation of CPU 102. In embodiments where multiple push buffers are created, execution priorities for each push buffer can be set by an application program via device driver 103 to control the timing of the different push buffers.

[0026] As also shown, the PPU 202 has an I / O (input / output) unit 205, which communicates with the rest of the computer system 100 via the communication path 113 and the memory bridge 105. The I / O unit 205 generates packets (or other signals) for transmission on the communication path 113 and also receives all incoming packets (or other signals) from the communication path 113 and forwards the incoming packets to the appropriate components of the PPU 202. For example, commands relating to processing tasks can be directed to a host interface 206, while commands relating to memory operations (e.g., reading from or writing to the PP memory 204) can be directed to a crossbar unit 210. The host interface 206 reads each push buffer and transmits the instruction stream stored in the push buffer to a front end 212.

[0027] As above in connection with Fig. As mentioned in Figure 1, the connection of the PPU 202 to the rest of the computer system 100 can be varied. In some embodiments, the auxiliary processing subsystem 112, which includes at least one PPU 202, is implemented as an add-in card that can be inserted into an expansion slot of the computer system 100. In other embodiments, the PPU 202 can be integrated on a single chip with a bus bridge, such as the memory bridge 105 or the I / O bridge 107. In still other embodiments, some or all elements of the PPU 202 can be present together with the CPU 102 in a single integrated circuit or system of chips (SoC).

[0028] During operation, the front end 212 transmits the processing tasks received from the host interface 206 to a workload distribution unit (not shown) within the task / work unit 207. The workload distribution unit receives pointers to processing tasks, which are encoded as task metadata (TMD) and stored in memory. The pointers to TMDs are contained in an instruction stream, which is stored as a push buffer and received by the front end 212 from the host interface 206. Processing tasks, which can be encoded as TMDs, have indices associated with the data to be processed, as well as state parameters and instructions that define how the data is to be processed. The state parameters and instructions could, for example, define the program to be executed on the data.The task / work unit 207 receives tasks from the front end 212 and ensures that the GPCs 208 are configured to a valid state before initiating the processing tasks specified by the individual TMDs. A priority can be specified for each TMD, which is used to schedule the execution of the processing task. Processing tasks can also be received from the processing cluster array 230. Optionally, the TMDs can have a parameter that controls whether the TMD is added to the head or the end of a list of processing tasks (or to a list of pointers to the processing tasks), thus providing another layer of control over the execution priority.

[0029] The PPU 202 advantageously implements a highly parallel processing architecture based on a processing cluster arrangement 230, which has a set of C general processing clusters (GPCs) 208, where C ≥ 1. Each GPC 208 is capable of executing a large number (e.g., hundreds or thousands) of threads concurrently, with each thread being an instance of a program. In different applications, different GPCs 208 can be allocated for processing different types of programs or for performing different types of computations. The allocation of GPCs 208 can vary depending on the workload associated with each type of program or computation.

[0030] The memory interface 214 has a set of D partition units 215, where D ≥ 1. Each partition unit 215 is coupled to one or more dynamic random-access memory (DRAM) units 220 located in the PP memory 204. In one embodiment, the number of partition units 215 is equal to the number of DRAM units 220, and each partition unit 215 is coupled to a different DRAM unit 220. In other embodiments, the number of partition units 215 may differ from the number of DRAM units 220. It is understood that a DRAM unit 220 can be replaced by any other technically suitable arrangement. During operation, various rendering targets, such as texture maps and frame buffers, can be stored across DRAMs 220, allowing the partition units 215 to write sections of each rendering target in parallel to efficiently utilize the available bandwidth of the PP memory 204.

[0031] A specific GPC 208 can process data to be written to one of the DRAMs 220 within the PP memory 204. The crossbar unit 210 is configured to forward the output of each GPC 208 to the input of any partition unit 215 or to another GPC 208 for further processing. The GPCs 208 communicate with the memory interface 214 via the crossbar unit 210 to read from or write to various DRAMs 220. In one embodiment, the crossbar unit 210 has a connection to the I / O unit 205, in addition to a connection to the PP memory 204 via the memory interface 214, enabling the processing cores within the various GPCs 208 to communicate with the system memory 104 or other memory not belonging to the PPU 202. In the embodiment of the Fig. In 2, the crossbar unit 210 is directly connected to the I / O unit 205. In various embodiments, the crossbar unit 210 can use virtual channels to separate traffic flows between the GPCs 208 and the partition units 215.

[0032] Here too, the GPCs 208 can be programmed to perform processing tasks related to a variety of applications, including but not limited to linear and nonlinear data transformations, filtering of video and / or audio data, modeling operations (e.g., applying physical laws to determine the position, velocity, and other attributes of objects), image rendering operations (e.g., tessellation shader, vertex shader, geometry shader, and / or pixel / fragment shader programs), general arithmetic operations, etc. In operation, the PPU 202 is configured to transfer data from system memory 104 and / or PP memory 204 to one or more on-chip memory units, which process the data and write the resulting data back to system memory 104 and / or PP memory 204.The result data can then be accessed by other system components that have a CPU 102, another PPU 202 within the auxiliary processing subsystem 112, or another auxiliary processing subsystem 112 within the computer system 100.

[0033] As mentioned above, any number of PPUs 202 can be present in an accelerator processing subsystem 112. For example, multiple PPUs 202 can be located on a single add-in card, or multiple add-in cards can be connected via the communication path 113, or one or more of the PPUs 202 can be integrated into a bridge chip. The PPUs 202 in a multi-PPU system can be identical or different from one another. For example, different PPUs 202 can have a different number of processor cores and / or different amounts of PP memory 204. In implementations where multiple PPUs 202 are present, these PPUs can be operated in parallel to process data at a higher throughput than is possible with a single PPU 202.Systems containing one or more PPUs 202 can be implemented in a variety of configurations and form factors, including without limitation desktops, laptops, portable personal computers or other portable devices, servers, workstations, game consoles, embedded systems and the like.

[0034] Fig. Figure 3 is a block diagram of a general processing cluster (GPC) 208, which is located in the parallel processing unit (PPU) 202 of Fig. 2 according to various embodiments. In operation, the GPC 208 can be configured to execute a large number of threads in parallel to perform graphics, general processing, and / or computational operations. As used herein, a "thread" refers to an instance of a particular program running with a specific set of input data. Some embodiments employ Single-Instruction, Multiple-Data (SIMD) instruction output methods to support the parallel execution of a large number of threads without providing multiple independent instruction units.In other implementations, SIMT (Single-Instruction, Multiple-Thread) methods are used to support the parallel execution of a large number of generally synchronized threads, employing a common instruction unit configured to issue instructions to a number of processing engines within GPC 208. Unlike a SIMD execution regime, where all processing engines typically execute identical instructions, SIMT execution allows different threads to more easily follow different execution paths through a given program. A person skilled in the art understands that a SIMD processing regime is a functional subset of a SIMT processing regime.

[0035] The operation of the GPC 208 is controlled by a pipeline manager 305, which distributes the processing tasks received from a work distribution unit (not shown) within the task / work unit 207 to one or more streaming multiprocessors (SMs) 310. The pipeline manager 305 can also be configured to control a work distribution crossbar 330 by specifying destinations for processed data output by the SMs 310.

[0036] In one embodiment, the GPC 208 has a set of M SMs 310, where M ≥ 1. Each SM 310 also has a set of functional execution units (not shown), such as execution units and load memory units. Processing operations specific to each of the functional execution units can be grouped in a pipeline so that a new instruction can be issued for execution before a previous instruction has completed its execution. Any combination of functional execution units within a given SM 310 can be provided. In various embodiments, the functional execution units can be configured to support a variety of different operations, including integer and floating-point arithmetic (e.g., addition and multiplication), comparison operations, Boolean operations (e.g.,AND, OR, XOR), bit shifting and the calculation of various algebraic functions (e.g. planar interpolation and trigonometric, exponential and logarithmic functions, etc.). Advantageously, one and the same functional execution unit can be designed to perform different operations.

[0037] In operation, each SM 310 is configured to process one or more thread groups. As used herein, a "thread group" or "warp" refers to a group of threads that simultaneously execute the same program with different input data, with one thread of the group being assigned to a different execution unit within an SM 310. A thread group can have fewer threads than the number of execution units within the SM 310; in this case, part of the execution may be idle during the cycles in which the thread group is processed. A thread group can also have more threads than the number of execution units within the SM 310; in this case, processing may occur in successive clock cycles. Since each SM 310 can support up to G thread groups concurrently, it follows that up to G*M thread groups can be executed in a GPC 208 at any given time.

[0038] Furthermore, a large number of related thread groups can be active simultaneously in an SM 310 (at different stages of execution). This collection of thread groups is referred to here as a "cooperative thread array" ("CTA") or "thread array." The size of a given CTA is equal to m*k, where k is the number of concurrently executing threads in a thread group, which is typically an integer multiple of the number of execution units within the SM 310, and m is the number of concurrently active thread groups within the SM 310. In various implementations, a software application written in the CUDA (Compute Unified Device Architecture) programming language describes the behavior and operation of threads running on the GPC 208, including the behaviors and operations described above.A given processing task can be specified in a CUDA program, so that the SM 310 can be designed to perform and / or manage multi-purpose computing operations.

[0039] Although in Fig. Not shown in Figure 3, each SM 310 contains a Level 1 cache (L1 cache) or uses space in a corresponding L1 cache outside the SM 310 to support, among other things, load and store operations performed by the execution units. Each SM 310 also has access to Level 2 caches (L2) (not shown) shared by all GPCs 208 in the PPU 202. The L2 caches can be used to transfer data between threads. Finally, the SMs 310 also have access to the "global" memory outside the chip, which may include PP memory 204 and / or system memory 104. It is understood that any memory outside the PPU 202 can be used as global memory. Additionally, as shown in Figure 3, the SMs 310 can also be used as global memory. Fig. Figure 3 shows an L1.5 cache 335 present in the GPC 208 and configured to receive and hold data requested from memory by the SM 310 via the memory interface 214. Such data can include instructions, uniform data, and constant data. In embodiments with multiple SMs 310 within the GPC 208, the SMs 310 can advantageously utilize common instructions and data cached in the L1.5 cache 335.

[0040] Each GPC 208 can have an associated memory management unit (MMU) 320, configured to map virtual addresses to physical addresses. In various embodiments, the MMU 320 can be located either within the GPC 208 or in the memory interface 214. The MMU 320 includes a set of page table entries (PTEs) used to map a virtual address to a physical address of a tile or memory page, and optionally to a cache row index. The MMU 320 can include address translation lookaside buffers (TLBs) or caches, which may be located in SMs 310, in one or more L1 caches, or within the GPC 208.

[0041] In graphics and computing applications, the GPC 208 can be configured so that each SM 310 is coupled with a texture unit 315 to perform texture mapping operations, such as determining texture sampling positions, reading texture data, and filtering texture data.

[0042] In operation, each SM 310 transfers a processed task to the work-distribution crossbar 330 to make the processed task available to another GPC 208 for further processing or to store the processed task in an L2 cache (not shown), a PP memory 204, or a system memory 104 via the crossbar unit 210. In addition, a pre-raster operations (preROP) unit 325 is configured to receive data from the SM 310, forward data to one or more raster operations (ROP) units within the partition units 215, perform color mixing optimizations, organize pixel color data, and perform address translations.

[0043] It is clear that the core architecture described here is illustrative and that variations and modifications are possible. Among other things, any number of processing units, such as SMs 310, texture units 315, or preROP units 325, can be included in the GPC 208. Furthermore, the PPU 202, as described above in conjunction with Fig. 2 described, comprising any number of GPCs 208 configured to be functionally similar to one another, such that the execution behavior does not depend on which GPC 208 receives a particular processing task. Furthermore, each GPC 208 operates independently of the other GPCs 208 in the PPU 202 to execute tasks for one or more application programs. In light of the foregoing, the person skilled in the art understands that the Fig. The architecture described in 1-3 does not in any way limit the scope of the various embodiments of the present disclosure.

[0044] It should be noted that references to shared memory, as used here, may include one or more technically possible memories, including, without limitation, local memory shared by one or more SMs 310, or memory accessible via memory interface 214, such as cache memory, PP memory 204, or system memory 104. It should also be noted that references to cache memory, as used here, may include one or more technically feasible memories, including, but not limited to, an L1 cache, an L1.5 cache, and the L2 caches. Performing hardware-assisted weighted prediction coding with software-generated weighting prediction parameters on a media image

[0045] Several embodiments include a video encoder that generates weight prediction parameters for a media frame and applies these parameters to blocks contained within that frame. The weight prediction parameters correct large frame-to-frame luminance variations across a series of media frames. In some embodiments, a controller executes instructions to generate the weight prediction parameters, and dedicated hardware components within the video encoder apply them to the blocks of the media frame. To generate the weight prediction parameters, the controller determines the mean and variance of the pixel data for a current media frame and a reference media frame from a video stream. The reference media frame can be the preceding and / or the next media frame relative to the current media frame.The controller generates the weight prediction parameters, including denominator parameters, weight prediction parameters, and offset parameters, for the current media image based on the mean and variance. Hardware components in the video encoder apply the weight prediction parameters to perform a weighted prediction for the pixels in each block of the current media image based on the reference media image and the weight prediction parameters. The hardware components generate each pixel value by multiplying the corresponding reference pixel value by the weight and adding the offset. In some embodiments, large luminance changes can affect a region of a media image rather than the entire media image.In such embodiments, the controller can generate different sets of weighting prediction parameters, and the video encoder can apply them to different regions within a media image to further reduce the bit rate and further improve the visual quality of the output bitstream.

[0046] Fig. Figure 4 is a block diagram of a video encoder 400, which is designed to provide encoding data for multiple blocks of a media image for the computer system 100. Fig. 1-3 to produce and process according to different embodiments. As shown, the video encoder 400 without restriction includes a controller 405, a full-pixel search (FPS) unit 410, a sub-pixel search (SPS) unit 415, a motion compensation filter type selection (MCT) unit 420, a rate distortion optimization (RDO) unit 425, a reconstruction (recon) unit 430, a filter 435, an entropy encoder 440, an intermediate link 445, a pixel direct memory access (DMA) unit 450, a read collocated motion vector (RCOL) unit 455, an external motion vector hint (RHINT) DMA unit 457, and a motion vector predictor (RHINT) unit 457.(Read Motion Vector Predictor) RMVP unit 459, a cache memory (Cache) 460, a mode decision processor (MDP) 465, a multimedia pipeline encoder B (MPEB) unit 466, a multimedia pipeline encoder C (MPEC) unit 467, a history (HIST) unit 470, a motion estimation DMA (MEDMA) unit 475, a motion vector predictor (Write Motion Vector Predictor) WMVP unit 477, and a frame buffer interface (FB-I / F) 480.

[0047] Various units of the 400 video encoder communicate with each other via the intermediate connection 445. These various units include the FPS unit 410, the SPS unit 415, the MCT unit 420, the RDO unit 425, the RCOL unit 455, the RHINT unit 457, the RMVP unit 459, the cache memory 460, the MDP unit 465, the MPEB unit 466, the MPEC unit 467, the history unit 470, the MEDMA unit 475, the WMVP unit 477, and / or the like. The intermediate connection 445 can contain any suitable interconnect bus, any suitable network, any suitable point-to-point connection, and / or the like for transmitting and receiving data between and among these units of the 400 video encoder.

[0048] The Video Encoder 400 can be configured to encode video according to any one or more video encoding formats. In some embodiments, the Video Encoder 400 can encode a video stream compatible with the Advanced Video Coding (AVC) format, also known as the H.264 format or the Motion Picture Experts Group 4 (MPEG-4) Part 10 format. Additionally or alternatively, the Video Encoder 400 can encode a video stream compatible with the High Efficiency Video Coding (HEVC) format, also known as the H.265 format or the Motion Picture Experts Group High Efficiency (MPEG-H) Part 2 format. Additionally or alternatively, the Video Encoder 400 can encode a video stream compatible with the Video Compression 9 (VP9) format and / or the Alliance for Open Media (AOMedia) Video 1 (AV1) format.Additionally or alternatively, the Video Encoder 400, as is and / or with minor modification, can encode a video stream compatible with any other technically feasible video coding format, including, but not limited to, Motion Joint Pictures Experts Group (JPEG) 2000 (MJ2), MPEG-2 or H.262, H.263v2 or H.263+, Video Coding 1 (VC-1 or SMPTE 421), Versatile Video Coding (VVC or H.266), VP8, VP10 and / or the like.

[0049] In some embodiments, certain units of the Video Encoder 400 may be general-purpose coding units that support operations for encoding a video into multiple encoding formats. Additionally or alternatively, certain units of the Video Encoder 400 may be format-specific encoding units that support operations for encoding a video into a single encoding format or into two or three related encoding formats. For example, general-purpose encoding units of the Video Encoder 400 may include, among others, the FPS unit 410, the SPS unit 415, the MCT unit 420, the PDMA unit 450, the RCOL unit 455, the RHINT unit 457, the RMVP unit 459, the cache memory 460, the MEDMA unit 475, the WMVP unit 477, and / or the like. Additionally or alternatively, format-specific coding units of the Video Encoder 400 can be used, which perform operations for encoding a video into an H.264 format and / or an H.Supporting the 265 format, including, but not limited to, the MDP unit 465, the MPEB unit 466, the MPEC unit 467, the history unit 470, and / or similar components. Additionally or alternatively, format-specific coding units of the video encoder 400, supporting operations for encoding video into AV1 and / or VP9 formats, may include, but not limited to, the RDO unit 425, the reconstruction unit 430, the filter 435, the entropy encoder 440, and / or similar components.

[0050] In operation, the Controller 405 encodes media images into a video stream in conjunction with other units and / or components of the Video Encoder 400. The Controller 405 may contain any one of one or more processors capable of executing instructions, including, but not limited to, a microcontroller, a RISC processor, a CPU, a PPU, a GPU, a DMA unit, an IPU, a NAU, a TPU, an NNP, a DPU, a VPU, an ASIC, an FPGA, and / or the like. The Controller 405 may include memory for storing instructions that can program the Controller 405 to perform various operations described herein. The Controller 405 may also include memory for storing data associated with these operations.In this respect, the CPU 102, the auxiliary processing subsystem 112, and / or similar components can store instructions and / or data in the memory of the controller 405 via the memory bridge 105 and the communication path 113. Similarly, the controller 405 can communicate with the memory bridge 105 via the communication path 113. Through the memory bridge 105, the controller 405 can communicate with various other units and / or components of the computer system 100.

[0051] Furthermore, the controller 405 can communicate with various units and / or components of the video encoder 400, including, but not limited to, the FPS unit 410, the SPS unit 415, the MCT unit 420, the RDO unit 425, the reconstruction unit 430, the filter 435, the entropy encoder 440, and / or similar components. The controller 405 can configure one or more of the video encoder 400 units. It can also control the execution and operation of one or more of the video encoder 400 units, including various operations for encoding media images from a video stream. The controller 405 can receive data from the video encoder 400 units resulting from these various operations.

[0052] Media images can be divided into block rows, with each block row containing a set of blocks extending from the left edge to the right edge of the media image. Depending on the format used by the Video Encoder 400, the blocks may be referred to as macroblocks, coding tree units (CTUs), coding tree blocks (CTBs), superblocks, and / or the like. In some embodiments, the Video Encoder 400 encodes a video stream in an H.264 format, with media images divided into 16 × 16-pixel macroblocks. In some embodiments, the Video Encoder 400 encodes a video stream in an HEVC format, with media images divided into 32 × 32-pixel coding tree blocks. In some embodiments, the 400 video encoder encodes a video stream in an AV1 format, with media images subdivided into 64 × 64 pixel superblocks.In various formats, including HEVC, AV1, and / or the like, the video encoder generates 400 predictions or indications of a coding unit granularity. In some embodiments, a coding unit is a square pixel block of various sizes, including, but not limited to, 16 × 16 pixel coding units, 32 × 32 pixel coding units, 64 × 64 pixel coding units, and / or the like. In various formats, including HEVC, AV1, and / or the like, the video encoder generates 400 predictions or indications of a prediction unit granularity. In some embodiments, a prediction unit is a rectangular pixel block of various sizes, including, but not limited to, 8 × 16-pixel prediction units, 16 × 8-pixel prediction units, 16 × 32-pixel prediction units, 32 × 16-pixel prediction units and / or the like.In some embodiments, a prediction unit is a square pixel block of various sizes, including, but not limited to, 16 × 16 pixel prediction units, 32 × 32 pixel prediction units, 64 × 64 pixel prediction units and / or the like.

[0053] The controller 405, in conjunction with other units and / or components of the video encoder 400, can control various operations for generating inter-frame candidates for media frames of a video stream. To generate an inter-frame candidate, the controller 405 performs motion estimation and / or motion compensation for a block contained within a media frame of the video stream. The controller 405 performs motion estimation and / or motion compensation to generate an inter-frame candidate for the specified block based on the temporal redundancy between media frames. Specifically, the controller 405 performs a full-pixel search in conjunction with the FPS unit 410 and / or a subpixel search in conjunction with the SPS unit 415.Control 405 performs one or both of these searches by scanning a reference media image, such as the preceding and / or the next media image, for blocks that match corresponding blocks in the current media image being encoded. A block in the reference media image matches the block in the current media image if the pixel data of the block in the reference media image is the same as, or very similar to, the pixel data of the block in the current media image. The matching block is the block in the reference media image with pixel data that most closely matches the pixel data of the block in the current media image.If the objects in the scene have not moved and the camera view has not changed between the reference media image and the current media image, then the position of the current block within the current media image can be the same as the position of the corresponding block in the reference media image. However, if the objects in the scene have moved and / or the camera view has changed between the reference media image and the current media image, then the position of the current block within the current media image can differ from the position of the corresponding block in the reference media image. Control 405 generates a motion vector for the current block in the current media image that identifies the position of the corresponding block in the reference media image.Motion compensation predicts the pixels of a current media frame based on a previous and / or the next media frame by determining effects caused by the movement of the camera recording the video stream and / or the movement of objects within the scene being recorded by the camera. Control 405 generates difference data, also known as residuals, which specify the differences between the pixel data of the matching block in the reference media frame and the pixel data of the current block in the current media frame. The greater the similarity between the pixel data of the block in the reference media frame and the pixel data of the current block, the smaller the amount of difference data, resulting in lower inter-frame costs.Conversely, the lower the similarity of the pixel data of the block in the reference media image to the pixel data of the current block, the greater the amount of difference data, leading to high inter-image costs.

[0054] The 405 controller generates a motion vector for the current block, which predicts the block of the current media frame from the corresponding block of a reference media frame. The 405 controller, in conjunction with other units and / or components of the 400 video encoder, generates motion vector prediction data, also called motion vector hint data or simply hint data, for each media frame. This hint data includes forward prediction hint data and backward prediction hint data. The 405 controller generates forward prediction hint data based on block data for a current block and block data for a corresponding block of the preceding media frame. Similarly, the 405 controller generates backward prediction hint data based on block data for the current block and block data for a corresponding block of the next media frame.The 400 video encoder can use the motion vector data as an inter-image candidate. Based on the motion vector data, the 405 controller generates motion-compensated pixels for the inter-image candidate.

[0055] Depending on the currently used encoding format, the controller 405 transmits motion vector data and / or pixel block data to the MDP unit 465, the MPEB unit 466, and / or the MCT unit 420. When encoding in certain formats, such as BH264, H.265, and / or similar, the controller 405 transmits motion vector data and / or pixel block data to the MDP unit 465 and the MPEB unit 466. When encoding in certain other formats, such as AV1 and / or similar, the controller 405 transmits motion vector data and / or pixel block data to the MCT unit 420.

[0056] Furthermore, the controller 405, in conjunction with other units of the video encoder 400, can control various operations for generating intra-frame candidates for media frames of a video stream. To generate an intra-frame candidate, the controller 405 performs an intra-frame estimation and / or an intra-frame prediction to generate an intra-frame candidate for the specified block based on the spatial redundancy within a media frame.

[0057] To perform intra-image estimation, the controller 405 selects an intra-image prediction mode based on the current pixels in the current media image and the neighboring pixels of the reconstructed current media image. In some embodiments, the controller 405 can select the intra-image prediction mode that best predicts the pixels of the current block. The controller 405 can select the intra-image prediction mode that yields the lowest rate distortion cost based on the distortion determined by the rate distortion optimization unit 425 for the current block in the form of the sum of square errors (SSE). The number and type of available prediction modes can vary based on the block size.For example, the number and type of available prediction modes can differ for 4 × 4 pixel blocks, 8 × 8 pixel blocks, 16 × 16 pixel blocks, 32 × 32 pixel blocks, and / or the like. In this respect, the controller 405 can select different intra-image prediction modes for each of the possible block sizes based on which intra-image prediction mode yields the lowest rate distortion cost value, as determined by the rate distortion optimization unit 425 for that block size. Furthermore, the controller 405 can select different intra-image prediction modes for the luma values ​​in the block compared to the chroma sample values ​​in the block. In some embodiments, the intra-image prediction mode determines the order in which the pixels in the current block are sampled to generate the predicted intra-image candidate.For example, the intra-image prediction mode can specify vertical scanning, horizontal scanning, diagonal scanning down left, diagonal scanning down right, vertical scanning left, vertical scanning right, horizontal scanning down, horizontal scanning up and / or the like.

[0058] To perform intra-image prediction, the 405 controller generates an intra-image candidate based on the selected intra-image prediction mode. The 405 controller samples the pixel values ​​in the current block in the order specified by the selected intra-image prediction mode. For each sampled pixel, the 405 controller determines a predicted pixel value based on the differences between that pixel value and the pixel values ​​of neighboring pixels. From these predicted pixel values, the 405 controller generates the intra-image candidate.

[0059] The 405 controller uses various other units contained within the 400 video encoder to perform the operations described herein. Specifically, the 405 controller uses the 410 FPS unit to perform full-pixel motion estimation. The 410 FPS unit performs a full-pixel search using integer pixel addresses to generate motion estimation data between pixels of a current media frame and corresponding pixels of a previous and / or next media frame on a pixel-by-pixel basis. Similarly, the 405 controller uses the 415 SPS unit to perform subpixel motion estimation.The PLC unit 415 performs a subpixel search using fractional-pixel addresses to generate motion estimation data between subpixels of a current media image and corresponding subpixels of a previous and / or next media image on a subpixel-by-subpixel basis. Each subpixel can be half the size of a full pixel, a quarter the size of a full pixel, and / or the like.

[0060] The controller 405 uses the MCT unit 420 to perform motion compensation. The MCT unit 420 selects a filter type for motion compensation prediction. Specifically, the MCT unit 420 selects a motion compensation filter type to account for subpixel interpolation resulting from fractional motion vectors. Subpixels can be determined by filtering full pixels and full-pixel motion vectors. Motion compensation filter types can include bicubic filtering, bilateral filtering, and / or similar methods.

[0061] The RCOL unit 455 reads colocated motion vector data, i.e., data located at the same spatial position, from memory and stores this colocated motion vector data in memory for access during motion estimation and / or other coding operations. This colocated motion vector data for a previous media image is written to memory beforehand by the MPEC unit 467.

[0062] The RMVP unit 459 reads motion vector prediction data, also known as motion vector hint data, from memory. This motion vector hint data is further processed in conjunction with the Fig. 6A-7B described. In some embodiments, this motion vector guidance data is previously written to memory by the WMVP unit 477.

[0063] The MDP unit 465 determines the mode for encoding each block of the media image. Possible modes include inter-image mode, intra-image mode, and / or the like. In some embodiments, the MDP unit 465 encodes the current block according to several encoding modes and selects the mode that results in the lowest cost, with the lowest cost being determined by the smallest amount of residual data for the block. The MDP unit 465 makes the final selection from among all candidates from the motion estimation, determines the optimal partitioning for inter-image encoding, and makes the final selection between inter-image and intra-image encoding. Furthermore, the MDP unit 465 can generate motion estimation result data, motion compensation result data, and / or the like.

[0064] The MPEB unit 466 performs and / or supports various functions for the video encoder 400. These functions may include, but are not limited to, intra-frame prediction, block size search and / or sub-block size search, reconstruction, deblocking filtering, sampling adaptive offset (SAO) filtering, and / or similar functions. Furthermore, these functions may include, but are not limited to, the transformation, quantization, inverse quantization, and inverse transformation described herein.

[0065] The MPEC unit 467 performs and / or supports various functions for the video encoder 400. These functions may include, among others, certain entropy coding modes, such as context-adaptive variable length coding (CAVLC), context-based adaptive binary arithmetic coding (CABAC), and / or the like.

[0066] The history unit 470 stores data in memory and loads data from memory, including spatial clues, intra-frame predictions, SAO filter data, and entropy coding data for the current block row and / or the preceding block row encoded by the video encoder 400. The history unit 470 can receive data from processed blocks in a block row, which is accessed again during the encoding of blocks in the next block row. Consequently, different units of the video encoder 400 can access data for adjacent blocks in the block row above the current block row being encoded.

[0067] The WMVP unit 477 writes motion vector prediction data, also known as motion vector hint data, to memory for each media frame. This motion vector hint data is further used in conjunction with the Fig. 6A-7B described. This motion vector cue data can be used as cue data when the video encoder 400 encodes the following media images. The RMVP unit 459 can read this motion vector cue data from memory.

[0068] The Rate Distortion Optimization Unit 425 performs rate distortion optimization on the blocks contained in a media frame of the video stream. The Rate Distortion Optimization Unit 425 selects a winning candidate for a block from between the inter-frame candidate for that block and the intra-frame candidate for that block. The Rate Distortion Optimization Unit 425 selects the winning candidate partly based on a predicted importance score generated from forward prediction clue data and backward prediction clue data. The Rate Distortion Optimization Unit 425 also receives the reconstructed pixels of the block in the reconstructed current media frame from the Reconstruction Unit 430 via the feedback loop from the Reconstruction Unit to the FPS Unit 410.Based on the reconstructed pixels of the block in the reconstructed current media image, the rate distortion optimization unit 425 determines a rate distortion cost value based on the sum of squared errors (SSE), or distortion, for the current block. The rate distortion optimization unit 425 selects the winning candidate, at least in part, based on the rate distortion cost value for the current block, which is determined by the inter-image cost value and the intra-image cost value. In some embodiments, the rate distortion optimization unit 425 further performs a transformation operation and / or a quantization operation on the block as part of the encoding procedure. The rate distortion optimization unit 425 can also determine various mode selections, including, but not limited to, block size and / or type selection, transformation size and / or type selection, and / or the like.

[0069] Reconstruction Unit 430 performs image reconstruction for the blocks contained in a media frame of the video stream, based on mode selection results received from Rate Distortion Optimization Unit 425. Reconstruction Unit 430 performs image reconstruction on frequency coefficients that were previously transformed and quantized during the encoding process. Reconstruction Unit 430 performs an inverse quantization function to reverse the quantization previously performed on the block. Reconstruction Unit 430 also performs an inverse transformation function to reverse the transformation previously performed on the block. In doing so, Reconstruction Unit 430 produces reconstructed residual data.The Reconstruction Unit 430 sums the reconstructed residual data with the winning candidate generated by the Rate Distortion Optimization Unit 425 to produce the Reconstructed Current Image Block. The Reconstructed Current Image Block is a proxy of the corresponding block of the media image that a video decoder produces when the video stream generated by the video encoder 400 is decoded. In some embodiments, the Reconstruction Unit 430 can improve the visual quality of the video stream by performing a secondary type search and / or size search for inter-image coding. The Reconstruction Unit 430 can also improve the visual quality of the video stream by performing an intra-image coding mode search based on accurate neighbor pixel data.

[0070] Filter 435 performs one or more filtering operations on the blocks contained in a media frame of the video stream. These operations may include deblocking filtering, sampling adaptive offset filtering, and / or similar processes. With deblocking filtering, Filter 435 improves the visual quality of the reconstructed current block of the media frame by smoothing the sharp edges resulting from the transformation and / or quantization performed by the rate distortion optimization unit 425 during encoding, followed by the inverse quantization and / or inverse transformation performed by the reconstruction unit 430 during reconstruction.With Sampling Adaptive Offset Filtering, Filter 435 further filters the reconstructed current block of the media image by selectively adding offsets to the pixel values ​​of the reconstructed current block of the media image based on the pixel value of a given pixel and / or the pixel values ​​of one or more neighboring pixels.

[0071] The entropy encoder 440 generates the final coded bitstream for the video encoder 400 from the coded blocks produced by the filter 435. In some embodiments, the entropy encoder 440 generates the final coded bitstream, that is, the output video stream, using a lossless compression method. Additionally or alternatively, the entropy encoder 440 generates the final coded bitstream using a lossless compression method. The entropy encoder 440 encodes the blocks of a media image sequentially in a raster sampling order. The entropy encoder 440 waits until the final winning candidate data for each sequential block has been generated before encoding the bitstream for that block. In this way, the entropy encoder 440 encodes the blocks of each block row of the image sequentially and individually in the raster sampling order.In raster sampling order, the entropy encoder 440 encodes blocks in each block row of the media image from left to right and encodes the block rows of the media image from top to bottom. When the entropy encoder 440 has completed encoding the blocks in each media image, it stores the encoded blocks at a suitable position in the image buffer memory via the image buffer interface 480.

[0072] The Video Encoder 400 contains various memory-related units and / or components, including DMA engines and the cache memory 460. The DMA engines, such as the PDMA unit 450, the RHINT unit 457, and the MEDMA unit 475, can perform block copies of data and / or instructions from one location in memory to another. More specifically, the DMA engines can copy a block of data and / or instructions within a given memory location or between one memory location and another. Therefore, the DMA engines can copy a block of data and / or instructions within or between one or more shared memory locations, such as PP memory 204, system memory 104, and / or the like.

[0073] Specifically, the PDMA unit 450 is a pixel DMA unit that loads original media image data from memory. The PDMA unit 450 can buffer multiple blocks of the original media image pixel data for motion estimation operations and for the MPEC unit 467. The PDMA unit 450 stores this original media image data in local memory for access by the FPS unit 410 and / or other units and components of the video encoder 400. The RHINT unit 457 loads external motion vector hint data from memory. The RHINT unit 457 stores this external motion vector hint data in local memory for access by the FPS unit 410 and / or other units and components of the video encoder 400. The MEDMA unit 475 stores data generated by the MDP unit 465 in memory.In particular, the MEDMA unit 475 can store motion estimation result data, motion compensation result data, original pixel data and / or the like in a dedicated MEDMA buffer in memory.

[0074] Cache 460 can store short-term data and / or commands that have recently been accessed, or are predicted to be accessed soon, by various units and / or components of the video encoder 400. These units include, but are not limited to, the FPS unit 410, the SPS unit 415, the MCT unit 420, and / or the like. In particular, cache 460 can store reference pixels contained in reference media images for the units of the video encoder 400. The data and / or commands stored in cache 460 may be copies of data and / or commands stored in other memory, including, but not limited to, shared memory, PP memory 204, system memory 104, and / or the like.Typically, the access times to load data from and / or store data in the cache memory 460 are lower than the times to load data from and / or store data in these other memories.

[0075] The video encoder units and / or components can access the video buffer memory (not shown) via the video buffer interface 480. The video buffer memory can be a special memory for storing image data or it can be a section of another memory, including, without limitation, the PP memory 204, the system memory 104, and / or the like. In some embodiments, the video buffer interface 480 can support data write operations from video encoder units 400 to the memory simultaneously with data read operations from the video encoder 400's memory.

[0076] In some embodiments, the video encoder 400 can include feedback loops from a later stage to an earlier stage. For example, the visual quality of the output video stream can be improved by a feedback loop from the rate distortion optimization unit 425 to the FPS unit 410, and via the FPS unit 410 to the SPS unit 415 and the MCT unit 420. With such a feedback loop, the FPS unit 410, the SPS unit 415, and the MCT unit 420 can generate motion vector data for the current block in order to generate the motion vector for the next block. In this way, the video encoder 400 can generate a motion vector for the current block based on pixel data from the current block, as well as the motion vector from the preceding block and / or the motion vector from the next block, resulting in improved motion estimation.This improved motion estimation can in turn lead to improved motion compensation.

[0077] In some embodiments, various components of the 400 video encoder can perform weighted prediction to adjust blocks of the reference media image to have the same or substantially the same luminance and chrominance as blocks of the current media image. Weighted prediction can improve the prediction accuracy of inter-image candidates and can lead to the identification of suitable blocks in the reference media image with a higher temporal correlation and a correspondingly lower inter-image cost compared to conventional approaches that do not perform weighted prediction.

[0078] To perform weighted prediction, the Video Encoder 400 uses a combination of software instructions executed on the Controller 405 to perform certain operations, and various hardware components of the Video Encoder 400 perform certain other operations. The Controller 405 determines variances and means for the current media frame and for one or more reference media frames. More specifically, the Controller 405 determines the mean. enc ) of the pixel values ​​of a current media image, which is encoded by determining the arithmetic mean pixel value of the pixel values ​​in the current media image. Control 405 determines the variance (var enc) of the pixel values ​​of the current media image, which is encoded by determining, for each pixel, the difference between the pixel value and the mean, calculating the square of each difference, summing the squares of the differences, and dividing the sum by the number of pixels in the current media image. Similarly, control 405 determines the mean (mean). ref ) the pixel values ​​of one or more reference media images and the variance (var ref) the pixel values ​​of one or more reference media images. When the 405 controller performs a forward inter-image prediction, the reference media image is the media image preceding the current media image. When the 405 controller performs a backward inter-image prediction, the reference media image is the media image following the current media image or one media image after the current media image. When the 405 controller performs a two-way inter-image prediction, it uses two reference media images: the preceding media image (for forward prediction) and the next media image (for backward prediction). When the 405 controller performs a two-way prediction, it determines the forward prediction mean. refL0 ) and the forward forecast variance (var refL0 ) and the backward forecast mean (mean) refL1 ) and the backward forecast variance (var refL1 ).

[0079] Based on these means and variances, the controller 405 determines various weight prediction parameters, including, but not limited to, a denominator, a weight, and a shift or offset. To determine these weight prediction parameters, the controller 405 further determines a scale parameter according to the following equation (1): scale=sqrt(varencvarref) where var enc The variance of the pixel values ​​of the current media image is var. ref The variance of the pixel values ​​of the reference media image(s) is , and sqrt is the square root function. When bidirectional prediction is performed, control 405 determines the forward prediction scaling parameter (scale). L0 ) and the backward prediction scaling parameter (scale L1Based on the scaling parameter, the controller 405 determines a denominator parameter (denom) according to the following equation (2): denom=⌊log2(127scale)⌋ where log2 is the logarithm function to base two, and ⌊ ⌋ The floor function is an integer. When a bidirectional prediction is performed, and / or in other cases where there are multiple reference media images, control 405 determines a variance (var). ref) for each reference media image contained within the multiple reference media images. Based on these variances, the controller 405 determines a corresponding scale parameter according to equation (1) above. The controller 405 selects the scale parameter with the maximum scale value. Using this largest scale parameter, the controller 405 determines the denominator parameter according to equation (2) above. Based on the scale parameter and the denominator parameter, the controller 405 determines a weight prediction parameter according to equation (3) below: weight=⌊2denom∗scale+0.5⌋

[0080] Furthermore, the controller 405 determines an offset parameter. If a bidirectional forecast is performed, the controller 405 determines the forward forecast weighting forecast parameter. L0) and the backward prediction weighting prediction parameter (weight L1 The controller determines the offset parameter according to the following equation (4): offset=meanenc−(meanref∗weight1< <denom) where << is the left shift function that shifts the first parameter (the binary 1 in equation (4)) to the left by denom places. When bidirectional prediction is performed, the controller 405 determines the forward prediction offset parameter. L0 ) and the backward prediction offset parameter (offset L1 ).

[0081] The controller 405 transmits the denominator parameter(s), the weight prediction parameter(s), and the offset parameter(s) to units of the video encoder 400, which perform a weight prediction for the pixels of the current media image based on these weight prediction parameters. The controller 405 can transmit the weight prediction parameters to the video encoder 400 by any technically feasible method, including, but not limited to, storing the weight prediction parameters in hardware registers contained in one or more units of the video encoder 400, storing the weight prediction parameters in the cache memory 460, storing the weight prediction parameters in a shared memory, storing the weight prediction parameters in the frame buffer memory, and / or the like.

[0082] As described herein, the controller 405 determines parameters, including the scaling parameters, denominator parameters, weight prediction parameters, and offset parameters on a frame-by-frame basis. The video encoder 400 units apply these media-frame-based parameters to the pixels of the current media frame on a block-by-block and / or pixel-by-pixel basis. Before applying the weight prediction parameters to the pixels of the current media frame, the video encoder 400 uses motion vector data described herein to locate a reference block in the reference media frame and generate inter-predicted pixel samples (predsamples) for the current media frame. These inter-predicted pixel samples can be forward-predicted, backward-predicted, or bidirectionally predicted pixel samples.If the motion vector data contains subpixels, the Video Encoder 400 performs subpixel interpolation on the forward-interpredicted pixel samples and / or the backward-interpredicted pixel samples. When the Video Encoder 400 performs forward or backward prediction, it determines weighted prediction samples (WpSamples) for the current block of the current media frame according to equation (5a) below. WpSample=((PredSample∗weight+2denom−1)>>denom)+offset where >> is the rightward shift function that shifts the first parameter to the right by denom places.

[0083] In some embodiments, the video encoder 400 can apply a limit to prevent underflow or overflow resulting from applying equation (5a) to the weighted prediction samples. The video encoder 400 can apply a limit or clipping to the forward-predicted or backward-predicted weighted prediction samples (WpSamples) according to equation (5b) below: ClippedWpSample=Clip3(0,(1< <BitDepth)−1,WpSample) where BitDepth is the number of bits to represent each weighted prediction sample, and Clip3 is a three-parameter limiting function that limits the value of the third parameter to a minimum set by the first parameter and a maximum set by the second parameter. As shown, the Clip3 function limits each weighted prediction sample (WpSamples) to a minimum of 0 (all bits are zero) and a maximum of (1 « BitDepth) - 1 (all bits are one).

[0084] When the Video Encoder 400 performs bidirectional prediction, before applying the weighted prediction parameters to the pixels of the current media image, the Video Encoder 400 uses the motion vector data described herein to locate reference blocks in the reference media images and generate forward-interpredicted pixel samples (PredSampleL0s) and backward-interpredicted pixel samples (PredSampleL1s) for the current media image. If the motion vector data contains subpixels, the Video Encoder 400 performs subpixel interpolation on the forward-interpredicted pixel samples and the backward-interpredicted pixel samples. Based on these bidirectionally predicted pixel samples, the Video Encoder 400 determines weighted prediction samples (WpSamples) for the current block of the current media image according to equation (6) below: WpSample=(PredSampleL0∗weightL0+PredSampleL1∗weightL1+((offsetL0+offsetL1+1)<<denom))>>(denom+1)

[0085] As described in connection with forward prediction and backward prediction, the video encoder 400 can apply a limit or clipping to the bidirectionally predicted weighted prediction samples to prevent underflow or overflow according to equation (5b) above. In some embodiments, the controller 405 determines that more than two reference media images exist for a given current media image. In such embodiments, the controller 405 determines a variance parameter value, a scaling parameter value, a weighting value, and an offset value for each reference media image. Accordingly, the video encoder 400 can determine weighted prediction samples based on parameters for all reference images and according to an extended version of equation (6) above. Furthermore, the video encoder 400 can apply a limit or clipping to the bidirectionally predicted weighted prediction samples.Apply clipping according to the above equation (5b) to the weighted predicted sample values ​​predicted for multiple reference media images to prevent underflow or overflow.

[0086] The video encoder 400 transmits an output bitstream containing the weighted prediction parameters along with the weighted prediction samples. In some embodiments, the video encoder 400 transmits the output bitstream as a set of disks, each disk containing data for a portion of the current media stream. Each disk may contain a block line, a portion of a block line, and / or multiple block lines in any combination. The data in each disk may include (1) a header section containing the weighted prediction parameters along with other parameters; and (2) a payload section containing the weighted prediction samples. A video decoder can use the weighted prediction parameters to reverse the weighted prediction operations performed on the weighted prediction samples to generate the original inter-predicted pixel samples.The video decoder can then decode the inter-predicted pixel samples according to the encoding format used to encode the inter-predicted pixel samples.

[0087] In some embodiments, the controller 405 generates separate weighting prediction parameters for luminance pixel data and chrominance pixel data contained in the blocks of media images. In this respect, the controller 405 generates a separate and unique luminance mean (Y mean), a red difference chrominance mean (U or Cr mean), and a blue difference chrominance mean (V or Cb mean). Similarly, the controller 405 generates a separate and unique luminance variance, a red difference chrominance variance, and a blue difference chrominance variance. Based on these variances and means, the controller 405 generates separate and unique scaling parameters, weighting prediction parameters, and offset parameters for the luminance, the red difference chrominance, and the blue difference chrominance.In some embodiments, the scaling parameter and the denominator parameter for red difference chrominance and blue difference chrominance can be the same, while the weighting prediction parameter and the offset parameter for red difference chrominance and blue difference chrominance can be different. In such embodiments, the controller 405 generates a first scaling parameter and a first denominator parameter for luminance and a second scaling parameter and a first denominator parameter for chrominance. From these scaling parameters and offset parameters, the controller 405 can generate different weighting prediction parameters and offset parameters for luminance, red difference chrominance, and blue difference chrominance.

[0088] In some embodiments, the parameters contained in the disk head section may include a reference index along with the motion vector cue data. The reference index specifies the position of the weighted reference media image in memory. The reference index can range from 0 to 23, where a reference index in the range of 0 to 15 specifies a standard (unweighted) reference media image and a reference index in the range of 16 to 23 specifies a weighted reference media image. Consequently, in such embodiments, the Video Encoder 400 can hold up to 16 active standard reference media images and up to 8 active weighted reference media images. Furthermore, each reference media image can use different weighting prediction parameters. For example, and without limitation, a reference index of 16 can specify a different reference media image and a different set of weighting prediction parameters than a reference index of 17.

[0089] In some embodiments, a current media image can be divided into multiple regions, each region of the current media image being associated with the same reference media image but with a different set of weight prediction parameters. For example, and without limitation, a reference index of 16 can specify the same reference media image but a different set of weight prediction parameters than a reference index of 17. In this way, the controller 405 can determine different denominator, weight prediction parameters, and offset parameters for each of the different regions. This method can lead to improved visual quality and a reduced bit rate of the output bitstream in cases where the regions have different means and / or variances from each other, but the variance within each region is relatively small.For example, in a video stream illustrating an explosion or bursting, regions of the media image closer to the center of the explosion or bursting may exhibit a relatively large change in luminance from frame to frame, while regions of the media image farther away from the center of the explosion or bursting may exhibit a relatively small change in luminance from frame to frame.

[0090] In embodiments where a reference index in the range of 16 to 23 specifies a weighted reference media image, the video encoder can store up to 8 regions of a current media image. Each of the 8 reference indices from 16 to 23 can specify the same reference media image but one of 8 different sets of weighting prediction parameters. The current media image can be subdivided into regions of equal size, such as square regions, rectangular regions, and / or the like. For example, and without limitation, the current media image can be subdivided into two rows of two square or rectangular regions, three rows of two square or rectangular regions, two rows of four square or rectangular regions, and / or the like. Additionally or alternatively, the current media image can be subdivided into regions of non-equal size of any shape and dimensions.In some embodiments, the video encoder 400 uses a reference image reordering feature to set different reference indices to the same reference media image, but with different weighting prediction parameters. In such embodiments, the video encoder 400 orders the blocks in the current media image according to region. For multi-region applications, the video encoder 400 can include a different reference index and a different weighting parameter in the disk head section for each region. Furthermore, the video encoder 400 can determine motion vector clues for each block, with each motion vector clue pointing to different reference indices corresponding to the region to which the block belongs. Regardless of the size, shape, or number of different regions, the video encoder 400 encodes and transmits the blocks in the same order as when encoding media images that do not use multiple regions.

[0091] The Video Encoder 400 encodes the blocks of each region by selecting the weight prediction parameters for a given region based on the motion vector clue data associated with that region. Each block in the current media image is associated with specific motion vector clue data. The motion vector clue data for the block specifies the reference index for that block, which in turn identifies the region to which the block belongs. For example, and without limitation, the Video Encoder 400 can select the weight prediction parameters for one or more initial blocks contained in an initial region of the current media image using the reference index 16. The Video Encoder 400 can encode the blocks contained in the initial region and insert the encoded blocks for the initial region into the output bitstream along with the motion vector clue data specifying the reference index of 16.The Video Encoder 400 can select the weighting prediction parameters for one or more second blocks contained in a second region of the current media image using reference index 17. The Video Encoder 400 can encode the blocks contained in the second region and insert the encoded blocks for the second region into the output bitstream along with motion vector hint data specifying reference index 17. The Video Encoder 400 can select the weighting prediction parameters for one or more third blocks contained in a third region of the current media image using reference index 18. The Video Encoder 400 can encode the blocks contained in the third region and insert the encoded blocks for the third region into the output bitstream along with motion vector hint data specifying reference index 18, and so on.

[0092] When encoding blocks for a given region, the Video Encoder 400 performs a motion search in a small region of blocks within the reference media image, based on the motion vector clue data for the current block of the current media image. Using the weighted prediction parameters for the reference index specified by the motion vector clue data, the Video Encoder generates weighted predicted sample values ​​for the current block of the current media image. The Video Encoder 400 selects the block within the small region of blocks in the reference media image that has the lowest inter-cost (i.e., the lowest rate distortion cost value).

[0093] In some embodiments, the controller 405 can generate weight prediction parameters for a current media frame in parallel with other components of the video encoder 400 that perform weighted prediction coding on the blocks of the preceding media frame. Because the controller 405 generates weight prediction parameters for the current media frame using original pixel data in luminance-chrominance (YUV) format, the controller 405 does not have to wait for other components of the video encoder 400 to encode the blocks of the current media frame. Consequently, performance can be improved if the controller 405 generates weight prediction parameters for a first media frame and other components of the video encoder 400 perform weighted prediction coding on blocks of a second media frame in parallel.

[0094] In some embodiments, the controller 405 and other components of the video encoder 400 can select to use weighted prediction or no weighted prediction on a frame-by-frame basis. In cases where the motion vector clue data results in lower inter-frame costs when encoding with weighted prediction for the current media frame compared to encoding without weighted prediction, the video encoder 400 can select to encode the current media frame with the weighted prediction. In cases where the motion vector clue data results in higher inter-frame costs when encoding with weighted prediction for the current media frame compared to encoding without weighted prediction, the video encoder 400 can select to encode the current media frame without the weighted prediction.In such embodiments, the parameters in the disk head section may include a parameter for activating weight prediction, which specifies whether the blocks of the current media image are encoded with a weighted prediction (weight prediction enabled) or whether the blocks of the current media image are encoded without a weighted prediction (weight prediction disabled). In such embodiments, one of the reference indices may be reserved to specify a default reference media image. The video encoder 400 encodes the blocks without applying denominator parameters, weight prediction parameters, or offset parameters to the pixels of the blocks of such a media image.

[0095] Fig. Figure 5 illustrates a functional view of a video encoder 500, which generates a media image for the computer system 100. Fig. 1-4 according to various embodiments. The Video Encoder 500 can encode a video stream compatible with the High Efficiency Video Coding (HEVC) standard, also known as the H.265 format or the Motion Picture Experts Group High Efficiency (MPEG-H) Part 2 format. Additionally or alternatively, the Video Encoder 500, as is and / or with minor modifications, can encode a video stream compatible with any other technically feasible video coding standard.

[0096] As shown, the 500 video encoder receives an input media image to be coded. This received media image is designated as the current media image (F n ) 505. The current media image (F n) 505 and other media images processed by the 500 video encoder are divided into multiple blocks. Each block contains a group of adjacent pixels, such as an 8×8 block of pixels, a 16×16 block of pixels, and / or the like. Each block is further divided into partitions, with each partition containing luminance pixels (luma pixels) and / or chrominance pixels (chroma pixels). Luma pixels contain the luma or Y pixel values ​​for the pixels in the block. Chroma pixel values ​​contain the chroma pixel values ​​for the pixels in the block. Chroma pixel values ​​are typically color difference values, also called chrominance difference values, and can be of two types: (1) red difference pixel values ​​(U- or C-) r -pixel values); and (2) blue difference pixel values ​​(V- or C- b -pixel values).

[0097] The Video Encoder 500 also includes a media image reconstructed based on the previously received and encoded media image. This reconstructed media image is called the reference media image (F'). n-1 ) 510. Based on the current pixels in the current media image (F n ) 505 and on the reference pixels in the reference media image (F' n-1The Motion Estimator (ME) 510 generates a motion vector for the current block, predicting the block of the current media frame from the corresponding block of the reference media frame. The reference media frame can be a previous media frame and / or a next media frame. The Video Encoder 500 can use the motion vector as an inter-frame candidate. The Motion Estimator 515 passes the inter-frame candidate to the Motion Compensation Unit (MC) 520. The Motion Compensation Unit 520 generates motion-compensated pixels for the inter-frame candidate. The Motion Compensation Unit 520 passes the motion-compensated pixels for the inter-frame candidate to the "Inter" input of the Selector 525.

[0098] Additionally, the intra-image estimation unit selects 570 based on the current pixels in the current media image (F n) 505 and on the adjacent pixels of the reconstructed current media image uF' nThe data received by the summing unit 565 selects an intra-image prediction mode. In some embodiments, the intra-image estimating unit 570 can select the intra-image prediction mode that best predicts the pixels of the current block. The intra-image estimating unit 570 can select the intra-image prediction mode that yields the lowest rate distortion cost based on the distortion determined by the rate distortion optimization unit of the selector 525 in the form of the sum of squared errors (SSE). The number and type of available prediction modes can vary based on the block size. For example, the number and type of available prediction modes can be different for 4 × 4 pixel blocks, 8 × 8 pixel blocks, 16 × 16 pixel blocks, 32 × 32 pixel blocks, and / or the like.In this respect, the Intra-Image Estimation Unit 570 can select different prediction modes for each of the possible block sizes based on which prediction mode yields the lowest rate distortion cost, as determined by the Rate Distortion Optimization Unit for that block size. Furthermore, the Intra-Image Estimation Unit 570 can select different prediction modes for the luma values ​​in the block compared to the chroma sample values ​​in the block. In some embodiments, the prediction mode determines the order in which the pixels in the current block are sampled to generate the predicted intra-image candidate.For example, the prediction mode can specify vertical scanning, horizontal scanning, diagonal scanning down left, diagonal scanning down right, vertical scanning left, vertical scanning right, horizontal scanning down, horizontal scanning up and / or the like.

[0099] Based on the selected intra-image prediction mode, the intra-image prediction unit 575 generates an intra-image candidate. The intra-image prediction unit 575 samples the pixel values ​​in the current block in the order specified by the selected intra-image prediction mode. For each sampled pixel, the intra-image prediction unit 575 determines a predicted pixel value based on the differences between that pixel value and the pixel values ​​of neighboring pixels. Using these predicted pixel values, the intra-image prediction unit 575 generates the intra-image candidate. The intra-image prediction unit 575 passes the intra-image candidate to the "Intra" input of the selector 525.

[0100] Selector 525 determines whether to select the compensated pixels for the inter-frame candidate received by the motion compensation unit 520 or the intra-frame candidate received by the intra-frame prediction unit 575. The selection of the inter-frame candidate or the intra-frame candidate can be performed at any level of granularity, including, without limitation, a block-by-block basis, a media-frame-by-media-frame basis, and / or the like. The procedure for determining whether to select the inter-frame candidate or the intra-frame candidate can be relatively simple or relatively complex. Typically, the more complex the procedure used to determine whether to select the inter-frame candidate or the intra-frame candidate, the higher the video quality of the resulting encoded stream.The candidate selected between the inter-image candidate and the intra-image candidate is called the winning candidate. In some embodiments, the selector 525 determines the winning candidate solely based on luma pixel values. In other embodiments, the selector 525 determines the winning candidate based on both luma pixel values ​​and chroma pixel values. In general, selection based on both luma pixel values ​​and chroma pixel values ​​can be more accurate and therefore result in higher visual quality than selection based solely on luma pixel values.

[0101] In some embodiments, the selector 525 can also perform rate distortion optimization (RDO) when selecting the winning candidate. The rate distortion optimization unit (in Fig. (5 not shown) of selector 525 receives the inter-image candidate and the intra-image candidate. The rate distortion optimization unit also receives the reconstructed pixels of the reconstructed current media image uF'. n , which are received by the 555 unit for inverse quantization, the 560 unit for inverse transformation, and the 565 summer. Based on the reconstructed pixels of the reconstructed current media image uF' n The rate distortion optimization unit determines a rate distortion cost value based on the sum of squared errors (SSE), or distortion, for the current block. Selector 525 selects the winning candidate, at least partially, based on the rate distortion cost value for the current block determined by the rate distortion optimization unit. Selector 525 then passes the winning candidate to summer 530 and summer 565.

[0102] The summing unit 530 inverts the winning candidate received by the selector 525 before the winning candidate is combined with the current media image (F n ) 505 is combined. As a result, the summing unit 530 determines the difference resulting from subtracting the winning candidate from the current media image (F n ) 505. This difference is called residual pixels, residual data, or more generally, the residual D. n The summing unit 530 transfers the residual D. n to the transformation unit (T) 535.

[0103] The transformation unit 535 converts the residue D nThe data received by the summing unit 530 is transformed into an array of frequency coefficients, each representing the image segment contained in its respective block. The transformation unit 535 transfers the frequency coefficients to the quantization unit (Q) 540. The quantization unit 540 reduces the total number of unique frequency coefficients received by the transformation unit 535 by quantizing the frequency coefficients according to defined frequency ranges, or bins, or quantization intervals. The quantization unit 540 transfers the quantized frequency coefficients X to the rearrangement unit 545. The rearrangement unit 545 sorts the quantized frequency coefficients X in descending order of value, so that all coefficients with a value of zero (,0') are sorted to the end of the set of frequency coefficients.The rearrangement unit 545 transmits the sorted quantized frequency coefficients to the entropy encoder 550. The entropy encoder 550 generates the final coded bitstream for the video encoder 500. In some embodiments, the entropy encoder 550 generates the final coded bitstream, i.e., the output video stream, using a lossless compression method. Additionally or alternatively, the entropy encoder 550 generates the final coded bitstream using a lossless compression method. The final coded bitstream generated by the video encoder 500 can then be decoded by a suitable video decoder (not shown).

[0104] In addition to transferring the quantized frequency coefficients X to the rearrangement unit 545, the quantization unit 540 transfers the quantized frequency coefficients X to the unit (Q). -1) 555 for inverse quantization. The 555 for inverse quantization unit performs an inverse quantization function to reverse the quantization performed by the 540 quantization unit. The 555 for inverse quantization unit transfers the inversely quantized frequency coefficients to the (T) unit. -1 ) 560 for inverse transformation. The unit 560 for inverse transformation performs an inverse transformation function to reverse the transformation performed by the transformation unit 535. In doing so, the unit 560 for inverse transformation generates reconstructed residual data D' n The unit 560 for the inverse transformation transfers the reconstructed residual data D' n to the summing unit 565.

[0105] The summing unit 565 adds the reconstructed residual data D' n to the winning candidate, which is generated by selector 525 to reconstruct the current media image uF' nto generate. The reconstructed current media image uF' n is a proxy of the media image that a video decoder generates when the video stream generated by the video encoder 500 is decoded. As described herein, the summing unit 565 transmits the reconstructed actual media image uF' n to the intra-image estimation unit 570 to generate the intra-image candidate in conjunction with the intra-image prediction unit 575. Additionally, the summer 565 transmits the reconstructed current media image uF' nto the filter 580. In some embodiments, the filter 580 is a deblocking filter that improves the visual quality of the reconstructed actual media image uF'. The filter 580 improves the visual quality by smoothing the sharp edges resulting from the transformation performed by the transformation unit 535 and / or the quantization performed by the quantization unit 540 followed by the inverse quantization performed by the inverse quantization unit 555 and / or the inverse transformation performed by the inverse transformation unit 560. The filter 580 passes the filtered image to the sampling adaptive offset (SAO) filter 585. The sampling adaptive offset filter 585 further filters the reconstructed actual media image uF'. n by selectively adding offsets to the pixel values ​​of the reconstructed current media image uF' nbased on the pixel value of a specific pixel and / or the pixel values ​​of one or more neighboring pixels. The Sampling Adaptive Offset filter 585 stores the SAO-filtered image as the final reconstructed current media image (F'). n ) 590.

[0106] After the video encoder 500 has processed the current media image (F n Once 505 has completed, the video encoder 500 receives the next input media image, which then becomes the new current media image (F n ) 505 will be. Furthermore, the reconstructed current media image (F' n ) 590 the new reference media image (F' n-1 ) 510. The 500 video encoder uses this new reference media image (F' n-1 ) 510, to select the Inter-Bild candidate for the new current media image (F n ) to generate 505.

[0107] In some embodiments, the visual quality of the output video stream can be further improved by a feedback loop (not shown) from the selector 525 to the motion estimation unit 515. Upon selecting the winning candidate, the selector 525 determines the final motion vector for the current block. The selector 525 transmits the final motion vector for the current block to the motion estimation unit 515. The motion estimation unit 515 can use this final motion vector for the current block to generate the motion vector for the next block. In this way, the motion estimation unit 515 can generate a motion vector for the current block based on pixel data from the current block, as well as the motion vector from the preceding block and / or the motion vector from the next block, resulting in improved motion estimation.This improved motion estimation can in turn lead to improved motion compensation, as performed by the motion compensation unit 520, and improved selection accuracy, as performed by the selector 525.

[0108] In some embodiments, a given block can contain multiple subblocks or partitions. The subblocks can be of different sizes. For example, a 16×16 pixel block can contain 8×16 pixel subblocks, 16×8 pixel subblocks, 8×8 pixel subblocks, and / or the like in any combination. In such embodiments, the motion estimation unit 515 can generate a motion vector for each subblock and combine the motion vectors from the different subblocks to generate a final motion vector for the block.

[0109] In some embodiments, the 500 video encoder can be combined with the architecture of the 400 video encoder. Fig. 4 be implemented. In such embodiments, media images, including, without limitation, the current media image (F), can be used. n ) 505, of the reference media image (F' n-1 ) 510 and the reconstructed current media image (F' n ) 590, in any technically feasible memory. In particular, these media images can be stored in a shared memory, the cache memory 460, the image buffer memory, and / or the like. The motion estimation unit 515 and / or the motion compensation unit 520 can, among others, control the controller 405, the FPS unit 410, the PLC unit 415, and the MCT unit 420 of Fig. 4. The intra-image estimation unit 570 and / or the intra-image prediction unit 575 can, among other things, control the controller 405, the MPEB unit 466 and the history unit 470 of Fig. 4. One or more of the selector 525 (including the rate distortion optimization unit of selector 525), the summing unit 530, the transformation unit 535 and / or the quantization unit 540 can, among other things, control the rate distortion optimization unit 425 of Fig. 4. The unit 555 for inverse quantization, the unit 560 for inverse transformation and / or the summing unit 565 can, among other things, represent the reconstruction unit 430 of Fig. 4. The Filter 580 and / or the Sampling Adaptive Offset Filter 585 can, among other things, replace the Filter 435 of Fig. 4. The entropy encoder 550 can, among other things, represent the entropy encoder 440 from Fig. 4.

[0110] It is understood that the system shown herein is for illustrative purposes only and that variations and modifications are possible. The procedures described herein can be performed by one or more alternative auxiliary processors, including, but not limited to, CPUs, GPUs, video encoders, DMA units, IPUs, NPUs, TPUs, NNPs, DPUs, VPUs, ASICs, FPGAs, and / or the like in any combination. More generally, the procedures described herein can be applied with any CPU 102, PPU 202, a video encoder, and / or any other processing unit in any combination.

[0111] Fig. Figures 6A-6B illustrate the application of a weighted prediction to a media image processed by the video encoders 400 and 500 of the Fig. 4-5 according to various embodiments. A current media image 600 exhibits inter-image differences resulting from a large, rapid change in the overall luminance and / or chrominance level, as shown by the shading of the blocks contained in the current media image 600. In weighted prediction, the video encoder reduces or eliminates this large, rapid change by applying weighted prediction parameters to the pixels contained in the blocks of the current media image 600 before encoding the blocks.

[0112] To generate the weighting prediction parameters, a controller in the video encoder determines the mean and variance of the pixel data for the current media frame 600 and a reference media frame. The reference media frame can be the preceding media frame and / or the next media frame relative to the current media frame. The controller generates the weighting prediction parameters, including denominator parameters, weighting prediction parameters, and offset parameters, for the current media frame 600 based on the mean and variance. Hardware components in the video encoder apply the weighting prediction parameters to perform a weighted prediction for the pixels in each block of the current media frame 600 based on the reference media frame and the weighting prediction parameters, resulting in a weighted predicted media frame 650.The large, rapid change in the overall luminance and / or chrominance level between the actual media image 600 and the reference media image was reduced or eliminated, as shown by the absence of shading of the blocks contained in the weighted predicted media image 650.

[0113] Fig. Figures 7A-7B illustrate the application of a weighted prediction to multiple regions within a media image generated by the 400 and 500 video encoders of the Fig. 4-5 is encoded according to various embodiments. A current media image 700 exhibits regional inter-image differences resulting from a large, rapid change in the overall luminance and / or chrominance level, as shown by the shading of the blocks contained in the current media image 700. In weighted prediction, the video encoder reduces or eliminates these large, rapid changes by applying weighted prediction parameters to the pixels contained in the blocks for the respective region 710(0), 710(1), 710(2), and 710(3) of the current media image 700 prior to encoding the blocks.Each of the different regions 710(0), 710(1), 710(2) and 710(3) of the current media image 700 is shaded differently to indicate that the blocks of the respective region 710 are similar to other blocks in the same region 710 in luminance and / or chrominance levels, but differ significantly in luminance and / or chrominance levels from blocks in other regions 710.

[0114] To generate the weighting prediction parameters, a controller in the video encoder determines the mean and variance of the pixel data for each region 710 of the current media image 700 and a reference media image. The reference media image can be the preceding media image and / or the next media image relative to the current media image. The controller generates various weighting prediction parameters for each region 710, including denominator parameters, weighting prediction parameters, and offset parameters, for the regions 710 of the current media image 700 based on the mean and variance.Hardware components in the video encoder apply the weighting prediction parameters to perform a weighted prediction for the pixels in the respective block of the different regions of the current media image 700, based on the reference media image and the weighting prediction parameters, resulting in a weighted predicted media image 750. The large, rapid change in the overall luminance and / or chrominance level between the different regions 710(0), 710(1), 710(2), and 710(3) of the current media image 700 and the reference media image has been reduced or eliminated, as shown by the absence of shading of the blocks in regions 760(0), 760(1), 760(2), and 760(3) of the weighted predicted media image 750.

[0115] Fig. Figure 8 is a flowchart of process steps for performing a weighted inter-image prediction for a media image by the computer system 100. Fig. 1-7B according to various embodiments. Additionally or alternatively, the process steps can be performed by one or more alternative auxiliary processors, including, but not limited to, microcontrollers, RISC processors, CPUs, GPUs, DMA units, IPUs, NPUs, TPUs, NNPs, DPUs, VPUs, ASICs, FPGAs and / or the like in any combination. Although the process steps in conjunction with the systems of Fig. As described in 1-7B, the person skilled in the art will understand that any system designed to carry out the process steps in any order is within the scope of this disclosure.

[0116] As shown, a procedure 800 begins at step 802, wherein a controller, such as the controller 405, contained in a video encoder, such as the video encoder 400 and / or the video encoder 500, determines a mean and variance for a region of a current media frame and a reference media frame of a video stream. The region can be the entire media frame or a portion thereof. The controller determines the mean of the pixel values ​​of the current media frame being encoded by calculating the arithmetic mean of the pixel values ​​in the current media frame. The controller determines the variance of the pixel values ​​of the current media frame by determining, for each pixel, the difference between the pixel value and the mean, calculating the square of each difference, summing the squares of the differences, and dividing the sum by the number of pixels in the current media frame.Similarly, the controller determines the mean of the pixel values ​​in a region of one or more reference media images and the variance of the pixel values ​​in that region of the one or more reference media images. When the controller performs forward inter-image prediction, the reference media image is the media image preceding the current media image. When the controller performs backward inter-image prediction, the reference media image is the media image following the current media image or a media image following the current media image. When the controller performs bidirectional inter-image prediction, it uses two reference media images: the preceding media image (for forward prediction) and the next media image (for backward prediction).When the controller performs a bidirectional prediction, it determines the forward prediction mean and forward prediction variance, and the backward prediction mean and backward prediction variance.

[0117] In step 804, the controller determines weight prediction parameters for the region of the current media image, including a denominator parameter, a weight parameter, and an offset parameter. To determine the weight prediction parameters, the controller determines a scaling parameter. The controller determines the scaling parameter by calculating the square root of the ratio of the current media image variance to the reference media image variance. The controller determines the denominator parameter by calculating the base-2 logarithm of the ratio of 127 to the scaling parameter and applying an integer floor function to the result. The controller determines the weight parameter by raising two to the power of the denominator parameter, multiplying the result by the scaling parameter, adding 0.5, and applying an integer floor function to the result.The controller determines the offset parameter by calculating the difference between the mean of the current media image and the result of a function applied to the mean of the reference media image. The function applied to the reference media image's mean involves multiplying the reference media image's mean by the weighting parameter and dividing the result by a binary 1 shifted to the left a number of places specified by the denominator parameter.

[0118] When bidirectional prediction is performed, and / or in other cases where multiple reference media images exist, the controller determines several variances. Specifically, the controller determines a variance for each reference media image included among the multiple reference media images. Based on these variances, the controller determines an appropriate scaling parameter. The controller selects the scaling parameter with the maximum scaling value. Using this largest scaling parameter, the controller determines a single denominator parameter. Based on the multiple reference media image variances and the denominator parameter, the controller determines a weighting parameter and an offset parameter for each reference media image.

[0119] In step 806, the controller transmits the weight prediction parameters to other components contained in the video encoder. These other components of the video encoder apply the weight prediction parameters generated by the controller to the blocks contained in the region of the current media frame. The controller may transmit the weight prediction parameters to the video encoder by any technically feasible method, including, without limitation, storing the weight prediction parameters in hardware registers contained in one or more units of the video encoder, storing the weight prediction parameters in the cache memory, storing the weight prediction parameters in shared memory, storing the weight prediction parameters in the frame buffer memory, and / or the like.

[0120] In step 808, the video encoder generates inter-predicted pixel samples for the blocks of the current media image. Before applying the weighting prediction parameters to the pixels of the current media image, the video encoder uses the motion vector data described herein to locate a reference block in the reference media image and generate inter-predicted pixel samples for the current media image. These inter-predicted pixel samples can be forward-predicted, backward-predicted, or bidirectionally predicted. If the motion vector data contains subpixels, the video encoder performs subpixel interpolation on the forward-inter-predicted pixel samples and / or the backward-inter-predicted pixel samples.

[0121] In step 810, the video encoder applies the weight prediction parameters generated in step 804 to the inter-predicted pixel samples generated in step 808. The video encoder applies the weight prediction parameters to the inter-predicted pixel samples by executing a function on the inter-predicted pixel samples. This function includes, among other things, multiplying the inter-predicted pixel sample by a weight parameter and adding an offset parameter. If bidirectional prediction is performed, and / or in other cases where there are multiple reference media images, the video encoder can apply multiple weight parameters and multiple offset parameters to the inter-predicted pixel samples. In some embodiments, the video encoder can impose a limit or...Apply clipping to prevent underflow or overflow resulting from applying the weighted prediction parameters generated in step 804 to the inter-predicted pixel samples. For example, the video encoder can prevent underflow by limiting the result to a minimum value of only 0 bits (this is the smallest value that can be represented by a weighted inter-predicted pixel sample). Similarly, the video encoder can prevent overflow by limiting the result to a maximum value of only 1 bits (this is the largest value that can be represented by a weighted inter-predicted pixel sample).

[0122] In step 812, the video encoder determines whether there are any further regions to be processed in the current media image. In some embodiments, the current media image does not contain multiple regions. In such embodiments, the video encoder determines that there are no further regions to be processed in the current media image, and procedure 800 terminates. If, on the other hand, the current media image contains multiple regions, then the video encoder determines whether all regions of the current media image have been processed. If all regions of the current media image have been processed, then procedure 800 terminates. However, if one or more regions of the current media image have not yet been processed, then procedure 800 returns to step 802 to process the remaining regions of the current media image.

[0123] In summary, a video encoder generates weight prediction parameters for a media frame and applies these parameters to blocks contained within that frame. The weight prediction parameters correct large frame-to-frame luminance variations across a series of media frames. In some embodiments, a controller executing instructions generates the weight prediction parameters, and dedicated hardware components within the video encoder apply them to the blocks of the media frame. To generate the weight prediction parameters, the controller determines the mean and variance of the pixel data for a current media frame and a reference media frame from a video stream. The reference media frame can be the preceding media frame and / or the next media frame relative to the current media frame.The controller generates the weight prediction parameters, including denominator parameters, weight prediction parameters, and offset parameters, for the current media image based on the mean and variance. The hardware components in the video encoder apply the weight prediction parameters to perform a weighted prediction for the pixels in each block of the current media image based on the reference media image and the weight prediction parameters. The hardware components generate each pixel value by multiplying the corresponding reference pixel value by the weight and adding the offset. In some embodiments, large luminance changes can affect a region of a media image rather than the entire media image.In such embodiments, the controller can generate different sets of weighting prediction parameters for different regions within a media image, and the video encoder can apply them to further reduce the bit rate and further improve the visual quality of the output bitstream.

[0124] At least one technical advantage of the disclosed techniques or methods over the prior art is that, in the disclosed methods, the video encoder reduces or eliminates inter-frame differences resulting from a large, rapid change in the overall luminance and / or chrominance level before encoding blocks of an actual media image in a video stream. The video encoder generates inter-frame candidates for the blocks of the actual media image based on inter-frame differences other than those resulting from a change in the overall luminance and / or chrominance level. As a result, the video encoder can produce a video stream with a lower residual, a lower bit rate, and correspondingly higher encoding efficiency when encoding video streams with rapid changes in luminance and / or chrominance compared to conventional methods.Furthermore, by reducing or eliminating inter-image differences resulting from changes in the overall luminance and / or chrominance levels, the video encoder can identify matching blocks in the reference media image that exhibit a better match with blocks in the current media image. As a result, the predictive accuracy of the video encoder is improved, leading to better visual quality of the resulting video stream. These advantages represent one or more technological improvements over prior art approaches.

[0125] All combinations of claim elements listed in the claims and / or of elements described in this application fall in any way within the considered scope of the present disclosure and protection.

[0126] The descriptions of the various embodiments serve for illustrative purposes but do not claim to be exhaustive or limited to the disclosed embodiments. Many modifications and variations are obvious to the person skilled in the art without affecting the scope and spirit of the described embodiments.

[0127] Aspects of the present embodiments may be implemented as a system, method, or computer program product. Accordingly, aspects of the present disclosure may take the form of a purely hardware implementation, a purely software implementation (including firmware, resident software, microcode, etc.), or an embodiment that combines software and hardware aspects, all of which may be generally referred to herein as a "module" or "system." Furthermore, aspects of the present disclosure may take the form of a computer program product embodied in one or more computer-readable media containing computer-readable program code.

[0128] Any combination of one or more computer-readable media can be used. The computer-readable medium can be a computer-readable signaling medium or a computer-readable storage medium. A computer-readable storage medium can be, for example, but not exclusively, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing.More specific examples (a non-exhaustive list) of computer-readable storage medium would include: an electrical connection with one or more wires, a portable computer disk, a hard disk, random-access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only storage device (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. For the purposes of this document, computer-readable storage medium can be any tangible medium capable of containing or storing a program for use by or in conjunction with a command-execution system, device, or apparatus.

[0129] Aspects of the present disclosure are described above with reference to flowchart diagrams and / or block diagrams of processes, devices (systems), and computer program products according to embodiments of the disclosure. It is understood that each block of the flowchart diagrams and / or block diagrams, and combinations of blocks in the flowchart diagrams and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device to create a machine such that the instructions executed by the processor of the computer or other programmable data processing device enable the implementation of the functions / actions specified in the flowchart and / or in a block or blocks of a block diagram.Such processors can be, without restriction, general-purpose processors, special-purpose processors, application-specific processors, or field-programmable gate arrays.

[0130] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, procedures, and computer program products according to various embodiments of the present disclosure. In this respect, each block in the flowchart or block diagrams can represent a module, segment, or section of code comprising one or more executable instructions for implementing the specified logical function(s). It should also be noted that in some alternative implementations, the functions specified in the blocks may occur in a different order than that shown in the figures. For example, two blocks shown consecutively may in reality be executed essentially simultaneously, or the blocks may sometimes be executed in reverse order, depending on the specific functionality.It should also be noted that each block of the block diagrams and / or flowchart representation, as well as combinations of blocks in the block diagrams and / or flowchart representation, can be implemented by special hardware-based systems that perform the specified functions or actions, or by combinations of special hardware and computer instructions.

[0131] While the foregoing relates to embodiments of the present disclosure, other and further embodiments of the disclosure may be developed without affecting the fundamental scope of the disclosure, and the scope of the disclosure is determined by the following claims.

Claims

[1] Computer-implemented method for performing hardware-assisted weighted prediction coding with software-generated weighting prediction parameters for a current media image, wherein the method comprises: Determining an initial mean and variance for the current media image; Determining a second mean and a second variance for a reference media image; and Determining one or more first weighting prediction parameters based on the first variance, the first mean, the second variance, and the second mean, wherein one or more first weighting prediction parameters are applied to at least a part of predicted samples of the current media image before encoding at least a part of the predicted samples of the current media image. [2] Computer-implemented method according to claim 1, wherein the reference media image comprises at least one of a media image prior to the current media image or a media image following the current media image. [3] Computer-implemented method according to claim 1 or 2, wherein: Determining the first mean involves determining an arithmetic mean pixel value of pixel values ​​contained in the current media image, and Determining the second mean involves determining an arithmetic mean pixel value of pixel values ​​contained in the reference media image. [4] Computer-implemented method according to any one of the preceding claims, wherein: Determining the first variance includes: Determine, for each pixel contained in the current media image, the square of the difference between a pixel value of the pixel and the first mean value; Determining a first sum of the squares of the differences for all pixels contained in the current media image; and Dividing the first sum by the number of pixels contained in the current media image, and Determining the second variance includes: Determine, for each pixel contained in the reference media image, the square of the difference between one pixel value of the pixel and the second mean value; Determining a second sum of the squares of the differences for all pixels contained in the reference media image; and Divide the second sum by the number of pixels contained in the reference media image. [5] Computer-implemented method according to any of the preceding claims, wherein the one or more first weight prediction parameters comprise at least one of a denominator parameter, a weight prediction parameter or an offset parameter. [6] Computer-implemented method according to claim 5, wherein the one or more first weighting prediction parameters are applied to predicted sample values ​​of the current media image by: Multiplying a first predicted sample contained within the predicted samples by the weighting prediction parameter to generate a first weighted predicted sample; and Adding the first weighted predicted sample to the offset parameter to generate a second weighted predicted sample. [7] Computer-implemented method according to any of the preceding claims, wherein the first mean and the first variance correspond to a first region of the current media image, and further comprising: Determining a third mean and a third variance for a second region of the current media image; and Determining one or more second weighting prediction parameters based on the third variance, the third mean, the second variance and the second mean wherein one or more second weighting prediction parameters are applied to predicted samples in the second region of the current media image before encoding the predicted samples in the second region of the current media image. [8] Computer-implemented method according to any one of the preceding claims, wherein: the first variance and the second variance each comprise a luminance variance, a red difference chrominance variance and a blue difference chrominance variance, and the first mean and the second mean each represent a luminance mean, include a red difference chrominance mean and a blue difference chrominance mean. [9] Computer-implemented method according to one of the preceding claims, wherein the determination of one or more first weighting prediction parameters for the current media image is carried out in parallel with the application of one or more second weighting prediction parameters to predicted samples of a previous media image prior to encoding the predicted samples of the previous media image. [10] Computer-implemented method according to one of the preceding claims, wherein, after encoding the predicted sample values ​​of the current media image, the predicted sample values ​​of the current media image are contained in a bitstream which further contains an index that refers to one or more first weighting prediction parameters. [11] Computer-implemented method according to one of the preceding claims, wherein when one or more first weighting prediction parameters are applied to the at least one part of the predicted samples of the current media image, a luminance difference and / or a chrominance difference between the at least one part of the predicted samples and corresponding samples of the reference media image is / are reduced. [12] System encompassing: a memory containing instructions; a controller that is coupled to the memory and that, when it executes the instructions: a first mean and a first variance for a current media image are determined, a second mean and a second variance were determined for a reference media image, and one or more first weighting prediction parameters are determined based on the first variance, the first mean, the second variance, and the second mean; and a video encoder that is coupled to the controller and that: applies one or more of the first weighting prediction parameters to at least a part of the predicted samples of the current media image before encoding at least a part of the predicted samples of the current media image. [13] System according to claim 12, wherein the reference media image comprises at least one of a media image prior to the current media image or a media image following the current media image. [14] System according to claim 12 or 13, wherein: To determine the first mean value, the controller calculates an arithmetic average pixel value from pixel values ​​contained in the current media image, and To determine the second mean, the controller calculates an arithmetic average pixel value from pixel values ​​contained in the reference media image. [15] System according to any one of claims 12 to 14, wherein: To determine the first variance, the control is: For each pixel contained in the current media image, a square of the difference between a pixel value of the pixel and the first mean value is determined; a first sum of the squares of the differences is determined for all pixels contained in the current media image; and the first sum divided by the number of pixels contained in the current media image, and The control for determining the second variance is: For each pixel contained in the reference media image, a square of the difference between one pixel value of the pixel and the second mean value is determined; a second sum of the squares of the differences is determined for all pixels contained in the reference media image; and the second sum is divided by the number of pixels contained in the reference media image. [16] System according to any one of claims 12 to 15, wherein the one or more first weighting prediction parameters comprise at least one of a denominator parameter, a weighting prediction parameter or an offset parameter. [17] System according to claim 16, wherein, in order to apply the one or more first weighting prediction parameters to at least one part of the predicted samples of the current media image, the video encoder: a first predicted sample contained within the predicted samples, multiplied by the weighting prediction parameter to generate a first weighted predicted sample; and The first weighted predicted sample is added to the offset parameter to generate a second weighted predicted sample. [18] System according to any one of claims 12 to 17, wherein: the first mean and the first variance correspond to a first region of the current media image, the control further: a third mean and a third variance determined for a second region of the current media image; and one or more second weighting prediction parameters are determined based on the third variance, the third mean, the second variance and the second mean, and the video encoder further: applies one or more second weighting prediction parameters to predicted samples in the second region of the current media image before encoding the predicted samples in the second region of the current media image. [19] System according to any one of claims 12 to 18, wherein when the video encoder applies the one or more first weighting prediction parameters to the at least part of the predicted samples of the current media image, a luminance difference and / or a chrominance difference between the at least part of the predicted samples and corresponding samples of the reference media image is / are reduced. [20] One or more computer-readable media containing instructions, wherein the instructions, when executed by one or more processors, perform the steps of: Determining an initial mean and variance for a current media image; Determining a second mean and a second variance for a reference media image; and Determining one or more first weighting prediction parameters based on the first variance, the first mean, the second variance and the second mean wherein one or more first weighting prediction parameters are applied to at least a part of predicted samples of the current media image before encoding at least a part of the predicted samples of the current media image.