Semiconductor circuit with electrical connections with multiple signal or potential assignments
Patent Information
- Application Number
- DE112013000145
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2012-05-07
- Filing Date
- 2013-02-19
- Publication Date
- 2025-03-06
- Estimated Expiration
- 2033-02-19
Smart Images

Figure 00000000_0000_ABST
Abstract
Description
[0001] The invention relates to a semiconductor circuit with electrical connections with multiple signal or potential assignment.
[0002] In hardware development, it is common practice to generate successor circuit variants (circuit generations, versions) of integrated semiconductor circuits in subsequent development processes based on an integrated semiconductor circuit developed in an initial development process. These successor circuit variants of integrated semiconductor circuits typically have an expanded range of functions and improved performance characteristics. In particular, the expanded range of functions requires a larger number of electrical connections (pins).
[0003] To minimize the unit costs of integrated semiconductor circuits as much as possible, a successor circuit variant of an integrated semiconductor circuit contains the functional scope and performance characteristics of all predecessor circuit variants and is installed in an identical package with an identical number and arrangement of electrical connections. In this way, each successor circuit variant of an integrated semiconductor circuit is compatible with any of its predecessor circuit variants and can replace them in a single upgrade process without changing the external circuitry and without using additional wiring.
[0004] The expansion of the functional scope of successor circuit variants typically requires a functionally modified pinout or a higher number of electrical connections compared to the respective predecessor versions.
[0005] US 2009 / 0 051 406 A1 discloses a semiconductor device whose operating state is switched between a test state and a normal operating state according to a logical value of an externally input signal. The semiconductor device includes a first power line, a second power line, a switch controlled by a signal line to couple / isolate the first power line with the second power line, a control circuit that outputs a control signal, and a state switching circuit that controls the signal line to couple / isolate the first power line with the second power line according to a logical value of the control signal when the input signal is one of the logical values, while the state switching circuit controls the signal line to couple the first power line with the second power line when the first signal is the other logical value.
[0006] US 2006 / 0 055 391 A1 discloses virtual current-controlled cells configured with a control circuit for buffering control signals and a current-controlled block comprising two or more NFETs for virtual ground rail nodes and PFETs for virtual positive rail nodes. Each cell has a control voltage input, a control voltage output, a node coupled to the power supply voltage potential, and a virtual power-controlled node that is coupled to and decoupled from the power supply voltage potential in response to logic states at the control input. The control signals are buffered by non-current-controlled inverters before being applied to the input of a current-controlled block. Virtual current-controlled cells can pass a control signal that is in phase with or inverted from a corresponding control signal at the control input.Virtual current-controlled cells can be cascaded to create virtual power rails in chains and power grids. The control signals are buffered at the cell boundaries or in response to a clock signal.
[0007] Document US 5 646 451 A shows a multifunctional chip including a first and a second electrically isolated bonding pad. The chip also includes a control circuit connected to the second bonding pad. The control circuit commands the chip to perform the first function when the first and second bonding pads are coupled. Alternatively, the control circuit commands the chip to perform the second function when the first and second bonding pads remain electrically isolated. The coupling or isolation between the first and second bonding pads is determined by wire bonds. The use of wire bonds therefore selects the chip's function.
[0008] US 2009 / 0 045 677 A1 provides a power control circuit and an operating method for controlling the connection of a voltage source to an associated circuit when this circuit is to enter an active operating state. The associated circuit has a plurality of circuit parts, and each circuit part has at least one voltage line for connection to the voltage source. The power control circuit comprises a series of power circuits, each power circuit being associated with one of the circuit parts and provided with an enable signal. Each power circuit responds to its enable signal being set such that the voltage source is connected to the at least one voltage line of the associated circuit part.Furthermore, at least one enable qualification circuit is provided, each such enable qualification circuit being assigned to one of the power circuits and configured to generate an output signal that serves to determine the enable signal supplied to a subsequent power circuit in the series. Each enable qualification circuit sets its output signal when both the enable signal for the associated power circuit is set and the at least one voltage line of the circuit part assigned to this power circuit has reached a predetermined voltage level.
[0009] From US 2003 / 0141578 A1, it is known to provide a set of internal electrical connections for each circuit variant on the chip surface of the semiconductor circuit. During the final assembly process of the semiconductor circuit, the electrical connections of the circuit variant used by the user are each connected to the electrical connections of the semiconductor circuit housing via a bonding wire. Such a technical implementation with multiple circuit- and function-dependent bonding variants leads to an increase in chip area. The different wiring of the individual circuit variants of the semiconductor circuit requires marking depending on the selected circuit variant, which increases manufacturing costs.The implementation of multiple sets of internal electrical connections on the chip surface of the semiconductor circuit may require different test setups, which further increases test costs. Finally, an increase in logistics costs is also to be expected, since each semiconductor circuit requires a number of part numbers corresponding to the number of circuit variants.
[0010] The object of the invention is therefore to develop a semiconductor circuit in which the functional scope of the respective predecessor circuit variants is implemented and the effort for the connection between the electrical connections of the functional units belonging to the individual circuit variants and the electrical connections of the housing is minimized.
[0011] The invention is achieved by a semiconductor circuit having the features of claim 1. Advantageous technical extensions are listed in the respective dependent claims.
[0012] According to the invention, several electrical terminals of the semiconductor circuit—hereinafter referred to as the first electrical terminals of the semiconductor circuit—are assigned multiple times with a signal and / or a potential for each of the circuit variants of the semiconductor circuit. This eliminates the need for multiple bond variants.
[0013] In order to correctly connect the signal or potential assignment of the individual first electrical connections of the semiconductor circuit with the associated inputs or outputs of the functional units of the circuit variant of the semiconductor circuit used by the user, switching elements are provided in the semiconductor circuit which connect the first electrical connections with the inputs or outputs of the functional units belonging to the circuit variant used or separate them from the inputs or outputs of the functional units belonging to the circuit variants not used.
[0014] In addition, such a device according to the invention preferably comprises a selection unit that controls the individual switching elements depending on the circuit variant of the semiconductor circuit used. For this purpose, the selection unit evaluates the potential levels of at least one electrical terminal of the semiconductor circuit—hereinafter referred to as the second electrical terminals of the semiconductor circuit.
[0015] Due to the multiple assignment of the first electrical terminals of the semiconductor circuit, each first electrical terminal is connected to a number of switching elements corresponding to the number of signal or potential assignments of the respective first electrical terminal with the input or output of functional units belonging to the individual circuit variants assigned to the respective first electrical terminal.
[0016] On the other hand, the multiple assignment of first electrical terminals of the semiconductor circuit may require that an input or an output of a functional unit or of several functional units, which in a circuit variant of the semiconductor circuit is separated from a first electrical terminal due to a blocked switching element, is connected to another first electrical terminal of the semiconductor circuit via another conductive switching element.
[0017] In a preferred first variant of the invention, the individual switching elements are controlled via the selection unit based on the potential level present at a single second electrical terminal of the semiconductor circuit. The number of potential levels to be distinguished by the selection unit corresponds to the number of circuit variants implemented in the semiconductor circuit.
[0018] In a preferred second variant of the invention, the individual switching elements are controlled by evaluating the two potential levels of several second electrical connections by the selection unit.
[0019] In order to minimize or completely eliminate the number of second electrical connections of the semiconductor circuit that are not available as electrical connections for the actual technical function of the circuit variant selected in the semiconductor circuit, the electrical connections of the semiconductor circuit via which the supply voltage or the enable signal of a functional unit is conducted are preferably used as second electrical connections.
[0020] Field-effect transistors are preferably used as switching elements, which have a comparatively high contact resistance in the off state and thus ensure optimal and almost galvanic isolation between the respective first electrical connection and the associated inputs or outputs of the functional units connected to the respective first electrical connection.
[0021] While in a first preferred embodiment of the invention, the first electrical terminals of the semiconductor circuit correspond to the electrical terminals arranged on the housing of the semiconductor circuit, in the second preferred embodiment of the invention, a first electrical terminal of the semiconductor circuit is also implemented as a wire bridge to an electrically conductive plate that is directly connected to the semiconductor circuit and has a defined electrical potential. The electrically conductive plate with a defined electrical potential is preferably an electrically conductive plate located above or below the housing of the semiconductor circuit and has a potential identical to a reference potential of the semiconductor circuit.
[0022] This can be an exposed pad (ePad) that extends beyond the semiconductor circuit housing and is connected to the semiconductor circuit's ground potential. Alternatively, a pad that extends beyond the semiconductor circuit housing and is connected to a positive or negative reference potential of the semiconductor circuit is also possible.
[0023] Exemplary embodiments of the semiconductor circuit according to the invention are explained in detail below with reference to the drawings. The figures of the drawing show: Fig. 1 an exemplary representation of the signal or potential assignment of the individual electrical connections for two circuit variants of the semiconductor circuit, Fig. 2 is a block diagram of a first embodiment of a semiconductor circuit according to the invention, Fig. 3A is a block diagram of a second embodiment with a first circuit variant of a semiconductor circuit according to the invention, Fig. 3B is a block diagram of a second embodiment with a second circuit variant of a semiconductor circuit according to the invention, Fig. 4 a three-dimensional exemplary representation of an ePad connected to a semiconductor chip via wire bridges and Fig. 5 is a block diagram of a third embodiment of a semiconductor circuit according to the invention.
[0024] In Fig. Figure 1 shows the housing of a semiconductor circuit, e.g., an ASIC, with a total of 48 electrical connections. While the outside shows the assignment (Assignment_A) of the 48 electrical connections with signals or potentials for a first circuit variant (ASIC-A), the inside shows the assignment (Assignment_B) of the 48 electrical connections with signals or potentials for a second circuit variant (ASIC-B). Common abbreviations are used for the assignments of the individual electrical connections (I / O: binary input / output signal; RF: high-frequency input / output signal; ANALOG: analog input / output signal; VCC: positive reference potential; VEE: ground potential).
[0025] In an inventive assignment (Assignment_C) of the 48 electrical connections, which combines the assignment (Assignment_A) of the first circuit variant (ASIC-A) and the assignment (Assignment_B) of the second circuit variant (ASIC-B), Fig. 1 Certain electrical terminals (with the assignment designations outlined in a border) are assigned twice. The invention naturally also covers semiconductor circuits with any other number of electrical terminals and with any other number of multiple assignments of one or more electrical terminals.
[0026] In order to integrate two circuit variants in a single semiconductor circuit with a multiple assignment of one or more electrical connections according to the invention and thus to avoid several bond variants, in a first embodiment of a semiconductor circuit according to the invention according to Fig. 2 to take the following technical precautions.
[0027] For the sake of simplicity, the Fig. 2, the first embodiment of a semiconductor circuit according to the invention schematically shows the case of a double assignment of the first electrical terminal 1 with the ground potential V EE and the binary input / output signal V S2 Of course, a first electrical connection 1 can also be assigned to other types of signals and potentials in parallel and is also covered by the invention.
[0028] While in a first circuit variant of the semiconductor circuit the ground potential V EE serves to supply the first functional unit 2 and simultaneously the second functional unit 3 with the ground potential, in a second circuit variant of the semiconductor circuit the binary input / output signal V S2 transferred only between the input / output stage of the second functional unit 3 and the first electrical connection 1.
[0029] If, in a first circuit variant of the semiconductor circuit for connecting the first electrical terminal 1 to the ground terminal of a first functional unit 2 and a second functional unit 3, the ground potential V applied to the first electrical terminal 1 EE to the corresponding ground terminal of the first functional unit 2 and the second functional unit 3, a control signal generated by a selection unit 4 switches a switching element 5 located in the signal path between the first electrical terminal 1 and the two ground terminals of the first functional unit 2 and the second functional unit 3, which switching element is implemented as a field-effect transistor in the exemplary embodiment, into the conductive state.
[0030] At the same time, in the first circuit variant of the semiconductor circuit for separating the first electrical connection 1 from the input / output connection of the second functional unit 3, a switching element 6 located in the signal path between the first electrical connection 1 and the input / output connection of the second functional unit 3, which is also preferably implemented as a field-effect transistor and has control logic that is inverse to that of the switching element 5, is switched to the blocked state by the same control signal generated by the selection unit 4. In this way, it is prevented that the ground potential applied to the first electrical connection 1 is conducted to the input / output connection of the second functional unit 3 and possibly leads to a malfunction of the second functional unit 3.
[0031] The interposition of the switching element 6 in the signal path between the first electrical connection 1 and the input / output connection of the second functional unit 3 is, as shown in the Fig. 3A and Fig. 3B, is not absolutely necessary, since input / output connections of functional units typically have a decoupling stage for separation. If, on the other hand, the first electrical connection were connected via the switching element 6 to a potential connection of the second functional unit 3 that is different from the ground potential, this potential connection would have to be maintained at the required potential level throughout the entire operating time of the semiconductor circuit and would thus require the interposition of a blocked switching element 6 to prevent a connection between the first electrical connection 1, which is at ground potential, and the potential connection of the second functional unit 3.
[0032] In the second circuit variant of the semiconductor circuit, in order to separate the first electrical connection 1 from the ground connections of the first functional unit 2 and the second functional unit 3, the switching element 5 in the signal path between the first electrical connection 1 and the ground connection of the first functional unit 2 and the second functional unit 3 is blocked via the inverted control signal generated by the selection unit 4, while at the same time, in order to connect the first electrical connection to the input / output connection of the second functional unit 3, the switching element 6 in the signal path between the first electrical connection 1 and the input / output connection of the second functional unit 3 is transferred to the conductive state.
[0033] At the same time, in order to supply the first functional unit 2 and the second functional unit 3 with a ground potential, a switching element 8 located in a signal path between a further first electrical connection 7 with ground potential and the ground connections of the first functional unit 2 and the second functional unit 3, which is also preferably implemented as a field-effect transistor and has a control logic that is inverse to the control logic of the switching element 5, is converted into the conductive state via the same control signal generated by the selection unit of FIG. 4.
[0034] The generation of the control signal in the selection unit 4 for controlling the switching elements 5, 6 and 8 takes place in a first variant of the invention, which is also described in Fig. 2, by evaluating the level of the potential V applied to a single second electrical terminal 9 Sel .
[0035] For the operation of the selection unit 4, the supply with a typically positive reference potential V CC and a ground potential V EE required. The positive reference potential V CC and the mass potential V EE can, as in Fig. 2, via additional first electrical connections 10 and 11 or, to save first electrical connections, via the supply of the first functional unit 2 and the second functional unit 3 with a positive reference potential V CC provided first electrical connections 12 and 13 and the supply of the first functional unit 2 and the second functional unit 3 with a ground potential V EE the first electrical connections 1 and 7 provided must be realized.
[0036] In a second embodiment of the invention, the supply of the first functional unit 2 and the second functional unit 3 with a ground potential in the case of a blocked switching element 5 in the signal path between the first electrical connection 1 and the ground connections of the first functional unit 2 and the second functional unit 3 is carried out according to Fig. 3A without the interposition of a switching element 8 via a wire bridge 14 to a plate 16, which is at the ground potential of the semiconductor circuit. This electrically conductive plate 16 is according to Fig. 4 is arranged on the underside of the semiconductor chip 15 (but can also be arranged on the top side of the semiconductor chip 15) and protrudes beyond the semiconductor chip 15 and is thus exposed (so-called exposed pad (ePad)). At least one wire bridge 14, which is connected to a contact on the semiconductor chip, is attached, in particular bonded, to the exposed surface of the electrically conductive plate 16. The electrically conductive plate 16 is connected to a first electrical connection 7 of the semiconductor circuit, which is at ground potential. The semiconductor chip 15 is contacted via bond wires 17 with the individual electrical connections 18 on the housing of the semiconductor circuit.
[0037] In Fig. 3B shows the case in which there is no connection via a wire bridge 14 between the ground connections of the first functional unit 2 and the second functional unit 3 and the ground potential at a first electrical connection 7 and the ground connections of the first functional unit 2 and the second functional unit 3 are connected via the switching element 5 to the ground potential at the first electrical connection 1.
[0038] In the presentation of the Fig. 3A, the selection unit 4 generates the control signal for the switching element 5 from the level of the enable signal V EN for activating the second functional unit 3 at an electrical connection 19. In this case, the requirement for an additional second electrical connection 9, at which the potential V to be evaluated is applied, can be eliminated. Sel can be advantageously saved.
[0039] In the third embodiment of the Fig. 5, the first electrical connection 1 is assigned three signals or potentials. In addition to the ground potential V EE for the ground supply of the first functional unit 2 and the second functional unit 3, the input / output signal V S2 , which is connected to an input / output terminal of the second functional unit 3, can also receive a further input / output signal V S1 which is connected to an input / output terminal of the first functional unit 2. To connect or disconnect the first electrical terminal to or from the input / output terminal of the first functional unit 2, a further switching element 20 is connected in the signal path between the first electrical terminal 1 and the input / output terminal of the first functional unit 2.
[0040] In this technical embodiment, the switching elements 5 or 8, 6 and 20 are controlled by three separate control signals each, which are generated by a selection unit 4' for the three circuit variants of the semiconductor circuit. In addition, in the Fig. 5, the second variant of the invention for controlling the individual switching elements does not require different signal or potential levels of a single signal or potential V Sel as in the case of Fig. 3A, but the signal or potential levels of several signals or potentials - in Fig. 5 the signals or potentials V Sell , V Sel2 and V Sel3 at the second electrical connections 21, 22 and 23 - evaluated in the selection unit 4'.
[0041] With a view to a practical design of the line cross-sections of the individual lines in the semiconductor circuit and a practical dimensioning of the individual field-effect transistors serving as switching elements 5, 6, 8 and 20, the signals or potentials that are alternatively applied to a first electrical terminal 1 are to be selected such that their voltage or current levels are of the same order of magnitude.
[0042] The invention is not limited to the illustrated embodiments and variants of the invention. The invention also covers all combinations of the features claimed in the claims and / or the features disclosed in the description and / or the features shown in the drawings. For example, bipolar transistors can also be used instead of field-effect transistors.
Claims
[1] Semiconductor circuit with at least one first electrical connection (1) with multiple signal or potential assignment for the integration of several circuit variants in the semiconductor circuit with at least one switching element (5, 6, 8, 20) for separating or connecting the at least one first electrical connection (1) from or to an input or output of at least one functional unit (2, 3) integrated in the semiconductor circuit, wherein, in the case of an assignment (assignment_C) of the at least one electrical connection (1) that combines the assignment (assignment_A) of a first circuit variant (ASIC-A) and the assignment (assignment_B) of a second circuit variant (ASIC-B), certain electrical connections of the at least one electrical connection (1) are assigned twice, wherein the assignment (Assignment_A) of the at least one electrical connection (1) with signals or potentials for the first circuit variant (ASIC-A) is on the outside, and wherein the assignment (Assignment_B) of the at least one electrical connection (1) with signals or potentials for the second circuit variant (ASIC-B) is on the inside. [2] Semiconductor circuit according to claim 1, characterized by a selection unit (4; 4') for controlling the at least one switching element (5, 6, 8, 20) depending on a potential assignment of at least one second electrical connection (9; 21, 22, 23) of the semiconductor circuit. [3] Semiconductor circuit according to claim 1 or 2, characterized bythat the first electrical connection (1) is connected via a number of intermediate switching elements (5, 6, 20) corresponding to the number of signal or potential assignments of the first electrical connection (1) to an input or output of functional units (2, 3) associated with the first electrical connection (1) and belonging to the individual circuit variants. [4] Semiconductor circuit according to one of claims 1 to 3, characterized by that the input or output of at least one functional module (2, 3), which in one circuit variant is separated from a first electrical connection (1) via a blocked switching element (5, 6, 20), is connected to a different electrical connection (7) via another conductive switching element (8). [5] Semiconductor circuit according to claim 2, characterized bythat the control of the at least one switching element (5,6,8,20) in the selection unit (4;4') takes place as a function of at least two potential levels applied to the second electrical connection (9). [6] Semiconductor circuit according to claim 2 or 4, characterized by that the control of the at least one switching element (5,6,8,20) in the selection unit (4;4') takes place as a function of at least two potential levels applied to a plurality of second electrical connections (21,22,23). [7] Semiconductor circuit according to one of claims 2, 4 or 5, characterized by that the potential applied to the second electrical connection (9; 21, 22, 23) is the supply voltage of a functional unit (2, 3) or the signal applied to an electrical connection (19) is the enable signal (V EN ) of a functional unit (2,3). [8] Semiconductor circuit according to one of claims 1 to 7, characterized bythat the switching element (5,6,8,20) is a transistor. [9] Semiconductor circuit according to one of claims 1 to 8, characterized by that the first electrical connection is a wire bridge (14) to a plate (16) connected to a housing of the semiconductor circuit with a reference potential of the semiconductor circuit. [10] Semiconductor circuit according to claim 9, characterized by that the plate (16) is an exposed plate projecting beyond the housing of the semiconductor circuit and having the ground potential of the semiconductor circuit.
Citation Information
Patent Citations
Redundant pinout configuration for signal enhancement in IC packages
US20030141578A1
Power-gating cell for virtual power rail control
US20060055391A1
Power control circuitry and method
US20090045677A1
Semiconductor device
US20090051406A1
Multifunctional chip wire bonds
US5646451A