Switching element control circuit

Abstract

Switching element control circuit, comprising: a control circuit main unit that regulates a voltage applied to a control terminal of a switching element and controls the ON / OFF of the switching element; a current detection unit that outputs a control interruption signal for the switching element when current flowing through the switching element exceeds an overcurrent threshold; a comparator that drives a first control element connected to a control terminal of the switching element when the output voltage of the control circuit main unit exceeds a first reference voltage in order to reduce the output voltage; a differential amplifier that drives a second control element, connected to the control terminal of the switching element, according to a voltage difference between the output voltage of the control circuit main unit and a second reference voltage that is lower than the first reference voltage, in order to maintain the output voltage at the second reference voltage; and an interrupt unit that activates the comparator and the differential amplifier to drive the first and second control elements when the current detection unit outputs the drive interrupt signal.

Description

TECHNICAL AREA

[0001] The present invention relates to a switching element control circuit which includes an overcurrent protection function for switching elements such as IGBTs and MOSFETs. BACKGROUND

[0002] A well-known power converter for driving an AC load is a power converter comprising two switching elements, Q1 and Q2, connected in totem-pole configuration to form a half-bridge circuit. These elements alternately switch ON and OFF to toggle the DC voltage. Switching elements Q1 and Q2 may consist of, for example, a high-voltage IGBT or a high-voltage MOSFET. It is also known that an overcurrent protection circuit for switching elements Q1 and Q2 is incorporated into a switching element control circuit that controls the ON / OFF switching of switching elements Q1 and Q2.

[0003] Fig. Figure 6 is a schematic block diagram depicting a main section of an example of a conventional switching element control circuit, where Q1 to Q6 are six switching elements consisting of IGBTs forming a half-bridge circuit for each phase (U-phase, V-phase, and W-phase) of a three-phase AC load. The switching element control circuit 1 is arranged for each of the switching elements Q1 to Q6 and controls the ON / OFF of each switching element Q1 to Q6, which are in a predetermined phase relationship to each other.

[0004] In Fig. Figure 6 shows the switching element control circuit 1 for the switching element Q2, but the switching element control circuits for the other switching elements Q1 and Q3 to Q6 also have the same configuration.

[0005] The switching element control circuit 1 comprises a control circuit main unit 2, which applies a predetermined gate voltage VG to the switching element Q2 to control the ON / OFF state of the switching element Q2. This control circuit main unit 2 consists of a p-channel MOSFET and an n-channel MOSFET, which are, for example, connected in a totem-pole configuration. The p-channel MOSFET and the n-channel MOSFET switch ON / OFF in addition to each other when a control signal CS is received, and generate the gate voltage VG as pulses.

[0006] An overcurrent protection device 3, included in the switching element control circuit 1, has a comparator CMP that detects the current flowing through the switching element Q2 by converting the current into voltage using the voltage divider resistors R1 and R2 and comparing the detected voltage Vi with a reference voltage Vb1 to define the overcurrent threshold. The comparator CMP disables the input of the control signal CS to the p-channel MOSFET by setting a flip-flop FF when an overcurrent is detected. Therefore, when the flip-flop FF is set, the control of the switching element Q2 by the control circuit main unit 2 is interrupted.

[0007] The overcurrent protection circuit 3 comprises a differential amplifier AMP, which regulates the gate voltage VG applied to the switching element Q2 based on the reference voltage Vb2, which is set higher than the reference voltage Vb1 (Vb2 > Vb1), and the detected voltage Vi. This differential amplifier AMP releases the switching element Q2 from the overcurrent state by reducing the gate voltage VG to the reference voltage Vb2 when the detected voltage Vi is higher than the reference voltage Vb2. The function of the differential amplifier AMP for regulating the current flowing through the switching element Q2 is described in detail, for example, in patent specification 1. A generic protection circuit is also described in patent specification 2. Patent specification 1: Japanese patent application no. JP 2010 - 62 860 A Patent specification 2: Japanese patent application no. JP 2005 - 33 611 A BRIEF SUMMARY OF THE INVENTION

[0008] In the switching element control circuit 1, configured as previously described, the p-channel MOSFET is switched off when an overcurrent is detected; that is, the control to suppress the gate voltage VG is assigned solely to the differential amplifier AMP. More precisely, when the control signal CS is reversed to the lower level, as caused by the change in the gate voltage VG in Fig. As shown in Figure 7, the p-channel MOSFET switches ON, and the gate voltage VG increases accordingly. Then, the switching element Q2 switches ON due to this gate voltage VG, and the current flowing through switching element Q2 increases. If the current flowing through switching element Q2 (sensed voltage Vi) exceeds the overcurrent threshold (reference voltage Vb2), the gate voltage VG is suppressed by the feedback via the differential amplifier AMP and converges to the reference voltage Vb2.

[0009] As mentioned previously, when regulating the gate voltage VG, it is preferable to suppress the temporary increase in the gate voltage VG by maximizing the control reactivity when an overcurrent is detected. However, in the case of the previously mentioned feedback loop via the differential amplifier AMP, the delay time is long. This means that a fast response when an overcurrent is detected is difficult. Another problem is that the control response time via the differential amplifier AMP is easily affected by the gate capacitance of switching element Q2.

[0010] In this respect, it is an object of the present invention to provide a switching element control circuit that has a fast control response to the gate voltage of the switching element when the overcurrent is detected, and can effectively protect the switching element from the overcurrent by allowing the gate voltage to converge rapidly to a predetermined voltage.

[0011] To solve the above problem, a switching element control circuit according to the present invention comprises: a control circuit main unit that regulates the gate voltage applied to a control terminal of a switching element consisting of a high-voltage IGBT or a high-voltage MOSFET, and that controls the ON / OFF of the switching element; a current detection unit that outputs a control interrupt signal for the switching element when current flowing through the switching element exceeds an overcurrent threshold; a comparator that drives a first control element connected to a control terminal of the switching element when the output voltage of the control circuit main unit exceeds a first reference voltage, in order to reduce the output voltage;a differential amplifier that drives a second control element, connected to the control terminal of the switching element, according to a voltage difference between the output voltage of the control circuit main unit and a second reference voltage lower than the first reference voltage, in order to maintain the output voltage at the second reference voltage; and a circuit interrupt unit that activates the comparator and the differential amplifier to drive the first and second control elements when the current detection unit outputs the control interrupt signal.

[0012] It is preferred that the interruption unit comprises a gate circuit that applies a comparator output to the first control element when the control interruption signal is output, and a third control element that forcibly switches off the second control element when the control interruption signal is not output. It is also preferred that the control circuit main unit includes an input gate circuit in its input stage that disables the input of a control signal to the control circuit main unit when the control interruption signal is output, in order to interrupt the ON / OFF control of the switching element.

[0013] Each of the first to third control elements is, for example, a MOSFET. It is preferred that the first and second control elements are arranged such that their saturation current can be adjusted according to the gate capacitance of the switching element.

[0014] According to the switching element control circuit, which has the configuration described above, when the output voltage of the control circuit's main unit exceeds the first reference voltage, the first control element, connected to the switching element's control terminal, is switched on by the comparator, and the switching element's gate voltage is rapidly reduced. Furthermore, this control is achieved simply by driving the ON of the first control element, allowing the gate voltage of the switching element to be reduced more quickly and the control response improved, compared to conventional gate voltage feedback via the differential amplifier.

[0015] Furthermore, the feedback of the second control element is activated by the differential amplifier after the control, which reduces the gate voltage via the comparator based on the difference in control reactivity, has been activated. Subsequently, the gate voltage is regulated via the second control element under the control of the differential amplifier, and the gate voltage converges to a predetermined voltage. Therefore, if an overcurrent is generated, the gate voltage is quickly converted to a predetermined voltage with good control reactivity through a combination of the control of the first control element using the comparator and the control of the second control element using the differential amplifier, and this converted state can be kept stable. Consequently, the reactivity when an overcurrent is generated can be increased, and the switching element can be reliably protected. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] They show: Fig. 1 a schematic block diagram of a switching element control circuit according to an embodiment of the present invention; Fig. 2. A time diagram to describe the operation of the in Fig. 1 illustrated switching element control circuit; Fig. 3 a group of diagrams for describing the effect of the switching element control circuit according to the present invention; Fig. 4 a group of diagrams to show the difference of the control response characteristic curve which depends on the gate capacitance of the switching element; Fig. 5 a group of diagrams to show the control response characteristic when the saturation current of the second control element is adjusted; Fig. 6 a schematic block diagram illustrating an example of a conventional switching element control circuit that includes an overcurrent protection function; and Fig. 7 a graph showing the operating characteristic curve of the in Fig. The conventional circuit shown in the diagram 6 is shown. BEST EXECUTION OF THE INVENTION

[0017] A switching element control circuit according to an embodiment of the present invention will now be described with reference to the drawings.

[0018] Fig. Figure 1 is a schematic block diagram depicting a main section of the switching element control circuit 10 according to the embodiment, wherein Q is a switching element controlled by the switching element control circuit 10. This switching element Q consists, for example, of an n-channel high-voltage MOSFET (MM1) and includes a current-sensing MOSFET (SM1) connected in parallel. The current-correcting MOSFET (SM1) comprises a channel region that is [1 / n] of the high-voltage MOSFET (MM1) and outputs, for example, [1 / 100] current Is that is proportional to the current flowing through the high-voltage MOSFET (MM1).

[0019] The switching element control circuit 10 is configured to operate by receiving a power supply voltage VCC, whose reference potential is, for example, ground potential (GND). To control the switching element Q on the upper branch side of the half-bridge circuit forming the previously mentioned power converter, the switching element control circuit 10 is configured to operate by receiving a power supply voltage VB, whose reference potential is the midpoint potential VS of the half-bridge circuit.

[0020] The switching element control circuit 10 comprises a control circuit main unit 11, which controls the ON / OFF state of the switching element Q. The control circuit main unit 11 consists of a p-channel MOSFET (PM1) and an n-channel MOSFET (NM1), which are connected, for example, in a totem-pole configuration. The p-channel MOSFET and the n-channel MOSFET switch ON / OFF in a complementary fashion when a control signal DRV is received and generate pulses of the gate voltage VG at the drain. In other words, for a voltage at the terminal of each drain of the p-channel MOSFET (PM1) and the n-channel MOSFET (NM1), i.e., the drain voltage, the gate voltage VG, which is applied to the control terminal of the switching element Q, is generated as an output voltage.

[0021] The control circuit main unit 11 also includes an input gate circuit in its input stage, and the input gate circuit consists of logic circuits G1 and G2 for controlling the input of the control signal DRV. The logic circuits G1 and G2, which form the input gate circuit, are controlled by the output of a current detection unit (mentioned later) when the current detection unit detects an overcurrent. Therefore, the control circuit main unit 11 only generates and outputs pulse signals when the input gate circuit is activated, in order to control the ON / OFF of the switching element Q as a gate voltage VG.

[0022] The current detection unit 12, which is included in the switching element control circuit 10, has voltage divider resistors R4 and R5 that divide and detect the voltage generated by the current output by the MOSFET (SM1) to the switching element Q. The current detection unit 12 includes a comparator CMP2, which compares the detected voltage Vsc, measured by the voltage divider resistors R4 and R5 and proportional to the current flowing through the switching element Q, with the reference voltage Vref2, which corresponds to the predetermined overcurrent threshold. The comparator CMP2 determines that the overcurrent flows through the switching element Q when the detected voltage Vsc exceeds the reference voltage Vref2 and outputs a control interrupt signal OC.

[0023] When the current detection unit 12 detects an overcurrent, the input gate circuit, consisting of logic circuits G1 and G2 located in the input stage of the control circuit main unit 11, disables the application of the control signal DRV to the p-channel MOSFET (PM1) and the n-channel MOSFET (NM1) by receiving the output of the comparator CMP2. In other words, when the current detection unit 12 detects an overcurrent, the input gate circuit disables the operation of the control circuit main unit 11 to prevent the ON / OFF control of the switching element Q.

[0024] The distinguishing feature of the switching element control circuit 10, in addition to the previously mentioned basic configuration, is that the first control element 13 (NM3), which is an n-channel MOSFET, and a second control element 14 (NM2), which is also an n-channel MOSFET, are inserted in parallel between the gate terminal of the switching element Q and the reference potential. Furthermore, the switching element control circuit 10 includes a comparator 15 (CMP1), which controls the ON / OFF of the first control element 13 (NM3), and a differential amplifier 16 (AMP), which controls the operation of the second control element 14 (NM2). The comparator 15 (CMP1) and the differential amplifier 16 (AMP) form a comparator control unit 17 for controlling the gate voltage VG.

[0025] One function of the comparator 15 (MP1) is primarily to activate the first control element 13 (NM3) and lower its gate voltage VG when the output voltage of the main control circuit unit 11, i.e., the gate voltage VG of switching element Q, exceeds the first reference voltage V1 (not shown). The control operation of the first control element 13 (NM3) is referred to as "fast control." The differential amplifier 16 (AMP) is activated when the output voltage of the main control circuit unit 11 exceeds the second reference voltage V2, which is lower than the first reference voltage V1 (not shown). The differential amplifier 16 (AMP) then controls the operation of the second control element 14 (NM2) according to the voltage difference between the gate voltage VG and the second reference voltage V2.

[0026] The first reference voltage V1 is set to, for example, 12 V, and the second reference voltage V2 is set to, for example, 11 V. Reference voltages V1 and V2 are set such that they actuate comparator 15 (CMP1) upstream of differential amplifier 16 (AMP) to reduce the gate voltage (VG). Therefore, if an overcurrent is generated, differential amplifier 16 (AMP) starts operating after the fast control has been initiated. The gate voltage VG is then fed back from differential amplifier 16 (AMP), which controls the operation of the second control element 14 (NM2). The gate voltage VG converges to and is held at the second reference voltage V2. This control for the second control element 14 (NM2) is referred to as "hold control."

[0027] In this embodiment, the reference voltage Vref1 is supplied to the comparator 15 (CMP1) and the differential amplifier 16 (AMP) as a reference voltage, as shown in Fig. Figure 1 shows the gate voltage VG being divided into the voltages Va and Vb by the voltage divider resistors R1, R2 and R3, and the voltages Va and Vb are each supplied to the comparator 15 (CMP1) and the differential amplifier 16 (AMP).

[0028] Therefore, the comparator 15 (CMP1) performs the aforementioned comparison processing between the gate voltage VG and the first reference voltage V1 equivalently by comparing the reference voltage Vref1 and the voltage Va generated by dividing the gate voltage VG. Likewise, the differential amplifier 16 (AMP) performs the aforementioned operating control for the second control element 14 (NM2) equivalently by inputting the reference voltage Vref1 and the voltage Vb, each generated by dividing the gate voltage VG, based on the differential voltage between the gate voltage VG and the second reference voltage V2.

[0029] The switching element control circuit 10 also includes a shutdown unit 18. The shutdown unit 18 activates the comparator 15 (CMP1) and the differential amplifier 16 (AMP) in the comparator control elements 13 and 14 (NM3 and NM2) to control the first and second control elements 13 and 14 (NM3 and NM2) when the comparator CMP2 of the current detection unit 12 outputs the control shutdown signal OC. More precisely, the shutdown unit 18 includes an AND gate G4 which applies the output of the comparator 15 (CMP1) to the first control element 13 (NM3) only when the control shutdown signal OC is output.

[0030] Furthermore, the interrupt unit 18 includes a third control element 19 (NM4), which is an n-channel MOSFET inserted between the gate of the second control element 14 (NM2) and ground potential (GND). The third control element 19 (NM4) is driven by a signal generated by inverting the drive interrupt signal OC via a NOT circuit G3. Therefore, if no overcurrent is generated in the switching element Q, i.e., during normal operation, the third control element 19 (NM4) necessarily disables the operation of the second control element 14 (NM2).

[0031] In other words, the shutdown unit 18 activates the control of the first and second control elements 13 and 14 (NM3 and NM2) only when the current detection unit 12 detects an overcurrent. Subsequently, the comparator 15 (CMP1) and the differential amplifier 16 (AMP) each perform the fast control and the hold control, respectively, to reduce the gate voltage VG, as previously mentioned. This reduces the current flowing through the switching element Q, and the overcurrent protection operation is then implemented.

[0032] Fig. Figure 2 is a timing diagram illustrating the basic operation of the switching element control circuit 10, configured as previously mentioned. During normal operation, the current Is flowing through the switching element Q does not reach the overcurrent detection level, even when the ON / OFF of the switching element Q is controlled according to the control signal DRV. Therefore, the current detection unit 12 does not output the control interrupt signal OC during normal operation. This means that the control signals PDRV and NDRV, generated from the control signal DRV via the input gate circuit, are applied directly to the p-channel MOSFET (PM1) and the n-channel MOSFET (NM1) of the control circuit main unit 11.

[0033] The control interrupt signal OC is no longer output, so neither the first control element 13 (NM3) nor the second control element 14 (NM2) is activated. Therefore, the previously mentioned FAST control and HOLD control are not executed. Subsequently, the gate voltage VG applied to the switching element Q becomes the voltage generated in each drain of the p-channel MOSFET (PM1) and the n-channel MOSFET (NM1) of the control circuit main unit 11.

[0034] Whereas if the current Is flowing through the switching element Q becomes abnormally high, as at time t1 in Fig. As shown in Figure 2, the drive interrupt signal OC is output at a point where the detected voltage Vsc, generated by the current Is, exceeds the reference voltage Vref2. The input gate circuit then interrupts the output of the drive signals NDRV and PDRV via this drive interrupt signal OC. Consequently, in the main control circuit unit 11, the p-channel MOSFET (PM1) is held in the OFF state, and the n-channel MOSFET (NM1) is also held in the OFF state.

[0035] At this point, the interrupt unit 18, which has received the control interrupt signal OC, activates the AND gate G4 and switches off the third control element 19 (NM4). Subsequently, the output of the comparator 15 (CMP1) is applied to the gate of the first control element 13 (NM3), and the first control element 13 (NM3) performs fast control to lower the gate voltage VG. This fast control lowers the drain voltage of the p-channel MOSFET (PM1), i.e., the gate voltage VG.

[0036] Furthermore, the third control element 19 (NM4) in the interrupt unit 18 now switches OFF, so that the output of the differential amplifier 16 (AMP) is applied to the second control element 14 (NM2). Then, under the control of the differential amplifier 16 (AMP), the regulation to maintain the gate voltage VG at a constant level, i.e., the previously mentioned HOLD regulation, is initiated via the second control element 14 (NM2). This HOLD regulation is executed after a regulation response delay that is unique to the differential amplifier 16 (AMP).

[0037] Then, as in Fig. As shown in Figure 2, the gate voltage VG decreases due to the FAST control and the HOLD control under the control of comparator 15 (CMP) practically without delay from the moment an overcurrent is detected. Then, after the FAST control is interrupted by comparator 15 (CMP1) when the gate voltage VG decreases, the gate voltage VG converges to the second reference voltage V2 and is held at it under the control of differential amplifier 16 (AMP). Therefore, the gate voltage VG is reduced with good responsiveness to suppress the overcurrent of the switching element Q and is thus held at a predetermined voltage, allowing a constant current to be supplied to the switching element Q. When the n-channel MOSFET (NM1) is switched on by the drive signal NDRV, which is generated by the control signal DRV via the input gate circuit, the gate voltage VG is set to ground potential.

[0038] Therefore, according to the switching element control circuit 10, which performs the control to reduce the gate voltage VG by functioning as described above, the overcurrent protection operation for the switching element Q is accelerated when an overcurrent is generated. Even when an overcurrent is generated, the gate voltage VG can be kept at a constant level. Consequently, the operating state of the switching element Q can be maintained, and the ON / OFF of the switching element Q can be controlled without difficulty. Therefore, stable operation for the power converter, which includes the switching element Q, can be ensured.

[0039] Fig. Figure 3 shows the control response characteristic of the switching element control circuit 10 according to the present invention for the switching element Q (solid lines) in comparison to the control response characteristic of the in Fig. 6. Conventional switching element control circuit 1 (dashed lines) shown. As in Fig. Figure 3 shows that when an overcurrent is generated in the switching element Q, the FAST signal is generated in the switching element control circuit 10 according to the present invention, and the first control element 13 (NM3) is switched on with good responsiveness. Therefore, the output voltage OUT of the switching element control circuit 10, i.e., the gate voltage VG to be applied to the gate of the switching element Q, is reduced without delay.

[0040] In the case of the conventional switching element control circuit 1, the FAST control function, which is a feature of the present invention, is not included, so that its output voltage OUT is simply kept at an approximately constant voltage level, as shown by the dashed lines in Fig. Figure 3. This proves that the switching element control circuit 10 according to the present invention has a better overcurrent protection function with regard to control reactivity compared to the conventional switching element control circuit 1. Furthermore, the control reactivity can be improved by a simple configuration, i.e., the comparator 15 (CMP1) is arranged in parallel with the differential amplifier 16 (AMP), and the previously mentioned rapid control is implemented. Therefore, the present invention offers significant advantages.

[0041] If the saturation current value of the first control element 13 (NM3) and that of the second control element 14 (NM2) are the same, the reaction characteristic of the FAST control, the reaction characteristic of the HOLD control and the change characteristic of the gate voltage VG change depending on the gate capacitance (consumer capacitance) of the switching element Q. Fig. Figure 4 shows a comparison of the characteristic curve when the gate capacitance of switching element Q is 10 pF (solid lines) and when it is 1 pF (dashed lines), under the condition that the saturation current of each control element 13 and 14 (NM3 and NM2) is 32 mA. As in Fig. As shown in Figure 4, if the saturation current of each control element 13 and 14 (NM3 and NM2) is the same, the response characteristic depends on the gate capacitance of the switching element Q.

[0042] It also shows that the response characteristic of the FAST control, the response characteristic of the HOLD control, and the change characteristic of the gate voltage VG are improved, as shown in Fig. Figure 5 shows that when the channel width of the first control element 13 (NM3) is changed and its saturation current value is changed to 3.2 mA, which is 1 / 10 of the previously mentioned current value. Furthermore, this characteristic curve is approximately the same as when the gate capacitance of the switching element Q is equal to 10 pF, as in Fig. 4 shown.

[0043] Therefore, the differential amplifier 16 (AMP) can efficiently regulate the gate voltage VG to a constant level by changing the channel width of the first control element 13 (NM3) to adjust its saturation current value so that it is low. This means that by correctly adjusting the saturation current value of the first control element 13 (NM3), stable overcurrent protection can be performed, independent of the gate capacitance (load capacitance) of the switching element Q, in conjunction with the previously mentioned fast regulation to reduce the gate voltage VG by the comparator 15 (CMP1). Consequently, according to the present invention, the switching element control circuit 18 can perform overcurrent protection quickly and stably for the switching element Q, resulting in significant practical advantages.

[0044] The present invention is not limited to the embodiment described above. Here, the switching element control circuit 10 for the switching element Q, which forms the lower branch of the converter's half-bridge circuit, has been described; however, it is understood that the switching element control circuit 10 for the switching element Q, which forms the upper branch, is configured in the same way. The switching element control circuit 10 can be implemented as an intelligent power module (IPM) in which the switching element control circuit 10 is integrated on the semiconductor substrate together with the switching element Q. The present invention can be modified in various ways within the scope of which its true spirit is not lost. REFERENCE MARK LIST 10 Switching element control circuit 11 Control circuit main unit 12 Current verification unit 13 first control element (n-channel MOSFET) 14 second control element (n-channel MOSFET) 15 Comparator 16 Differential amplifiers 17 Comparative control unit 18 Operational Interruption Unit 19 third control element (n-channel MOSFET)

Claims

[1] Switching element control circuit comprising: a control circuit main unit that regulates a voltage applied to a control terminal of a switching element and controls the ON / OFF of the switching element; a current detection unit that outputs a control interruption signal for the switching element when current flowing through the switching element exceeds an overcurrent threshold; a comparator that drives a first control element connected to a control terminal of the switching element when the output voltage of the control circuit main unit exceeds a first reference voltage in order to reduce the output voltage; a differential amplifier that drives a second control element, connected to the control terminal of the switching element, according to a voltage difference between the output voltage of the control circuit main unit and a second reference voltage that is lower than the first reference voltage, in order to maintain the output voltage at the second reference voltage; and an interrupt unit that activates the comparator and the differential amplifier to drive the first and second control elements when the current detection unit outputs the drive interrupt signal. [2] Switching element control circuit according to claim 1, wherein the switching element is a high-voltage IGBT or a high-voltage MOSFET, and the first and second control elements are MOSFETs inserted between a gate of the switching element and a reference potential. [3] Switching element control circuit according to claim 1, wherein the interruption unit comprises a gate circuit which applies an output of the comparator to the first control element when the control interruption signal is output, and a third control element which forcibly switches off the second control element when the control interruption signal is not output. [4] Switching element control circuit according to claim 1, wherein the control circuit main unit comprises in its input stage an input gate circuit which disables the input of a control control signal for the control circuit main unit when the control interrupt signal is output to interrupt the control of the ON / OFF of the switching element. [5] Switching element control circuit according to claim 1, wherein the saturation current of the first and second control elements is adapted according to a gate capacitance of the switching element.

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