ENERGY CONVERSION DEVICE

Abstract

Energy conversion device comprising: - a rectifier circuit (2) having a plurality of diodes (201-204) with a full bridge configuration and rectifying the input from an AC power supply (1); - a choke coil (3) connected to a DC terminal of the rectifier circuit (2); - an inverter circuit (4), wherein a first branch (A) having a first switching element (401) and a second switching element (402) connected in series with each other with a connection point (4a) therebetween as a first AC end (4a), a second branch (B) having a third switching element (403) and a fourth switching element (404) connected in series with each other with an intermediate connection point (4b) as a second AC end (4b), and a DC capacitor (5) connected in parallel between DC buses (P, N), wherein the first AC end (4a) is connected to a positive DC terminal (2a) of the rectifier circuit (2), wherein a negative (N) of the DC buses (P, N) is connected to a negative DC terminal (2b) of the rectifier circuit (2); - an isolation transformer (6) having a primary winding (6a) and a secondary winding (6b), wherein the first AC end (4a) and the second AC end (4b) of the inverter circuit (4) are connected to the respective ends of the primary winding (6a); and - a control circuit (11) for performing an output control of the inverter circuit (4), - wherein the control circuit (11) performs high power factor control for the circuit current (iac) flowing from the AC power supply (1) via the rectifier circuit (2) by means of PWM control for the first branch (A) using the duty cycles of the first and second switching elements (401, 402), and controls the voltage of the DC capacitor (5) by means of PWM control for the second branch (B) using the duty cycles of the third and fourth switching elements (403, 404), limited by an upper limit (Dlim) which is the smaller of the duty cycles for the first and second switching elements (401, 402) in the first branch (A), so as to control the power output to the secondary side of the isolation transformer (6).

Description

Technical area

[0001] The present invention relates to a power conversion device that performs power conversion of an input signal from an AC power supply and supplies a desired power to the secondary side of an isolation transformer. State of the art

[0002] Recently, a single-stage conversion method has been proposed, which simultaneously achieves power factor control of an input AC current and output power control in a single power conversion device. As a conventional single-stage conversion type power conversion device, a converter circuit for a charger is described below.

[0003] The converter circuit for the charger is equipped with the following: a half-bridge rectifier circuit formed of two diodes; a capacitor connected in parallel to the two ends of the half-bridge rectifier circuit; a full-bridge circuit formed of four switching elements, which is configured such that the two ends of a first half-bridge circuit formed of two switching elements (1) and (2) and a second half-bridge circuit formed of two switching elements (3) and (4) are connected in parallel to the two ends of the capacitor; a choke coil between one end of an AC power supply, the other end of which is connected to the connection point between the switching elements in the first half-bridge circuit, and the connection point between the diodes in the half-bridge rectifier circuit;a primary coil of a high-frequency transformer connected between the connection points between the switching elements in the first and second half-bridge circuits; four driver circuits connected to the four switching elements; and a control circuit, forming a primary circuit of a converter.

[0004] The control circuit performs turn-on / turn-off control alternately for a group of the switching elements (1) and (4) and a group of the switching elements (2) and (3) in the full bridge circuit formed of the four switching elements.

[0005] Furthermore, a full-bridge rectifier circuit connected in parallel with the secondary coil of the high-frequency transformer and a capacitor connected in parallel with both ends of the full-bridge rectifier circuit form a secondary circuit of the inverter, which rectifies the high-frequency power generated by the primary circuit and charges a battery (see, for example, Patent Document 1).

[0006] In addition, reference should be made to Patent Document 2, from which a switching power supply is known which has two switching arms with two switching elements, a series circuit comprising a capacitor and a primary winding, a rectifier circuit for voltage regulation, a choke coil for connection to the DC input, and a controller which switches the switching elements synchronously in pairs. BibliographyPatent document Patent Document 1: Japanese Patent Application Laid-Open No. JP H11-243646 A Patent document 2: US 2012 / 0 307 529 A1 Summary of the inventionProblems to be solved by the invention

[0007] In such a conventional power conversion device, the two half-bridge circuits of the full-bridge circuit are controlled synchronously with the same duty cycle. Therefore, if high power factor control is performed on the input current, the DC capacitor voltage of the full-bridge circuit may deviate from the operating range, causing a problem such as applying an overvoltage to the power conversion device or further increasing a ripple component of the output current.

[0008] The present invention was conceived to solve the above problem. Therefore, it is an object of the present invention to provide a power conversion device that achieves high power factor control for the input current and output power control while maintaining high reliability. Solving the problems

[0009] The object underlying the invention is achieved by an energy conversion device having the features of independent claim 1. Advantageous developments of the energy conversion device according to the invention are specified in dependent claims 2 to 8. Effect of the invention

[0010] The power conversion device according to the present invention can achieve high power factor control for the input current and at the same time achieve output power control with high reliability. Short description of the drawings Fig. 1 is a diagram showing the configuration of a power conversion device according to Embodiment 1 of the present invention. Fig. 2 is a diagram showing the waveforms of the gate signals and the waveforms in some areas for explaining the operation of the power conversion device according to Embodiment 1 of the present invention. Fig. 3 is a circuit diagram for explaining the operation in a first mode of the power conversion device according to Embodiment 1 of the present invention. Fig. 4 is a circuit diagram for explaining the operation in a second mode of the power conversion device according to Embodiment 1 of the present invention. Fig. 5 is a circuit diagram for explaining the operation in a third mode of the power conversion device according to Embodiment 1 of the present invention. Fig. 6 is a circuit diagram for explaining the operation in a fourth mode of the power conversion device according to Embodiment 1 of the present invention. Fig. 7 is a diagram showing the duty cycle for a first arm according to Embodiment 1 of the present invention. Fig. 8 is a diagram showing the duty cycle for a second arm according to Embodiment 1 of the present invention. Fig. 9 is a control block diagram showing the generation of a duty cycle command for the first branch according to Embodiment 1 of the present invention. Fig. 10 is a control block diagram showing the generation of an upper limit for the duty cycle command for the second branch according to Embodiment 1 of the present invention. Fig. 11 is a control block diagram showing the generation of a basic duty cycle command for the second branch according to Embodiment 1 of the present invention. Fig. 12 is a control block diagram showing the generation of a duty cycle command for the second branch according to Embodiment 1 of the present invention. Fig. 13 is a waveform diagram for explaining the generation of gate signals using a sawtooth wave in the power conversion device according to Embodiment 1 of the present invention. Fig. 14 is a control block diagram showing the generation of gate signals for the first branch according to Embodiment 1 of the present invention. Fig. 15 is a control block diagram showing the generation of gate signals for the second branch according to Embodiment 1 of the present invention. Fig. 16 is a waveform diagram for explaining the generation of gate signals using a triangular wave in the power conversion device according to Embodiment 2 of the present invention. Fig. 17 is a control block diagram showing the generation of gate signals for a first branch according to Embodiment 2 of the present invention. Fig. 18 is a control block diagram showing the generation of gate signals for a second branch according to Embodiment 2 of the present invention. Description of the embodimentsEmbodiment 1

[0011] Next, an energy conversion device according to Embodiment 1 of the present invention will be described. Fig. 1 is a schematic configuration diagram of the energy conversion device according to Embodiment 1 of the present invention.

[0012] As in Fig. 1, the power conversion device includes: a main circuit for converting AC power from an AC power supply 1 into DC power and outputting the DC power to a battery 10, which is a DC circuit; and a control circuit 11.

[0013] The main circuit includes: a rectifier circuit 2 for rectifying the input from the AC power supply 1; a reactor 3 as a current limiting circuit; an inverter circuit 4; an isolation transformer 6; a second rectifier circuit 7; a smoothing reactor 8 as a second reactor; and a smoothing capacitor 9.

[0014] The rectifier circuit 2 is a diode rectifier circuit formed of four diodes 201 to 204 in a full-bridge configuration. The inverter circuit 4 is a full-bridge inverter circuit, with a first branch A including a first switching element 401 and a second switching element 402 connected in series with a connection point therebetween as a first AC end 4a; a second branch B including a third switching element 403 and a fourth switching element 404 connected in series with a connection point therebetween as a second AC end 4b; and a DC capacitor 5 connected in parallel between DC buses (P and N buses).

[0015] In this case, the second rectifier circuit 7 is a diode rectifier circuit formed of four diodes 701 to 704 in a full-bridge configuration, but it may also be another rectifier type using a diode or a rectifier type using an active element.

[0016] The isolation transformer 6 has a primary winding 6a and a secondary winding 6b, wherein the first AC end 4a and the second AC end 4b of the inverter circuit 4 are connected to the two ends of the primary winding 6a, and wherein the AC terminals of the second rectifier circuit 7 are connected to the two ends of the secondary winding 6b. On the primary side of the isolation transformer 6, the output of the AC power supply 1 is connected to the AC terminals of the rectifier circuit 2, and a positive DC terminal 2a of the rectifier circuit 2 is connected to the first AC end 4a of the inverter circuit 4 via the choke coil 3.

[0017] A negative DC terminal 2b of the rectifier circuit 2 is connected to a negative DC bus (hereinafter: N-bus) of the inverter circuit 4.

[0018] On the secondary side of the isolation transformer 6, the smoothing capacitor 9 is connected in parallel to the battery 10; a first DC output terminal of the second rectifier circuit 7 is connected to a first terminal of the smoothing capacitor 9 via the smoothing choke coil 8; and a second DC output terminal 7 is connected to a second terminal of the smoothing capacitor 9.

[0019] The first to fourth switching elements 401 to 404 are formed of IGBTs (insulated gate bipolar transistors), to which diodes 401a to 404a are connected in antiparallel, respectively.

[0020] Instead of IGBTs, the first to fourth switching elements 401 to 404 can also be semiconductor switching elements, such as MOSFETs (metal-oxide-semiconductor field-effect transistors), in which diodes are included between the source and drain. In the case of MOSFETs, the included diodes can be used as diodes 401a to 404a.

[0021] Although the choke coil 3 is connected to the positive DC terminal 2a of the rectifier circuit 2, the choke coil 3 may also be connected to the negative DC terminal 2b, or it may be connected in a distributed manner to both the positive DC terminal 2a and the negative DC terminal 2b of the rectifier circuit 2.

[0022] Instead of the battery 10, the DC circuit may be a DC load that must be separated from the input of the AC power supply 1, and it may be formed of, for example, an electric double layer capacitor or the like.

[0023] Furthermore, voltage sensors are provided for detecting the voltage Vac of the AC power supply 1, the voltage Vdc of the DC capacitor 5, and the voltage Vbat of the smoothing capacitor 9, respectively. Current sensors are provided for detecting the current iac as the circuit current flowing from the AC power supply 1 through the rectifier circuit 2 and the charging current (DC current) ibat for the battery 10. In this case, the current flowing through the reactor 3 is detected as the current iac.

[0024] The control circuit 11 receives the detected DC capacitor voltage Vdc, the smoothing capacitor voltage Vbat, the AC power supply voltage (AC voltage) Vac, the current iac, and the charging current ibat. Based on these values, the control circuit 11 performs high-frequency PWM control to generate the gate signals G1 to G4 for the first to fourth switching elements 401 to 404. This performs output control of the inverter circuit 4.

[0025] At this time, the control circuit 11 generates a gate signal GA (G1, G2) for the first arm A so that the input power factor from the AC power supply 1 becomes substantially 1, that is, it performs high power factor control for the current iac; and it generates a gate signal GB (G3, G4) for the second arm B so that the voltage Vdc of the DC capacitor 5 becomes the target voltage Vdc*. Thereby, it turns the first to fourth switching elements 401 to 404 on and off to perform output control of the inverter circuit 4.

[0026] The operation of the power conversion device configured in the above-described manner, that is, the operation for outputting DC power to the battery 10, will be described below.

[0027] Fig. 2 is a diagram showing the gate signals G1 to G4 for the first to fourth switching elements 401 to 404, the current iac, and the voltage Vdc of the DC capacitor 5. For the voltage Vdc of the DC capacitor 5, the target voltage Vdc* is set to be higher than the peak voltage Vp of the voltage Vac of the AC power supply 1, and the voltage Vdc is controlled to be higher than the peak voltage Vp.

[0028] Since the voltage Vac from the AC power supply 1 is rectified by the rectifier circuit 2 via a full bridge, operation occurs at a frequency twice the AC frequency. The first and second switching elements 401 and 402 in the first branch A, which are driven by the gate signals G1 and G2, are subjected to PWM control, so that the current iac is controlled so that the value of the input current from the AC power supply 1 becomes constant and the input power factor becomes substantially 1.

[0029] The third and fourth switching elements 403 and 404 in the second branch B, which are driven by the gate signals G3 and G4, are controlled to adjust the power supplied to the battery 10 and the charge / discharge value of the DC capacitor 5 so that the voltage Vdc of the DC capacitor 5 assumes a constant target voltage Vdc*. Hereinafter, controlling the current iac so that the input power factor from the AC power supply 1 becomes substantially 1 is simply referred to as "current control."

[0030] As in Fig. 2, the drive cycle of the first to fourth switching elements 401 to 404 is denoted by T, the drive cycle T can be divided into four periods from t0 to t1, from t1 to t2, from t2 to t3 and from t3 to t4 (t0), and the operation modes in these periods are referred to as the first to fourth modes.

[0031] At time t0 (= t4), the first switching element 401, controlled by the gate signal G1, is turned on, and the second switching element 402, controlled by the gate signal G2, is turned off. At this time, the fourth switching element 404, controlled by the gate signal G4, is also turned on simultaneously.

[0032] At time t1, the fourth switching element 404 is switched off.

[0033] At time t2, the first switching element 401 is turned off, and the second switching element 402 is turned on. At this time, the third switching element 403, controlled by the gate signal G3, is also turned on simultaneously.

[0034] At time t3, the third switching element 403 is switched off.

[0035] Fig. 3 to Fig. 6 show circuit diagrams explaining the operations in the operating modes during the respective periods. The circuit diagrams show the current paths in the inverter circuit 4. In this case, the current iac flowing to the reactor 3 flows from the AC power supply 1 through the rectifier circuit 2 to the reactor 3, and is then supplied to the first AC end 4a of the inverter circuit 4.

[0036] In the first mode, during the period from t0 to t1, the first and fourth switching elements 401 and 404 are both turned on, and the current flows through the current path shown in Fig. 3. That is, the current iac flowing through the reactor 3 flows to the primary winding 6a of the isolation transformer 6 and then flows back to the input side via the fourth switching element 404. Furthermore, the current flows from the DC capacitor 5 to the primary winding 6a via the first switching element 401 and then flows back to the DC capacitor 5 via the fourth switching element 404.

[0037] In the first mode, since the first switching element 401 is turned on, the potential on the inverter 4 side of the reactor 3 is fixed at the voltage Vdc. The voltage Vdc of the DC capacitor 5 is controlled to be higher than the peak voltage Vp of the voltage Vac of the AC power supply 1, and the current iac flowing through the reactor 3 decreases. Furthermore, since the DC capacitor 5 discharges current, the voltage Vdc decreases.

[0038] In the second mode during the period t1 to t2, only the first switching element 401 is switched on, and the current flows through the Fig. 4. That is, the current iac flowing through the reactor 3 flows to the DC capacitor 5 via the first switching element 401. Since the second to fourth switching elements 402 to 404 are turned off, there is no current path other than the above.

[0039] In the second mode, since the first switching element 401 is turned on, the potential on the inverter 4 side of the reactor 3 is fixed at the voltage Vdc. The voltage Vdc of the DC capacitor 5 is controlled to be higher than the peak voltage Vp of the voltage Vac of the AC power supply 1, and the current iac flowing through the reactor 3 decreases. Furthermore, since the DC capacitor 5 is charged with current, the voltage Vdc increases.

[0040] In the third mode, during the period from t2 to t3, the second and third switching elements 402 and 403 are both turned on, and the current flows through the current path shown in Fig. 5. That is, the current iac flowing through the reactor 3 flows back to the input side via the second switching element 402. In addition, the current flows from the DC capacitor 5 to the primary winding 6a via the third switching element 403, and then flows back to the DC capacitor 5 via the second switching element 402.

[0041] In the third mode, since the second switching element 402 is turned on, the potential on the inverter circuit 4 side of the reactor 3 is fixed at a potential of 0 on the N-bus, and the current iac flowing through the reactor 3 increases. Furthermore, since the DC capacitor 5 discharges current, the voltage Vdc decreases.

[0042] In the fourth mode, during the period from t3 to t4 (= t0), only the second switching element 402 is switched on, and the current flows through the Fig. 6. That is, the current iac flowing through the reactor 3 flows back to the input side via the second switching element 402. Since the first, third, and fourth switching elements 401, 403, and 404 are turned off, there is no current path other than the above.

[0043] In the fourth mode, since the second switching element 402 is turned on, the potential on the inverter circuit 4 side of the reactor 3 is fixed at a potential of 0 on the N-bus, and the current iac flowing through the reactor 3 increases. Furthermore, since no charging / discharging of current occurs in the DC capacitor 5, the voltage Vdc does not change.

[0044] In the first mode and the third mode, the current flows through the isolation transformer 6, and the polarity of the current flowing through the primary winding 6a is inverted between the first mode and the third mode. That is, an AC current is input to the isolation transformer 6, the AC power is converted into DC power by the second rectifier circuit connected to the secondary winding 6b, the DC power is smoothed by the smoothing reactor 8 and the smoothing capacitor 9, and then the resulting power is supplied to the battery 10. Thus, in the first mode and the third mode, DC power is supplied to the battery 10.

[0045] Since currents of opposite polarities flow through the isolation transformer 6 in the first mode and the third mode, the following applies: To prevent biasing of the isolation transformer 6, the periods of the first mode and the third mode are set to be equal to each other. That is, control is performed such that the on-period of the fourth switching element 404 and the on-period of the third switching element 403 are equal to each other, and their duty cycles are equal to each other.

[0046] As in Fig. 2, the first switching element 401 and the second switching element 402 are controlled so that the on and off states are inverted between them, the current iac decreases during the on period of the first switching element 401, and the current iac increases during the on period of the second switching element 402. By setting t2 in Fig. 2, that is, by adjusting the duty ratios of the first and second switching elements 401 and 402, the increase / decrease of the current iac is adjusted, so that the current control can be achieved.

[0047] The fourth switching element 404 has a turn-on period only within the turn-on period of the first switching element 401, and the third switching element 403 has a turn-on period only within the turn-on period of the second switching element 402. The voltage Vdc decreases during the turn-on periods of the third and fourth switching elements 403 and 404, and the voltage Vdc increases during the period in which only the first switching element 401 is turned on. By setting t3 and t1 in Fig. 2, that is, by adjusting the duty cycles of the third and fourth switching elements 403 and 404, the increase / decrease of the voltage Vdc of the DC capacitor 5 is adjusted so that the voltage Vdc is maintained at the target voltage Vdc*.

[0048] Consequently, current control of the current iac is performed using the first and second switching elements 401 and 402 in the first branch A, and voltage control of the voltage Vdc is performed using the third and fourth switching elements 403 and 404 in the second branch B, respectively, using individual duty cycles. This simultaneously achieves current control and voltage control, and DC power is supplied to the battery 10. The details of the current control and voltage control are described below.

[0049] First, t2 is a time determined depending on the current control, and a duty cycle D1, which represents the on-time period (t0-t2) per drive cycle T of the first switching element 401, is represented by (Expression 1). Furthermore, a duty cycle D2, which represents the on-time period (t2-t4) per drive cycle T of the second switching element 402, is represented by (Expression 2). Here, Vac is the voltage waveform of the AC power supply 1, and Vdc is the voltage of the DC capacitor 5. D1=Vac / Vdc D2=(Vdc−Vac) / Vdc

[0050] The first and second switching elements 401 and 402 are operated with the duty ratios based on (Expression 1) and (Expression 2).

[0051] The fourth switching element 404 is turned on at the same time as the first switching element 401, the third switching element 403 is turned on at the same time as the second switching element 402, and the on-period (t0-t1) of the fourth switching element 404 and the on-period (t2-t3) of the third switching element 403 are equal to each other. The duty ratios D3 and D4, which are the on-periods per drive cycle T of the third and fourth switching elements 403 and 404, are represented by (Expression 3). Here, Vbat is the voltage of the smoothing capacitor 9, N1 is the number of turns of the primary winding 6a of the isolation transformer 6, and N2 is the number of turns of the secondary winding 6b of the isolation transformer 6. D3=D4=(1 / 2)⋅(Vbat / Vdc)⋅(N2 / N1)

[0052] The fourth switching element 404 has an on-period only within the on-period of the first switching element 401, and the third switching element 403 has an on-period only within the on-period of the second switching element 402. Therefore, the duty ratios D3 and D4 are always smaller than the duty ratios D1 and D2, and the relationship between t0 and t4 is as follows. t0≤t2≤t2,t2≤t3≤t4.

[0053] Fig. Figure 7 shows a schematic duty cycle trajectory diagram of duty cycles D1 and D2 for the first branch A, and it shows Dlim, which is an upper bound of the duty cycle D3 (D4) for the second branch B. Each point of Dlim is min(D1, D2) at the corresponding phase, i.e., Dlim is the smaller of the duty cycles D1 and D2.

[0054] As in Fig. As shown in Figure 7, D1 takes a value of 0 at the zero-crossing phases 0 and π of the AC voltage, and it has a peak value at phase π / 2. Therefore, near phases 0 and π, Dlim = D1. In this case, near phase π / 2, D2 < D1, and Dlim = D2.

[0055] A value Dα of Dlim at phase π / 2 is represented by (Expression 4). Where Vp is the peak voltage of the AC voltage Vac. Dα=min(Vp / Vdc,(Vdc−Vp) / Vdc)

[0056] When the duty cycle D3 (D4) is set to be smaller than Dlim, the first mode and third mode periods, which are the periods during which current flows to the isolation transformer 6, are set, and control of the voltage Vdc can be achieved. Here, the condition enabling control of the voltage Vdc, i.e., the control permission condition, is represented by the following expression. D3(D4) <Dα

[0057] That means: (1 / 2)⋅(Vbat / Vdc)⋅(N2 / N1) <min(Vp / Vdc,(Vdc−Vp) / Vdc)

[0058] Fig. 8 is a diagram showing the duty ratio D3 (D4) for the second arm B. In the case where the control permission condition indicated by the above (Expression 5) is satisfied, the value of D3 (D4) calculated by the (Expression 3) is set as a basic duty ratio D3a, and the following relationships are satisfied. If D3a <Dlim,D3(D4)=D3a If D3a <Dlim,D3(D4)=Dlim

[0059] Near the zero-crossing phases 0 and π of the AC voltage, Dlim is essentially infinitely close to 0. Therefore, in the phase range where the calculated value of D3 (D4) is equal to or greater than Dlim, D3 (D4) is set as the value of Dlim. In the other phase range, from the control permission condition, D3 (D4) is smaller than Dlim. Consequently, in the entire phase range, the duty cycle D3 (D4) can be made smaller than Dlim, and the voltage Vdc can be controlled.

[0060] Therefore, regardless of the phase, the duty cycle D3 (D4) of the third and fourth switching elements 403 and 404 in the second branch B can be made smaller than the duty cycles D1 and D2 of the first and second switching elements 401 and 402 in the first branch A, and the voltage Vdc can be controlled to be a constant target voltage Vdc*. This voltage control is an output control in which the output value is controlled to control the voltage Vdc.

[0061] Consequently, the current control is performed by means of a duty cycle control for the first branch A, and the output power control is performed by means of a duty cycle control for the second branch B, ie, the current control and the output power control can be achieved by means of a single inverter circuit 4 with a full-bridge configuration.

[0062] Generally, in the case of a single-phase inverter connected to a single-phase grid, a voltage pulsation with a frequency twice the AC frequency is generated in the DC part. In the present embodiment, since the charging and discharging of the DC capacitor 5 are performed within the drive cycle T of the inverter circuit 4, the generated voltage pulsation is based on the drive cycle T and, in particular, is determined by the charging period in the second mode. Therefore, in the inverter circuit 4, the voltage pulsation with a frequency twice the AC frequency is not generated, the capacitance of the DC capacitor 5 can be greatly reduced, and the DC capacitor 5 can be made smaller.

[0063] In the AC power supply 1, the voltage Vac and the current iac with the power factor 1 are defined by (Expression 6) and (Expression 7). The power Pac of the AC power supply 1 is represented by (Expression 8). In the present embodiment, the power Pac represented by (Expression 8) is fully transmitted to the battery 10.

[0064] If battery 10 has a constant voltage Vbat, then a current ibat supplied to battery 10 is represented by (Expression 9), and it has a pulsation component with a frequency twice the AC frequency. Here, Vac and Iac are the effective voltage and effective current of AC power supply 1, respectively. Vac=(2)Vac⋅sin(ωt) iac=(2)Iac⋅sin(ωt) Pac=Vac⋅Iac(1−cos((2ωt))) ibat=(Vac / Vbat)⋅Iac(1−cos((2ωt)))

[0065] The following describes how to generate the command values for duty cycles D1 to D4 for performing current control and voltage control. The command values for the duty cycles are referred to as duty cycle commands.

[0066] Fig. 9 is a control block diagram showing the generation of duty cycle commands for the first branch A by the control circuit 11. D1* and D2* are duty cycle commands for performing PWM control for the first and second switching elements 401 and 402. By means of the duty cycle commands D1* and D2*, the value of the current from the AC power supply 1 is controlled, and the current iac is controlled so that the input power factor from the AC power supply 1 becomes substantially 1.

[0067] As in Fig. As shown in Figure 9, using as a feedback value the difference 20 between a current command (a sine wave command current) iac* with a sine wave synchronized with the voltage Vac of the AC power supply 1 and the detected current iac, PI control is performed, and the resulting output 21 is divided by the voltage Vdc. This calculates a reference duty cycle command 22 for the second switching element 402. Then, a feedforward term 23 is added to the reference duty cycle command 22 to obtain the duty cycle command D2* for the second switching element 402.

[0068] The feedforward term 23 is (Vdc-Vac) / Vdc, which is represented by the above (Expression 2), and is determined according to the phase of the AC power supply 1 in each drive cycle of the inverter circuit 4. A value obtained by subtracting the duty command D2* from 1 is used as the duty command D1* for the first switching element 401.

[0069] Fig. Figure 10 is a control block diagram showing the generation of Dlim, which is the upper limit of the duty cycle command for the second branch B. As shown in Fig. As shown in Figure 10, D1* and D2* are supplied to a selector 24, and they are also supplied to a comparator 25. Based on a comparison signal 25a from the comparator 25, the selector 24 outputs one of D1* and D2* as Dlim.

[0070] If D2* is equal to or greater than D1*, then the comparison signal 25a from the comparator 25 goes high, and the selector 24 outputs D1* as Dlim. If D2* is less than D1*, then the comparison signal 25a from the comparator 25 goes low, and the selector 24 outputs D2* as Dlim.

[0071] Fig. Figure 11 is a control block diagram showing the generation of the base duty cycle command for the second branch B. D3a* is a command value for the base duty cycle D3a, which is Fig. 8, i.e., the basic duty cycle command. The basic duty cycle command D3a* is calculated to control the output power value and maintain the voltage Vdc at the target voltage Vdc*.

[0072] As in Fig. As shown in Figure 11, PI control is performed using, as a feedback value, the difference 30 between the target voltage Vdc* for the DC capacitor 5 and the detected voltage Vdc, and the resulting output is used as an output current command value 31 for the battery 10. Using, as a feedback value, the difference 32 between the output current command value 31 and the detected current ibat, PI control is performed, and the resulting output 33 is adjusted by a gain adjuster 34. This generates the basic duty cycle command D3a*.

[0073] Fig. Figure 12 is a control block diagram showing the generation of a duty cycle command for the second branch B. D3* (= D4*) is a duty cycle command for performing PWM control for the third and fourth switching elements 403 and 404.

[0074] As in Fig. As shown in Figure 12, the basic duty cycle command D3a* and Dlim are supplied to a selector 35, and they are also supplied to a comparator 36. Based on a comparison signal 36a from the comparator 36, the selector 35 outputs one of D3a* and Dlim as D3*.

[0075] If D3a* is equal to or greater than Dlim, then the comparison signal 36a from comparator 36 becomes high, and selector 35 outputs Dlim as D3*. If D3a* is less than Dlim, then the comparison signal 36a from comparator 36 becomes low, and selector 35 outputs D3a* as D3*.

[0076] Based on Fig. 13 to Fig. 15, the generation of the gate signals G1 to G4 for controlling the first to fourth switching elements 401 to 404 in the inverter circuit 4 will be described next. Fig. 13 is a waveform diagram for explaining the generation of the gate signals G1 to G4. Fig. Figure 14 is a control block diagram showing the generation of the gate signals G1 and G2 for the first branch A. Fig. Figure 15 is a control block diagram showing the generation of the gate signals G3 and G4 for the second branch B.

[0077] As in Fig. As shown in Figure 13, the gate signals G1 to G4 are generated by PWM control using the duty cycle commands for the first branch A and the second branch B, as well as a carrier wave. In this case, a sawtooth wave 38 is used as the carrier wave. D2* is used as the duty cycle command for the first branch A, and D3* (= D4*) is used as the duty cycle command for the second branch B. The sawtooth waves 38 used to generate the gate signals G1 to G4 are waveforms that have the same phase and value.

[0078] As in Fig. As shown in Figure 14, a gate signal generator 39 for the first branch A comprises two comparators 39a and 39b, each of which compares D2* and the sawtooth wave 38. It thereby generates the gate signals G2 and G1.

[0079] During a period (tt0 to tt2) in which D2* is equal to or greater than the value of the sawtooth wave 38, the gate signal G2 becomes H, and it turns on the second switching element 402. During a period (tt2 to tt4 (= tt0)) in which the value of the sawtooth wave 38 is equal to or greater than D2*, the gate signal G1 becomes H, and it turns on the first switching element 401.

[0080] As in Fig. As shown in Figure 15, a gate signal generator 40 for generating the gate signal G3 for the second branch B includes a comparator 40a. The gate signal G4 is generated using a gate signal generator 41, which includes two comparators 41a and 41b, and an AND circuit 43.

[0081] In the gate signal generator 40 for generating the gate signal G3, the comparator 40a compares D3* with the sawtooth wave 38. This generates the gate signal G3. During a period (tt0 to tt1) in which D3* is equal to or greater than the value of the sawtooth wave 38, the gate signal G3 becomes high, and it turns on the third switching element 403. The gate signals G2 and G3 both rise at time tt0, that is, the rises of their gate signal pulses are synchronized with each other.

[0082] In the gate signal generator 41, the comparator 41a compares the sum 42 of D2* and D3* with the sawtooth wave 38, and the comparator 41b compares the sawtooth wave 38 with D2*. Comparison signals from the two comparators 41a and 41b are fed to the AND circuit 43, and the AND circuit 43 generates a logical conjunction and outputs the gate signal G4.

[0083] From a time (tt2) at which the sawtooth wave 38 becomes equal to or greater than D2*, the gate signal G4 becomes high within the pulse width W1 of the gate signal G3 based on D3*, and the fourth switching element 404 is turned on during the period (tt2 to tt3). The gate signals G1 and G4 both rise at time tt2, that is, the rises of their gate signal pulses are synchronized with each other.

[0084] It should be noted that tt0, tt1, tt2 and tt3 in Fig. 13 with t2, t3, t4 (t0), t1 in Fig. 2. That is, the operating modes in the time periods tt0 to tt1, tt1 to tt2, tt2 to tt3, and tt3 to tt4 (t0) are the third mode, the fourth mode, the first mode, and the second mode, respectively.

[0085] As described above, in the present embodiment, for the first branch A, the duty ratios D1 and D2 are adjusted, and PWM control is performed. This performs high power factor control for the current iac flowing from the AC power supply 1 through the rectifier circuit 2. For the second branch B, the duty ratio D3 (D4) is adjusted to a value equal to or smaller than the duty ratios D1 and D2, and PWM control is performed.

[0086] This controls the voltage Vdc of the DC capacitor 5 and controls the power output to the secondary side of the isolation transformer 6. Consequently, current control and output power control can be achieved using a single inverter circuit 4 with a full-bridge configuration, allowing the power conversion device to be simplified and downsized.

[0087] The control circuit 11 performs PWM control for the first arm A and the second arm B with equal drive cycles T synchronized with each other, generates the duty cycle commands D1* and D2* for controlling the first arm A so that the current iac assumes the current command iac* which is a sine wave target current, and generates the duty cycle command D3* (D4*) for controlling the second arm B so that the voltage Vdc of the DC capacitor 5 assumes the target voltage Vdc* which is higher than the peak voltage Vp of the AC power supply 1. Consequently, high power factor control of the current iac and output power control for maintaining the voltage Vdc at the target voltage Vdc* with high reliability can be achieved.

[0088] Since the duty cycles D3 and D4 for controlling the third and fourth switching elements 403 and 404 in the second branch B are controlled to be equal to each other, premagnetization of the isolation transformer 6 is prevented. The duty cycles D3 and D4 are limited using—as the upper limit Dlim—the smaller of the duty cycles D1 and D2 for the first and second switching elements 401 and 402.

[0089] Therefore, the fourth switching element 404 can be controlled to have an on-period only within the on-period of the first switching element 401, and the third switching element 403 can be controlled to have an on-period only within the on-period of the second switching element 402. Consequently, the charging and discharging periods of the DC capacitor 5 can be reliably controlled, and the voltage Vdc can be reliably controlled to be the target voltage Vdc*.

[0090] In addition, the sawtooth wave 38 is used as a carrier wave of the PWM control for the first branch A and the second branch B, and the gate signals G1 to G4 are generated such that the rise of a gate signal pulse for the first switching element 401 and the rise of a gate signal pulse for the fourth switching element 404 are synchronized with each other, and that the rise of a gate signal pulse for the second switching element 402 and the rise of a gate signal pulse for the third switching element 403 are synchronized with each other.

[0091] Therefore, within the limiting condition due to the high power factor control, the duty cycle D3 (D4) for the second arm B can be freely adjusted, so that the high power factor control and the output power control can be reliably achieved independently of each other, so that the quality of the transmitted power is improved, and the output control of the power conversion device can be achieved with higher reliability.

[0092] In the present embodiment, since the charging and discharging of the DC capacitor 5 are performed within the driving cycle T of the inverter circuit 4, the generated voltage pulsation is based on the driving cycle T. Therefore, the power pulsation pulsating at a frequency twice the AC power supply frequency caused by the AC power supply 1 is completely transmitted to the battery 10 on the secondary side of the isolation transformer 6, and it is not necessary to handle the power pulsation having a frequency twice the AC power supply frequency from the DC capacitor 5. The DC capacitor 5 only needs to handle the charging and discharging due to the driving cycle T of the inverter circuit 4, and thus, a reduction in size can be achieved due to the great reduction in capacity.

[0093] In the above embodiment, the case was shown in which the rising of gate signal pulses for the first and fourth switching elements 401 and 404 are synchronized, and in which the rising of gate signal pulses for the second and third switching elements 402 and 403 are synchronized. However, the falling of the gate signal pulses may also be synchronized for both sets of switching elements.

[0094] A dead time to prevent a short circuit may be provided for switching the first and second switching elements 401 and 402 in the first branch A. Similarly, a dead time to prevent a short circuit may be provided for switching the third and fourth switching elements 403 and 404 in the second branch B.

[0095] Also, in the case where the choke coil 3 is connected to the negative DC terminal 2b, or in the case where the choke coils 3 are connected in a distributed manner to both the positive DC terminal 2a and the negative DC terminal 2b of the rectifier circuit 2, the following applies: As in the above embodiment, PWM control is performed for the first branch A to perform current control, and PWM control is performed for the second branch B to control the voltage Vdc of the DC capacitor 5. This can achieve the same effect as in the above embodiment.

[0096] In the above embodiment, the power conversion device has a configuration on the secondary side of the isolation transformer 6, namely, the second rectifier circuit 7, the smoothing reactor 8, and the smoothing capacitor 9. However, such a secondary-side circuit is not limited to this. No such secondary-side circuit may be provided in the power conversion device, and a configuration formed in another device may be connected. Embodiment 2

[0097] The following describes a power conversion device according to Embodiment 2 of the present invention. In Embodiment 1 above, the sawtooth wave 38 is used as a carrier wave of the PWM control for the inverter circuit 4. In Embodiment 2 above, a triangular wave is used as the carrier wave. In the power conversion device according to Embodiment 2 above, the main circuit configuration and the generation of the duty cycle commands D1* to D4* are the same as those in Embodiment 1 above.

[0098] Based on Fig. 16 to Fig. 18, the generation of the gate signals G1 to G4 for controlling the first to fourth switching elements 401 to 404 of the inverter circuit 4 in the present embodiment 2 will be described below. Fig. 16 is a waveform diagram for explaining the generation of the gate signals G1 to G4. Fig. Figure 17 is a control block diagram showing the generation of the gate signals G1 and G2 for the first branch A. Fig. Figure 18 is a control block diagram showing the generation of the gate signals G3 and G4 for the second branch B.

[0099] As in Fig. As shown in Figure 16, the gate signals G1 to G4 are generated by PWM control using the duty cycle commands for the first branch A and the second branch B, as well as the carrier wave. In this case, a triangular wave 50 is used as the carrier wave. D2* is used as the duty cycle command for the first branch A, and D3* (= D4*) is used as the duty cycle command for the second branch B. The triangular waves 50 used to generate the gate signals G1 to G4 are the same.

[0100] As in Fig. As shown in Figure 17, a gate signal generator 51 for the first branch A includes two comparators 51a and 51b, each of which compares D2* and the triangular wave 50. It thereby generates the gate signals G2 and G1.

[0101] During a period (t0 to t2, t5 to t7 (t0)) in which D2* is equal to or greater than the value of the triangular wave 50, the gate signal G2 becomes H, and it turns on the second switching element 402. During a period (t2 to t5) in which the value of the triangular wave 50 is equal to or greater than D2*, the gate signal G1 becomes H, and it turns on the first switching element 401.

[0102] As in Fig.As shown in Figure 18, a gate signal generator 52 for the second branch includes two comparators 52a and 52b. Comparator 52a compares D3* with triangular wave 50, thereby generating gate signal G3. During a period (t6 to t0 (t7) to t1) in which D3* is equal to or greater than the value of triangular wave 50, gate signal G3 becomes high, and it turns on third switching element 403. The centers of the gate signal pulses of gate signals G2 and G3 are synchronized at the phase of the lower peak of triangular wave 50.

[0103] The comparator 52b compares the triangular wave 50 with a duty cycle command (1-D3*), which is a value obtained by subtracting D3* from 1. This generates the gate signal G4. During a period (t3 to t4) in which the triangular wave 50 is equal to or greater than (1-D3*), the gate signal G4 becomes high, and it turns on the fourth switching element 404. The gate signal pulses of the gate signals G3 and G4 have the same pulse width W2, and the turn-on periods of the third and fourth switching elements 403 and 404 have the same length. The centers of the gate signal pulses of the gate signals G1 and G4 are synchronized at the phase of the upper peak of the triangular wave 50.

[0104] Also, the power conversion device according to the present embodiment operates through the four types of operation modes described in Embodiment 1 above. The power conversion device operates by the third mode during the period from t0 to t1, by the fourth mode during the period from t1 to t2, by the second mode during the period from t2 to t3, by the first mode during the period from t3 to t4, by the second mode during the period from t4 to t5, by the fourth mode during the period from t5 to t6, and by the third mode during the period from t6 to t7 (t0).

[0105] As described above, in the present embodiment 2, the following also applies: For the first branch A, the duty ratios D1 and D2 are adjusted, and PWM control is performed. This performs high power factor control for the current iac flowing from the AC power supply 1 through the rectifier circuit 2. For the second branch B, the duty ratio D3 (D4) is adjusted to a value equal to or smaller than the duty ratios D1 and D2, and PWM control is performed.

[0106] This controls the voltage Vdc of the DC capacitor 5 and controls the power output to the secondary side of the isolation transformer 6. Consequently, as in Embodiment 1 above, current control and output power control can be achieved using a single inverter circuit 4 with a full-bridge configuration, so that the power conversion device can be simplified and downsized.

[0107] In addition, the triangular wave 50 is used as the carrier wave of the PWM control for the first arm A and the second arm B, and the gate signals G1 to G4 are generated such that the center of a gate signal pulse for the first switching element 401 and the center of a gate signal pulse for the fourth switching element 404 are synchronized at the phase of the upper peak of the triangular wave 50, and the center of a gate signal pulse for the second switching element 402 and the center of a gate signal pulse for the third switching element 403 are synchronized at the phase of the lower peak of the triangular wave 50.

[0108] Therefore, within the limiting condition due to the high power factor control, the duty cycle D3 (D4) for the second arm B can be freely adjusted, so that the high power factor control and the output power control can be reliably achieved independently of each other, so that the quality of the transmitted power is improved and the output control of the power conversion device can be achieved with higher reliability.

[0109] By using the triangular wave 50 as the carrier wave, the entire period in the second mode and the fourth mode, that is, the mode in which no power is transferred to the isolation transformer 6, is symmetrical with respect to the peak phase of the triangular wave 50 in the drive cycle T. Therefore, the value of the current flowing through the fourth switching element 404 when the transformer current decreases in the second mode after the current flows through the isolation transformer 6 in the first mode is equal to the value of the current flowing through the third switching element 403 when the transformer current decreases in the fourth mode after the current flows through the isolation transformer 6 in the third mode. Consequently, the losses in the third and fourth switching elements 403 and 404 are equalized, heat radiation can be simplified, and the size reduction of the power conversion device can be facilitated.

[0110] It should be noted that, within the scope of the present invention, the above embodiments may be freely combined with each other, or each of the above embodiments may be appropriately modified or features may be omitted.

Claims

[1] Energy conversion device comprising: - a rectifier circuit (2) having a plurality of diodes (201-204) with a full bridge configuration and rectifying the input from an AC power supply (1); - a choke coil (3) connected to a DC terminal of the rectifier circuit (2); - an inverter circuit (4), wherein a first branch (A) having a first switching element (401) and a second switching element (402) connected in series with each other with a connection point (4a) therebetween as a first AC end (4a), a second branch (B) having a third switching element (403) and a fourth switching element (404) connected in series with each other with an intermediate connection point (4b) as a second AC end (4b), and a DC capacitor (5) connected in parallel between DC buses (P, N), wherein the first AC end (4a) is connected to a positive DC terminal (2a) of the rectifier circuit (2), wherein a negative (N) of the DC buses (P, N) is connected to a negative DC terminal (2b) of the rectifier circuit (2); - an isolation transformer (6) having a primary winding (6a) and a secondary winding (6b), wherein the first AC end (4a) and the second AC end (4b) of the inverter circuit (4) are connected to the respective ends of the primary winding (6a); and - a control circuit (11) for performing an output control of the inverter circuit (4), - wherein the control circuit (11) performs high power factor control for the circuit current (iac) flowing from the AC power supply (1) via the rectifier circuit (2) by means of PWM control for the first branch (A) using the duty cycles of the first and second switching elements (401, 402), and controls the voltage of the DC capacitor (5) by means of PWM control for the second branch (B) using the duty cycles of the third and fourth switching elements (403, 404), limited by an upper limit (Dlim) which is the smaller of the duty cycles for the first and second switching elements (401, 402) in the first branch (A), so as to control the power output to the secondary side of the isolation transformer (6). [2] The energy conversion device according to claim 1, further comprising: a second rectifier circuit (7) connected to the secondary winding (6b) of the isolating transformer (6), and a second choke coil (8) connected to a DC terminal of the second rectifier circuit (7), wherein the control circuit (11) controls the output power to a DC circuit (10) connected to the second rectifier circuit (7) by performing PWM control for the second branch (B). [3] Energy conversion device according to claim 1 or 2, wherein the control circuit (11) performs the following: Performing PWM control for the first branch (A) and the second branch (B) with equal drive cycles (T) synchronized with each other, controlling the first branch (A) so that the circuit current (iac) assumes a sine wave target current, and Controlling the second branch (B) so that the voltage of the DC capacitor (5) assumes a target voltage which is higher than the peak voltage of the AC power supply (1). [4] The power conversion device according to claim 3, wherein the control circuit (11) controls the duty ratios of the third switching element (403) and the fourth switching element (404) to be equal to each other and limits the duty ratios using the upper limit (Dlim). [5] Energy conversion device according to claim 3 or 4, wherein the control circuit (11) performs the following: Controlling the second switching element (402) so that its switching on and off are inverted with respect to that of the first switching element (401), controlling the fourth switching element (404) which is diagonal with respect to the first switching element (401) so that it has a switching-on period only within a switching-on period of the first switching element (401), and Controlling the third switching element (403) which is diagonal with respect to the second switching element (402) to have an on-period only within an on-period of the second switching element (402). [6] Energy conversion device according to claim 5, wherein the control circuit (11) performs the following: Using a sawtooth wave (38) as the carrier wave of the PWM control for the first branch (A) and the second branch (B), Synchronizing the rise of a gate signal pulse for the first switching element (401) with the rise of a gate signal pulse for the fourth switching element (404), and Synchronizing the rise of a gate signal pulse for the second switching element (402) with the rise of a gate signal pulse for the third switching element (403). [7] Energy conversion device according to claim 5, wherein the control circuit (11) performs the following: Using a triangular wave (50) as the carrier wave of the PWM control for the first branch (A) and the second branch (B), Synchronizing the center of a gate signal pulse for the first switching element (401) with the center of a gate signal pulse for the fourth switching element (404), and Synchronizing the center of a gate signal pulse for the second switching element (402) with the center of a gate signal pulse for the third switching element (403). [8] Energy conversion device according to claim 7, wherein the control circuit (11) performs the following: Generating a command value of a duty cycle for an element of the third and fourth switching elements (403, 404), Generating the gate signal pulse for the one element by comparing the command value of the duty cycle with the triangular wave (50), and Generating the gate signal pulse for another element of the third and fourth switching elements (403, 404) by comparing a value obtained by subtracting the command value of the duty ratio from 1 with the triangular wave (50).

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