OPTOELECTRONIC SEMICONDUCTOR CHIP AND MANUFACTURING METHOD FOR AN OPTOELECTRONIC SEMICONDUCTOR CHIP

Abstract

Optoelectronic semiconductor chip (1) with - a semiconductor layer sequence (2) based on AlInGaP and / or on AlInGaAs with an active zone (23) for generating radiation, - a metal mirror (3) for the radiation at a rear side (12) of the semiconductor layer sequence (2) opposite a light output coupling side (10), - a protective metallization (6) directly on one side of the metal mirror (3) facing away from the semiconductor layer sequence (2), - at least one metallic electrical via (5) that extends directly to a side of the semiconductor layer sequence (2) facing the metal mirror (3) or directly to a contact layer (8) made of a transparent conductive oxide and ends at a distance from the active zone (23), - an adhesion mediation layer (7) directly on one side of the metal mirror (3) facing the semiconductor layer sequence (2), and - an electrically insulating reflector (4) made of at least one material which is transparent to the radiation generated during operation, where - the reflector (4) is located directly between the semiconductor layer sequence (2) and the adhesion layer (7), - the adhesion-promoting layer (7) and the protective metallization (6) extend laterally beyond the semiconductor layer sequence (2), - the reflector (4) is penetrated by the via (5), - the adhesion-promoting layer (7) is made of a dielectric oxide, and - the adhesion-promoting layer (7) is an encapsulation layer for the metal mirror (3), such that the metal mirror (3) is encapsulated at least at an outer edge by the adhesion-promoting layer (7) together with the protective metallization (6).

Description

[0001] An optoelectronic semiconductor chip is specified. Furthermore, a manufacturing process for such a semiconductor chip is described.

[0002] Publication US 2012 / 0 098 016 A describes a silver mirror of an InGaN LED that is encapsulated by means of atomic layer deposition.

[0003] Furthermore, an optoelectronic semiconductor chip is known from publication US 2017 / 0 373 228 A1.

[0004] One task to be solved is to specify an optoelectronic semiconductor chip that has a mirror with a permanently high reflectivity.

[0005] This problem is solved, among other things, by an optoelectronic semiconductor chip and by a method with the features of the independent claims. Preferred embodiments are the subject of the dependent claims.

[0006] The optoelectronic semiconductor chip is designed for generating radiation, in particular near-ultraviolet, visible, and / or near-infrared radiation. The semiconductor chip is, for example, a light-emitting diode (LED) chip or a laser diode chip. Preferably, the semiconductor chip is an LED chip for generating green, yellow, orange, or red light.

[0007] The semiconductor chip comprises a sequence of semiconductor layers. The semiconductor layer sequence includes at least one active region for generating radiation. The active region is preferably located between a p-doped face and an n-doped face of the semiconductor layer sequence. The active region contains, in particular, a single quantum well structure, a multiple quantum well structure, and / or a pn junction. The active region extends, in particular, perpendicular to a growth direction of the semiconductor layer sequence.

[0008] The semiconductor layer sequence is preferably based on a III-V compound semiconductor material. This semiconductor material is, for example, a phosphide compound semiconductor such as Al. n In 1-n-m Ga m P or an arsenide compound semiconductor material such as Al n In 1-n-m Ga m P or like Al n Ga m In 1-n-m As k P 1-k, where 0 ≤ n ≤ 1, 0 ≤ m ≤ 1, and n + m ≤ 1, as well as 0 ≤ k < 1. Preferably, for at least one layer or for all layers of the semiconductor layer sequence, 0 < n ≤ 0.8, 0.4 ≤ m < 1, and n + m ≤ 1, as well as 0 < k ≤ 1, hold true. The semiconductor layer sequence may contain dopants and additional components. For the sake of simplicity, however, only the essential components of the crystal lattice of the semiconductor layer sequence, i.e., Al, As, Ga, In, and / or P, are specified, even though these may be partially replaced and / or supplemented by small amounts of other substances.

[0009] The semiconductor chip includes a metal mirror. The metal mirror is located on the back side of the semiconductor layer sequence. The metal mirror acts as a reflective layer and serves to reflect the radiation generated during operation. In particular, the metal mirror reflects radiation components that reach the metal mirror from the semiconductor layer sequence via a reflector made of radiation-transparent materials.

[0010] The optoelectronic semiconductor chip comprises a semiconductor layer sequence with an active zone for generating radiation. The semiconductor layer sequence is based on AlInGaP and / or AlInGaAs. A metal reflector for the radiation is located on the back side of the semiconductor layer sequence, opposite a light-emitting side. A protective metallization is applied directly to a side of the metal reflector facing away from the semiconductor layer sequence. An adhesion promoter layer is located directly on a side of the metal reflector facing the semiconductor layer sequence. The adhesion promoter layer acts as an encapsulation layer for the metal reflector, so that the metal reflector is encapsulated against external influences, at least at one outer edge, by the adhesion promoter layer together with the protective metallization.

[0011] Silver, or Ag, is a desirable material for use as a mirror in light-emitting diodes (LEDs) due to its high reflectivity. However, using silver in a mirror raises concerns about the long-term stability of the LED under high humidity. Various humidity-induced phenomena can occur, including Ag migration, delamination, and chemical degradation of layers. In the semiconductor chip described here, it is possible to encapsulate Ag in InGaAlP / AlGaAs LEDs to protect them from external environmental influences, thereby achieving high stability under humid conditions.

[0012] The concept of InAlP / AlGaAs LEDs, manufactured using thin-film technology, typically involves a highly reflective mirror formed from a dielectric and a backing metal layer. The dielectric part of the mirror usually consists of a single thick layer, but can also be formed from multiple dielectric layers made of different materials. For the metal layer, a material with high reflectivity from the green spectral range to the infrared is chosen, for example, gold (Au) or silver (Ag).

[0013] Other aspects for mirror construction include: (I) The materials of the mirror shall be robust and stable under moisture and other environmental influences. (II) Good adhesion between the dielectric and the metal is required.

[0014] To fulfill the first condition, gold (Au) is generally the material of choice for InAlP / AlGaAs LEDs. The second requirement is typically met by using an adhesion promoter layer. A TCO material such as ITO or ZnO is typical. However, TCOs do not act efficiently as a moisture barrier, meaning the metal layer is not protected from moisture directly at the interface with the dielectric.

[0015] Ensuring the stability of the mirror assembly under high humidity is not trivial, especially when the chosen metal itself is not moisture-resistant, as is the case with silver. This problem is primarily due to the many ways in which moisture can penetrate the LED and reach the metal component of the mirror: A) The edges of the metal layer are open at a chip edge. The material of the metal mirror is in direct contact with ambient moisture. B) Moisture penetrates the LED at an interface between the metal mirror and the adhesive layer, or through the adhesive layer itself. This can occur particularly when the adhesive layer degrades or delaminates at the interface. C), D): Moisture penetrates the LED through the dielectric layer or the reflector. This can occur if the dielectric material is porous and does not form a barrier against moisture. Moisture can then penetrate either through the adhesive layer to the metal mirror in the surface area or in a contact area where the mirror material is in direct contact with the dielectric.

[0016] The semiconductor chip described here is based in particular on the following ideas: i) The new adhesion promoter layer simultaneously ensures good adhesion and acts as a moisture barrier, thus protecting the large mirror surface from any moisture penetrating the metal from the dielectric. The new adhesion promoter layer should be characterized by high uniformity along edges, steps, or other morphological features. An example of a preferred, suitable material is aluminum oxide, and the preferred deposition method is ALD (Atomic Layer Deposition). ALD allows for the production of highly conformal layers with well-controlled thickness and composition. Aluminum oxide layers deposited in this way act as a very effective moisture barrier as long as their surface remains covered by another material. That is, the adhesion promoter layer is placed between two layers. In this way, the moisture pathway described above in C) is closed.Ideally, the adhesion-promoting layer and its upper and lower interfaces are robust, so that the path above under B) is also closed. ii) To remove the metal of the metal mirror from a chip edge, the metal mirror is structured. The mirror is then encased in a metal layer, the protective metallization, which protects the back and edges of the mirror. In this way, the moisture path A) is closed. If necessary, the chip edge between the moisture-blocking adhesive layer and the protective metallization can be protected by a further layer. If this further layer is not electrically conductive, it is selectively removed from the chip surface to allow current flow. iii) The mirror is structured in an electrical contact area. The encapsulating metal for the protective metallization is deposited in an opening of the metal mirror. In this way, the metal mirror is separated from the dielectric in the contact area and blocks path D). Simultaneously, the protective metallization material becomes part of the electrical contact to the semiconductor layer sequence. iv) Additionally, a second moisture barrier layer can be incorporated to protect the chip's side faces. This prevents moisture from penetrating the dielectric, particularly the reflector, and its interfaces with adjacent layers (see paths B), C), and D). To achieve this, the reflector is removed from a region outside the mesa, i.e., from a trench between adjacent regions of the semiconductor layer sequence for the semiconductor chips. The sides of the dielectric reflector are then covered with a moisture barrier. Aluminum oxide is also preferably used for this moisture barrier layer. The moisture barrier layers from both sides of the chip meet in the trench.

[0017] The aspects of the semiconductor chip mentioned under i) to iv) can be used separately or in combination, depending on the choice of materials and the complexity of the chip processing.

[0018] According to at least one embodiment, the semiconductor chip comprises at least one contact layer. The contact layer is preferably made of a transparent conductive oxide. The contact layer is directly adjacent to the semiconductor layer sequence and is configured for inducing current into the semiconductor layer sequence.

[0019] According to at least one embodiment, the metal mirror is a silver mirror. Alternatively, the metal mirror can be an aluminum mirror or a gold mirror.

[0020] According to at least one embodiment, the metal mirror, in particular the silver component of the metal mirror, terminates at a distance from the contact layer and / or the semiconductor layer sequence. That is, the metal mirror, and especially the silver-containing layers, do not then touch the contact layer and / or the semiconductor layer sequence.

[0021] According to at least one embodiment, the adhesion-promoting layer is made of a metal oxide.

[0022] The adhesion promoter layer is made of a dielectric oxide such as aluminum oxide. Alternatively, the adhesion promoter layer is made of an electrically conductive material such as a transparent conductive oxide. Less preferably, the adhesion promoter layer can also be made of at least one metal or metal nitride such as Pt, Ti, Pd, W, and / or WN. Particularly in the case of a metallic adhesion promoter layer, the adhesion promoter layer is preferably thin, for example, at most 10 nm, 5 nm, or 2 nm thick.

[0023] Transparent conductive oxides (TCOs) are transparent, electrically conductive materials, typically metal oxides such as zinc oxide, tin oxide, cadmium oxide, titanium oxide, indium oxide, or indium tin oxide (ITO). Besides binary metal-oxygen compounds like ZnO, SnO₂, or In₂O₃, ternary metal-oxygen compounds such as Zn₂SnO₄, CdSnO₃, ZnSnO₃, MgIn₂O₄, GaInO₃, Zn₂In₂O₅, or In₄Sn₃O₄ also belong to this group. 12 or mixtures of different transparent conductive oxides belong to the group of TCOs. Furthermore, TCOs do not necessarily have a stoichiometric composition and can also be p-doped or n-doped; for example, in the case of ZnO, doping with Al and / or Ga is preferred.

[0024] According to at least one embodiment, the adhesion promoter layer is produced by means of atomic layer deposition (ALD) or molecular layer deposition (MLD). This allows for a specific diffusion constant of the adhesion promoter layer, particularly for water and oxygen, of at most 10. -5 g / (m² d) are achieved, calculated for a material thickness of 0.1 µm. Preferably, the diffusion coefficient is at most 5 × 10 -6 g / (m 2 d), in particular at most 10 -6 g / (m 2 d) Such a material for the adhesion-promoting layer can ensure that significant corrosion or chemical destruction of the metal mirror can be prevented within the lifetime of the semiconductor layer sequence.

[0025] An encapsulation layer created by ALD or MLD, such as an adhesion promoter layer, differs from layers produced by CVD or PVD primarily in that the defect density of an ALD adhesion promoter layer is typically less than 0.1 defects per square millimeter, whereas CVD or PVD layers exhibit a defect density of several hundred defects per square millimeter. This can be demonstrated, for example, using transmission electron microscopy (TEM). Due to the comparatively lower defect density of the ALD adhesion promoter layer, the etch rate is also reduced compared to CVD or PVD layers. The defect density and / or etch rate can be used to determine which method was used to create a layer. CVD stands for Chemical Vapor Deposition, PVD for Physical Vapor Deposition.

[0026] According to at least one embodiment, the protective metallization is a stack of several metal layers. Alternatively, the protective metallization consists of only a single metal layer.

[0027] According to at least one embodiment, the area between the semiconductor layer sequence and the protective metallization is free of cavities. In particular, no cavities or gaps are created laterally next to the metal mirror. Preferably, the side surfaces of the metal mirror are completely and directly covered by the protective metallization.

[0028] The semiconductor chip comprises one or more electrical vias for electrical contact, particularly of the p-doped side. The vias are preferably formed by the metal mirror and / or the protective metallization. The via extends to a side of the semiconductor layer sequence or the contact layer facing the metal mirror. Thus, the via terminates at a distance from the active region and does not pass through it.

[0029] According to at least one embodiment, the adhesion layer is located away from the region of the via closest to the semiconductor layer sequence. Thus, it is possible for a region between the via and the semiconductor layer sequence, or between the via and the contact layer, to be free of the adhesion layer. Alternatively, the adhesion layer can extend continuously and uninterrupted across the via if it is electrically conductive.

[0030] According to at least one embodiment, the adhesion-promoting layer partially or completely covers the side faces of the via. Preferably, the side faces are also covered by the metal mirror. This allows for increased reflectivity at the side faces.

[0031] According to at least one embodiment, the via is formed by the metal mirror in a region closest to the semiconductor layer sequence. In this case, the protective metallization preferably does not extend to the semiconductor layer sequence and / or the contact layer.

[0032] According to at least one embodiment, the protective metallization in the via extends closer to the semiconductor layer sequence than adjacent areas of the metal mirror. For example, the metal mirror in the via is V-shaped, and the protective metallization fills this V.

[0033] According to at least one embodiment, the via is formed by the protective metallization in a region closest to the semiconductor layer sequence. This allows the protective metallization to contact the semiconductor layer sequence and / or the contact layer. That is, the via or vias can be realized by the protective metallization, such that the reflective layer terminates at a distance from the semiconductor layer sequence and preferably also at a distance from the optionally present contact layer.

[0034] The semiconductor chip includes a reflector. The reflector is made of at least one material that is transparent to the radiation generated during operation. The reflector can be composed of several layers with different refractive indices for the radiation generated during operation. The reflector is electrically insulating. The reflector is located directly between the semiconductor layer sequence and the adhesion layer. In other words, the adhesion layer primarily serves to firmly bond the metal mirror to the reflector and prevent the metal mirror from detaching from the reflector and thus from the semiconductor layer sequence.

[0035] The layers of the reflector with different refractive indices are, for example: i) SiO2 with n = 1.46 and Nb2O5 with n = 2.3, ii) SiO2 and TiO2 with n = 2.3 to 2.4, iii) MgF2 with n = 1.37 and Nb2O5, iv) MgF2 and TiO2. The stated values ​​for the refractive indices are given as examples for a temperature of 300 K and a wavelength of 616 nm.

[0036] According to at least one embodiment, the reflector is made of a material transparent to the radiation generated during operation, which is particularly low-refractive-index. Low-refractive-index can mean that the refractive index of the reflector at the semiconductor layer sequence is at least 0.5, 1, or 1.5 lower than the average refractive index of the semiconductor layer sequence. At least one material of the reflector is, for example, an oxide, a nitride, or an oxynitride.

[0037] According to at least one embodiment, the reflector has a comparatively large optical thickness. The term optical thickness refers to the product of the geometric thickness of the respective layer and its refractive index with respect to a wavelength L of maximum intensity of the radiation generated during operation. Preferably, the reflector has an optical thickness of at least 0.5 L or 1.0 L. Alternatively or additionally, this optical thickness is at most 5 L, 3 L, or 2 L.

[0038] The reflector is electrically insulating. The reflector is penetrated by the via.

[0039] According to at least one embodiment, the reflector, when viewed from above, projects beyond the semiconductor layer sequence and / or the metal mirror. Alternatively, the reflector can be flush with the semiconductor layer sequence and / or the metal mirror. Furthermore, it is possible for the semiconductor layer sequence and / or the metal mirror to project beyond the reflector.

[0040] According to at least one embodiment, the reflector borders directly on the protective metallization in areas that, viewed from above, lie next to the semiconductor layer sequence. This means that the adhesion promoter layer can be removed at an edge of the semiconductor chip.

[0041] The adhesion promoter layer and the protective metallization extend laterally beyond the semiconductor layer sequence. This allows the metal mirror to also project laterally beyond the semiconductor layer sequence, resulting in high reflectivity across the entire surface. "Laterally" means, for example, in a direction perpendicular to a growth direction and / or the main extension direction of the semiconductor layer sequence.

[0042] According to at least one embodiment, the metal mirror, viewed in cross-section, borders exclusively on the protective metallization together with the adhesion-promoting layer. This allows the metal mirror to be efficiently encapsulated.

[0043] According to at least one embodiment, the contact layer is electrically and ohmically connected to the metal mirror and / or the protective metallization. Current then flows into the semiconductor layer sequence via the metal mirror and / or the protective metallization into the contact layer.

[0044] According to at least one embodiment, the adhesion-promoting layer extends to the contact layer. This allows the side faces of the vias to be almost completely covered with the metal mirror.

[0045] According to at least one embodiment, the first side of the semiconductor layer sequence, specifically the p-doped side, has a greater thickness in the region of the vias than in other regions. The thicker region of the first side of the semiconductor layer sequence preferably extends across the entire semiconductor layer sequence, starting from the via. That is, the thicker region of the first side need not be limited to the via, although this is possible. In particular, the semiconductor layer sequence is thin under metallic electrical current distribution structures on the light-emitting side to avoid energizing the active zone there.

[0046] According to at least one embodiment, the contact layer extends only to a portion of the semiconductor layer sequence. In particular, the contact layer is limited to the thicker regions of the semiconductor layer sequence. This allows for targeted adjustment of the current expansion via the contact layer. Alternatively, the entire semiconductor layer sequence, or nearly the entire semiconductor layer sequence, is completely covered by the contact layer on the back side.

[0047] According to at least one embodiment, the adhesion promoter layer has a constant thickness at least across the metal mirror. This is achieved in particular by producing the adhesion promoter layer using ALD or MLD.

[0048] According to at least one embodiment, different areas of the adhesion promoter layer do not overlap each other. That is, the adhesion promoter layer is preferably applied in a single layer. In particular, the adhesion promoter layer is free of U-shaped areas in cross-section. The adhesion promoter layer is then free of undercuts.

[0049] According to at least one embodiment, the semiconductor chip comprises at least one cover layer. Preferably, the cover layer extends from the light-emitting side across the side faces of the semiconductor layer sequence to the adhesion layer. The semiconductor layer sequence can thus be viewed in at least one cross-section, or in all cross-sections parallel to a growth direction of the semiconductor layer sequence and through the semiconductor layer sequence, be enclosed by the cover layer together with the adhesion layer and the protective metallization.

[0050] According to at least one embodiment, the cover layer and the adhesion promoter layer are made of the same material, in particular aluminum oxide. Preferably, the cover layer and the adhesion promoter layer are produced by ALD or MLD.

[0051] According to at least one embodiment, the cover layer is coated with a moisture protection layer, preferably covering the entire surface. The moisture protection layer can be a protective layer for the cover layer. For example, the moisture protection layer is made of a nitride such as silicon nitride. The cover layer and / or the moisture protection layer can be applied to or within a roughening of the semiconductor layer sequence.

[0052] According to at least one embodiment, the semiconductor chip is a component based on an arsenide or a phosphide. The wavelength of maximum intensity of the radiation generated during operation is preferably at least 560 nm or 590 nm and / or at most 950 nm, 840 nm, or 700 nm. In particular, the semiconductor chip generates red light during intended operation.

[0053] Furthermore, a method for manufacturing a semiconductor chip, as described in connection with one or more of the embodiments mentioned above, is disclosed. Features of the semiconductor chip are therefore also disclosed for the method, and vice versa.

[0054] In at least one embodiment, the method serves to manufacture an optoelectronic semiconductor chip and comprises the following steps, preferably in the specified order: A) Growth of the semiconductor layer sequence consisting of AlInGaP or AlInGaAs, B) Separation and / or structuring of the detention mediation layer, C) Deposition and / or structuring of the metal mirror so that the metal mirror partially or completely covers the adhesion promoter layer, D) Application of the protective metallization to the metal mirror and to or on the adhesion promoter layer, and E) Removal of a growth substrate for the semiconductor layer sequence.

[0055] The adhesion-promoting layer is produced, for example, with a tolerance of no more than 30 µm, perfectly congruent with the metal mirror.

[0056] In this process, the same photomask is preferably used for steps B) and C) to structure the protective layer and / or the adhesion promoter layer by etching and to apply the metal mirror in a structured manner. The photomask is preferably composed of two or more than two non-overlapping sublayers.

[0057] The optoelectronic semiconductor chip therefore includes in particular: - a sequence of semiconductor layers with an active zone for generating radiation, - a metal mirror for the radiation on a back side opposite a light output side, in particular made of silver, - a protective metal layer corresponding to the protective metallization on one side of the metal mirror facing away from the semiconductor layer sequence, in particular made of TiW, and - a dielectric protective layer corresponding to the adhesion promoter layer, where, in cross-section, the dielectric protective layer lies partly between the metal mirror and the protective metal layer, and in top view, partly next to the metal mirror.

[0058] The following section provides a more detailed explanation of an optoelectronic semiconductor chip described herein, with reference to the drawing and illustrated by exemplary embodiments and examples. Identical reference symbols indicate identical elements in the individual figures. However, the figures are not to scale; rather, individual elements may be exaggerated for clarity.

[0059] They show: Fig. 1 a schematic sectional view of a modified semiconductor chip, Fig. 2 to 8 schematic sectional views of exemplary embodiments and examples of optoelectronic semiconductor chips described herein, and Fig. 9A to 9E are schematic sectional views of process steps of an exemplary embodiment of a manufacturing process for an optoelectronic semiconductor chip described here.

[0060] In Fig. Figure 1 illustrates a modification 1' of a semiconductor chip. Modification 1' comprises a semiconductor layer sequence 2 with an active zone 23 for generating radiation. The active zone 23 is located between a first side 21 and a second side 22 of the semiconductor layer sequence 2. A reflector 4 is located on a back side 12 of the semiconductor layer sequence 2. The reflector 4 is made of a material transparent to the radiation generated during operation. The reflective effect of the reflector 4 is based in particular on a refractive index difference towards the semiconductor layer sequence 2 and / or on total internal reflection. The back side 12 faces a light output side 10.

[0061] On one side of the reflector 4 facing away from the semiconductor layer sequence 2, there is an adhesion layer 71, via which a metal mirror 3 is attached to the reflector 4. The reflector 4 is, for example, made of a silicon dioxide layer. The adhesion layer 71 is a layer of a transparent conductive oxide, abbreviated TCO, such as zinc oxide or ITO. The metal mirror 3 is made of gold. The semiconductor layer sequence 2 is based on AlInGaAs or AlInGaP.

[0062] Since the adhesive layer 71 is made of a TCO, it does not form a dense barrier against the ingress of moisture or other substances harmful to the metal mirror 3. Likewise, the ingress of harmful substances to the metal mirror 3 through the reflector 4 is possible. Furthermore, there is no additional protection for the metal mirror 3 from the rear side 12 or from the side edges.

[0063] This allows moisture or other contaminants to penetrate the metal mirror 3 from its side edges, see path A. Harmful materials can also diffuse in from the side via the adhesive layer 71, see path B. Corrosion of the metal mirror 3 can occur across the entire surface through the adhesive layer 71 via the reflector 4, see path C. Furthermore, corrosion can occur via the reflector 4 at a through-hole 5 on the metal mirror 3, see path D.

[0064] In variation 1' of the Fig. Therefore, only materials such as gold, which exhibit high stability under the influence of moisture or other environmental factors, are suitable for the metal mirror 3. However, gold has a comparatively low reflectivity, especially at shorter wavelengths.

[0065] In Fig. Figure 2 shows an embodiment of an optoelectronic semiconductor chip 1. In contrast to the modification 1' of the Fig. 1. An adhesion-promoting layer 7 is present, which simultaneously serves as a barrier layer. The adhesion-promoting layer 7 is impermeable or substantially impermeable to moisture or other substances harmful to the metal mirror 3. Thus, no moisture or other harmful substances can reach the metal mirror 3 from the side or via the reflector 4. The metal mirror 3 is preferably a silver mirror.

[0066] For example, the adhesion promoter layer 7 is an aluminum oxide layer produced by atomic layer deposition (ALD). The thickness of the adhesion promoter layer 7 is preferably at least 1 nm or 5 nm and / or at most 50 nm or 40 nm. In the case of an aluminum oxide layer, the thickness of the adhesion promoter layer 7 is preferably between 20 nm and 40 nm, and particularly around 30 nm.

[0067] The adhesion-promoting layer 7 is located directly between the reflector 4, which is made of silicon dioxide, for example, and the metal mirror 3. The metal mirror 3 is located on the first side 21 of the semiconductor layer sequence 2. The first side 21 is preferably p-doped.

[0068] On one side facing away from the semiconductor layer sequence 2, a protective metallization 6 is located directly adjacent to the metal mirror 3. The protective metallization 6 can be formed by a single metal layer, but preferably it is formed by several successive metal layers. For example, the protective metallization 6 is a stack of layers of Ti-Pt, Ti-Pt-Ti, TiW, Ti-TiW, Cr-Pt, or Cr-Pt-Ti.

[0069] A layer of the adhesion promoter layer 7 closest to the metal mirror 3 preferably contains Ti and / or Cr and can serve as an additional adhesion layer. Such an adhesion layer closest to the metal mirror 3 preferably has a thickness between 1 nm and 10 nm inclusive. The total thickness of the protective metallization 6 is preferably at least 50 nm or 100 nm and / or at most 1.5 µm or 1 µm or 500 nm.

[0070] The protective metallization 6 is preferably dimensionally stable, such that its shape does not change, or does not change significantly, during intended use and during the intended assembly of the semiconductor chip 1. In particular, the protective metallization 6 is not a solder for fixing the semiconductor chip 1.

[0071] Furthermore, in Fig. Figure 2 shows that the semiconductor layer sequence 2 has a structured pattern. This means that the semiconductor layer sequence 2 is thicker in the area of ​​the electrical via 5 than in other areas. Such a structuring of the semiconductor layer sequence 2 makes it possible to ensure that the active zone 23, particularly directly below metallic current distribution structures 93 on the light-extraction side 10, is not or only minimally energized. Furthermore, such a structuring of the semiconductor layer sequence 2 can increase the light extraction efficiency, as light deflection or scattering can occur at this structure. The structuring is optional.

[0072] In the area of ​​the via 5, the metal mirror 3 penetrates the reflector 4. The semiconductor layer sequence 2 is directly electrically contacted by the metal mirror 3. The adhesion promoter layer 7 is applied to the reflector 4 only from the back side 12, so that the side surfaces of the via 5, formed by the metal mirror 3, are free of the adhesion promoter layer 7. In the area of ​​the reflector 4, the metal mirror 3 thus borders directly on the reflector 4 in the lateral direction. Therefore, the metal mirror 3 directly contacts the semiconductor layer sequence 2 electrically.

[0073] The metal mirror 3 can extend across the semiconductor layer sequence 2 with a constant thickness. This allows the protective metallization 6 to extend relatively close to the semiconductor layer sequence 2 in the area of ​​the via 5. Optionally, the protective metallization 6 can serve as a planar layer on the back side 12, unlike in [reference missing]. Fig. Figure 2 shows that this allows a flat mounting surface for the semiconductor chip 1 to be achieved on the protective metallization 6. The thickness of the metal mirror 3 is preferably at least 30 nm or 70 nm and / or at most 500 nm or 300 nm.

[0074] It is possible that the reflector 4, the adhesion layer 7, and the protective metallization 6 project laterally beyond the semiconductor layer sequence 2. The metal mirror 3 preferably terminates laterally with the semiconductor layer sequence 2. Thus, at the edge of the semiconductor chip 1, the protective metallization 6 is preferably in direct contact with the adhesion layer 7 all around. This results in the metal mirror 3 being tightly encapsulated laterally by the adhesion layer 7 together with the protective metallization 6.

[0075] This type of encapsulation of the metal mirror 3 makes it possible to use relatively moisture-sensitive materials such as silver for the metal mirror 3. This allows for increased reflectivity of the metal mirror 3, especially compared to gold mirrors.

[0076] As in all other embodiments, it is possible that the reflector 4 is not formed by a single, comparatively thick, radiation-transmitting layer. Thus, stacks of layers with alternating high and low refractive indices, similar to a Bragg mirror, can also be used for the reflector 4.

[0077] The semiconductor layer sequence 2 is based on AlInGaP or AlInGaAs. During operation, green, yellow, orange, and / or red light is preferentially generated in the active zone 23. It is also possible that the active zone 23 serves to generate infrared or near-infrared radiation.

[0078] It is possible to form one or more additional layers on the metal mirror 3 towards the protective metallization 6, for example, layers of ZnO or other TCO materials, or of TiW or other metals. Such a layer (not shown) protects the metal mirror 3 from oxidation in subsequent process steps. In particular, a ZnO layer is formed on the side of the Ag metal mirror 3 facing away from the semiconductor layer sequence 2 to prevent the silver from oxidizing.

[0079] The adhesion-mediating layer 7 can form a multi-layered encapsulation. However, for the sake of simplicity, the adhesion-mediating layer 7 is always depicted as a single layer in the figures.

[0080] The protective metallization 6, the adhesion-promoting layer 7 and the reflector 4 can be flush with each other in the lateral direction.

[0081] The explanations regarding Fig. Unless otherwise indicated, clause 2 applies preferably to all subsequent embodiments.

[0082] In the exemplary embodiment of the Fig. 3 is opposite Fig. 2. Additionally, a contact layer 8 is present. The contact layer 8 is, for example, made of a transparent conductive oxide such as ITO, but can alternatively also be made of a thin metal layer such as Ti, Pt, Pd, Au, or Ag. In the case of a metal layer, the contact layer 8 preferably has a thickness of at most 10 nm or 5 nm.

[0083] In the case of a TCO, the contact layer 8 preferably has a thickness of at least 10 nm and / or at most 400 nm, in particular between 30 nm and 60 nm inclusive.

[0084] It is possible that the contact layer 8 is limited to the structuring, i.e., to areas of greater thickness within the semiconductor layer sequence 2. In this case, the contact layer 8 covers the back side 12 of the semiconductor layer sequence 2 only in the area of ​​the via 5. Alternatively, it is possible that the contact layer 8 extends continuously across the semiconductor layer sequence 2 and covers the back side 12 completely or almost completely.

[0085] In the exemplary embodiment of the Fig. The via 5 is formed by the protective metallization 6. Thus, the metal mirror 3 is completely encapsulated by the adhesion layer 7 together with the protective metallization 6. The metal mirror 3 and the adhesion layer 7 are each applied flat to the reflector 4. Therefore, only the protective metallization 6 penetrates the reflector 4 towards the semiconductor layer sequence 2.

[0086] To achieve this geometry of the via 5, the adhesion promoter layer 7 and the metal mirror 3 are deposited before the via openings 5 ​​are patterned. The reflector 4 is also opened. In a first photolithography step, a portion of the metal mirror 3 is removed from an edge region of the semiconductor chip 1. In a second photolithography step, the reflector 4, the adhesion promoter layer 7, and the metal mirror 3 are removed to fill the via 5 with a protective metallization material 6. In a final step, the protective metallization 6 is deposited.

[0087] In this configuration, the encapsulating metal of the protective metallization 6 also serves as the electrical contact metal for the semiconductor layer sequence 2. An advantage of this design is that Ag does not become part of the electrical contact surface and is therefore not exposed to high current densities. However, this also imposes additional restrictions on the choice of material for the protective metallization 6: This material must form a low-resistance electrical contact with the semiconductor layer sequence 2 and enable the encapsulation of the metal mirror 3.

[0088] The exemplary embodiment of the Fig. 5 corresponds to the Fig. 4, with the additional presence of contact layer 8. The TCO contact layer 8 is limited to the area of ​​the via 5 and to the thicker areas of the semiconductor layer sequence 2 at the via 5.

[0089] Thus, the electrical contact to the semiconductor layer sequence is formed by a TCO, and the only requirement for the material of the protective metallization 6 is that it forms an electrical contact with this TCO layer. This offers two particular advantages: First, the silver of the metal mirror 3 is completely encapsulated even in the electrical contact area; second, the choice of material for the protective metallization 6 is less restricted, since forming a good metal-TCO contact is considerably easier than forming a good metal-semiconductor contact.

[0090] In the example of the Fig. Figure 6 shows that the adhesive layer 7 is removed from an edge of the semiconductor chip 1. The adhesive layer 7 preferably projects laterally beyond the metal mirror 3, with this projection being preferably at least 0.5 µm, 1 µm, or 2 µm and / or at most 10 µm or 5 µm. Thus, the material of the adhesive layer 7 is not exposed laterally. By removing the adhesive layer 7 in the edge region, it is possible for the reflector 4 to also have a reduced thickness in this edge region.

[0091] In this case, good adhesion of the protective metallization 6 to the reflector 4 is preferably present, but not necessarily to the adhesion promoter layer 7, which is made of aluminum oxide in particular. An additional layer can be introduced near the chip edge (not shown) to achieve increased adhesion between the protective metallization 6 and the reflector 4.

[0092] There are other processing methods that are among those described in the Fig. The semiconductor chips 1 described in sections 2 to 6 are subject to this. For example, the Ag metal mirror 3 can be structured at the edge and in the contact openings using two different photolithography steps. It is advantageous to structure the Ag layer immediately before applying the protective metallization 6 to avoid photoresist on the adhesion promoter layer 7 in the chip edge region. Photoresist on the aluminum oxide adhesion promoter layer 7 can negatively affect the adhesion properties after a resist removal step.

[0093] The protective metallization 6 preferably completely covers an outer edge of the metal mirror 3 as well as side surfaces of the adhesion promoter layer 7. This forms a dense encapsulation at the edge of the metal mirror 3 consisting of the adhesion promoter layer 7 together with the protective metallization 6. At the edge of the semiconductor chip 1, particularly around its perimeter, the protective metallization 6 is preferably applied directly to the reflector 4.

[0094] In Fig. In cross-section 6, the semiconductor chip 1 shows only two of the vias 5. It is possible that a larger number of vias 5 are present.

[0095] In the example of the Fig. Electrical contact is made between the semiconductor layer sequence 2 and the back side 12 via the optional contact layer 8 and the protective metallization 6. The metal mirror 3 and the adhesion promoter layer 7 are located on the side faces of the vias 5. Thus, the metal mirror 3 extends almost to the semiconductor layer sequence 2 and / or the contact layer 8. In particular, the adhesion promoter layer 7 preferably terminates flush with the protective metallization 6 in the direction of the semiconductor layer sequence 2. This means that the contact layer 8 can directly border the protective metallization 6 and the adhesion promoter layer 7.

[0096] This geometry made of Fig. 7, according to which the adhesion-promoting layer 7 covers side surfaces of the via 5, can be implemented in the same way in the embodiments of the Fig. 2 or Fig. 3. If the adhesion-promoting layer 7 is electrically conductive, then in both the embodiments of the Fig. 2 or Fig. 3 or in the exemplary embodiment of the Fig. The adhesion promoter layer 7 must be completely covered by the metal mirror 3 or the protective metallization 6. This means that even in the area of ​​the vias 5, the adhesion promoter layer 7 can extend continuously over the metal mirror 3 and / or the protective metallization 6. In particular, in this case, the adhesion promoter layer 7 lies between the contact layer 8 and the protective metallization 6.

[0097] With this geometry of the metal mirror 3, an increase in the reflection area of ​​the metal mirror 3 can be achieved. In this variant, the adhesion promoter layer 7 and the metal mirror 3 are deposited after the dielectric reflector 4 has been structured; that is, contact openings are etched. Using a second photolithography mask, the adhesion promoter layer 7 and the metal mirror 3 are removed from the electrical contact surface and the chip edge in a single step. Subsequently, the protective metallization 6 is applied.

[0098] The exemplary embodiment of the Fig. 8 builds in particular on the embodiment of the Fig. 5. The reflector 4 is located laterally next to the semiconductor layer sequence 2; this removal preferably takes place during the mesa etching process, i.e., during the creation of the separation grooves. A cover layer 75 extends from the light output side 10 over the side surfaces of the semiconductor layer sequence 2 to the adhesion promoter layer 7. The adhesion promoter layer 7 and the cover layer 75 are preferably made of the same material, in particular aluminum oxide. Preferably, the layers 7 and 75 are each produced by atomic layer deposition. This allows for a particularly dense encapsulation of the metal mirror 3, both from the light output side 10 and from the side surfaces of the semiconductor layer sequence 2.

[0099] Optionally, a moisture protection layer 76 is applied to the top layer 75. The moisture protection layer 76 is, for example, a nitride such as silicon nitride. The moisture protection layer 76 can also serve as an antireflective layer, for example, together with the top layer 75. For example, the moisture protection layer 76 is produced by CVD or PVD. The moisture protection layer 76 is preferably thicker than the top layer 75.

[0100] Such a covering layer 75 and / or such a moisture protection layer 76 can also be present in all embodiments.

[0101] For example, before the application of electrical contacts on the light-emitting side 10, particularly on the n-doped second side 22 of the semiconductor layer sequence 2, the dielectric reflector 4 in the separation trench is opened, thus exposing the adhesion-media layer 7 deposited on the p-side 21. This can be done in a separate photolithography step or in the same step as the mesa etching.

[0102] Subsequently, the further aluminum oxide cover layer 75 is deposited, which can cover the entire chip surface and rests in the separation groove on the adhesion promoter layer 7. Thus, both layers 7 and 75 act as moisture barriers, and all moisture pathways are sealed.

[0103] In Fig. Section 9 describes a manufacturing process for a semiconductor chip 1. According to Fig. In step 9A, the semiconductor layer sequence 2 is grown on a growth substrate 20. After the semiconductor layer sequence 2 has grown, structuring can optionally be carried out, resulting in thicker areas for the subsequent vias 5. Fig. 9A is not drawn. It is also optionally possible to apply the [information] locally or across the entire area. Fig. 9A, an unmarked contact layer is applied.

[0104] After the growth of the semiconductor layer sequence 2 and optionally after the application of the contact layer and / or the structuring of the semiconductor layer sequence 2, the reflector 4 is created.

[0105] In Fig. Figure 9B illustrates that the adhesion-promoting layer 7 is preferably generated over the entire surface of the reflector 4. Is a Fig. If a structure not shown in 9B is present, the adhesion promoter layer 7 preferentially replicates such a structure exactly. The adhesion promoter layer 7 is produced by atomic layer deposition.

[0106] The metal mirror 3 is then produced, for example by vapor deposition. If necessary, the metal mirror 3 and the adhesion promoter layer 7 can subsequently be structured, i.e., partially removed, in Fig. 9B not drawn.

[0107] Likewise, there is nothing in Fig. Figure 9 shows a structure for the optional vias 5. The vias 5 can be omitted if the reflector 4 and the adhesion layer 7 are electrically conductive. In this case, the reflector 4 and the adhesion layer 7 are, for example, made of a transparent conductive oxide or of different transparent conductive oxides.

[0108] In the procedural step of Fig. Figure 9C shows that the protective metallization 6 is applied to the metal mirror 3. However, any possible structuring of the protective metallization 6 is not illustrated.

[0109] Optionally, a bonding agent 91, such as solder, follows the protective metallization 6. Furthermore, the semiconductor layer sequence 2 on the side of the metal mirror 3 is connected to a support 9. In particular, the support 9 can be attached to the protective metallization 6 by soldering.

[0110] According to Fig. In step 9D, the growth substrate 20 was removed from the semiconductor layer sequence 2. Optionally, a roughening 92 is created to improve light extraction at the light extraction side 10.

[0111] In the procedural step of Fig. Figure 9E illustrates that a current distribution structure 93 can be applied to the light output side 10, for example formed by grid-shaped or strip-shaped metal tracks.

[0112] Alternatively, a layer of a transparent conductive oxide can serve as the current distribution structure.

[0113] Furthermore, in Fig. Figure 9E illustrates that the cover layer 75 and / or the moisture protection layer 76 can optionally be applied.

[0114] In general, the requirements for the correct selection of the adhesion promoter layer 7 are as follows: good adhesion between the dielectric reflector 4 and the metal mirror 3; high uniformity and conformality during application; effectiveness as a moisture barrier, at least when the adhesion promoter layer 7 is positioned between other layers; low absorption in the wavelength range emitted by the semiconductor chip 1. As an alternative to ALD, the adhesion promoter layer 7 can also be deposited using a thin-film deposition technique such as plating or chemical vapor deposition (CVD).

[0115] During processing, the metal mirror 3 typically comes into contact with air. To prevent oxidation, the metal mirror 3 should therefore be covered with a thin layer of another material, in particular ZnO, ITO, or TiW. This material can then be removed, if necessary, immediately before the deposition of the protective metallization 6, for example by sputtering. The protective metallization 6 is preferably moisture-stable and adheres well to the metal mirror 3 and to the adhesion promoter layer 7.

[0116] Unless otherwise indicated, the components shown in the figures preferably follow one another in the specified order. Layers that do not touch each other in the figures are preferably spaced apart. Where lines are drawn parallel to each other, the corresponding surfaces are preferably also aligned parallel to each other. Likewise, unless otherwise indicated, the relative positions of the drawn components to each other are correctly represented in the figures. Reference symbol list 1 optoelectronic semiconductor chip 1' Modification of a semiconductor chip 10 Light output side 12 Back 2 Semiconductor layer sequence 20 Growth substrate 21 p-dotted page 22 n-dotted page 23 active zones 3 metal mirrors 4 Reflector 5 electrical vias 6 Protective metallization 7 Detention mediation layer 71 Adhesive layer 75 Cover layer 76 Moisture protection layer 8 Contact layer 9 carriers 91 Fasteners 92 Roughening 93 Power distribution structure

Claims

[1] Optoelectronic semiconductor chip (1) with - a semiconductor layer sequence (2) based on AlInGaP and / or on AlInGaAs with an active zone (23) for generating radiation, - a metal mirror (3) for the radiation at a rear side (12) of the semiconductor layer sequence (2) opposite a light output coupling side (10), - a protective metallization (6) directly on one side of the metal mirror (3) facing away from the semiconductor layer sequence (2), - at least one metallic electrical via (5) that extends directly to a side of the semiconductor layer sequence (2) facing the metal mirror (3) or directly to a contact layer (8) made of a transparent conductive oxide and ends at a distance from the active zone (23), - an adhesion-promoting layer (7) directly on one side of the metal mirror (3) facing the semiconductor layer sequence (2), and - an electrically insulating reflector (4) made of at least one material which is transparent to the radiation generated during operation, where - the reflector (4) is located directly between the semiconductor layer sequence (2) and the adhesion layer (7), - the adhesion-promoting layer (7) and the protective metallization (6) extend laterally beyond the semiconductor layer sequence (2), - the reflector (4) is penetrated by the via (5), - the adhesion-promoting layer (7) is made of a dielectric oxide, and - the adhesion-promoting layer (7) is an encapsulation layer for the metal mirror (3), such that the metal mirror (3) is encapsulated at least at an outer edge by the adhesion-promoting layer (7) together with the protective metallization (6). [2] Optoelectronic semiconductor chip (1) according to claim 1, wherein the metal mirror (3) is completely encapsulated at all edges by the adhesion media layer (7) together with the protective metallization (6) and, in cross-section, is bordered exclusively on the protective metallization (6) together with the adhesion media layer (7) all around. [3] Optoelectronic semiconductor chip (1) according to any one of the preceding claims, wherein - the metal mirror (3) is a silver mirror, - the adhesion-promoting layer (7) is made of aluminium oxide, - the adhesion-promoting layer (7) is produced by means of atomic layer deposition, such that a specific diffusion constant of the adhesion-promoting layer (7) for water and oxygen is at most 10 -5 g / (m 2 d) is, calculated on a material thickness of 0.1 µm, - the protective metallization (6) is a stack of layers consisting of several metal layers, and - an area between the semiconductor layer sequence (2) and the protective metallization (6) is free of cavities. [4] Optoelectronic semiconductor chip (1) according to one of the preceding claims, wherein the via (5) extends to a side of the semiconductor layer sequence (2) facing the metal mirror (3) and terminates spaced away from the active zone (23). [5] Optoelectronic semiconductor chip (1) according to any one of the preceding claims, where the adhesion media layer (7) is located away from one of the regions of the via (5) closest to the semiconductor layer sequence (2), wherein the adhesion mediating layer (7) partially or completely covers the side flanks of the via (5). [6] Optoelectronic semiconductor chip (1) according to one of the preceding claims, wherein the via (5) is formed by the metal mirror (3) in a region closest to the semiconductor layer sequence (2). [7] Optoelectronic semiconductor chip (1) according to claim 6, wherein the protective metallization (6) in the via (5) extends closer to the semiconductor layer sequence (2) than adjacent areas of the metal mirror (3). [8] Optoelectronic semiconductor chip (1) according to one of claims 1 to 5, wherein the via (5) is formed in one of the regions closest to the semiconductor layer sequence (2) by the protective metallization (6). [9] Optoelectronic semiconductor chip (1) according to one of the preceding claims, wherein the reflector (4) extends above the semiconductor layer sequence (2) and / or the metal mirror (4) when viewed from above. [10] Optoelectronic semiconductor chip (1) according to claim 9, wherein the reflector (4) is directly adjacent to the protective metallization (6) in areas which, viewed from above, are adjacent to the semiconductor layer sequence (2). [11] Optoelectronic semiconductor chip (1) according to one of the preceding claims, wherein the metal mirror (3) in cross-section is bordered all around exclusively on the protective metallization (6) together with the adhesion media layer (7). [12] Optoelectronic semiconductor chip (1) according to one of the preceding claims, wherein the contact layer (8) is directly adjacent to the semiconductor layer sequence (2) and is electrically ohmic connected to the metal mirror (3). [13] Optoelectronic semiconductor chip (1) according to one of the preceding claims, wherein the adhesion layer (7) extends to the contact layer (8). [14] Optoelectronic semiconductor chip (1) according to one of the preceding claims, wherein the semiconductor layer sequence (2) has a greater thickness in the area of ​​the vias (5), the contact layer (8) being limited to the areas with the greater thickness. [15] Optoelectronic semiconductor chip (1) according to any one of the preceding claims, in which the adhesion-promoting layer (7) has a constant thickness at least across the metal mirror (3), where different areas of the detention mediation layer (7) do not overlap with each other. [16] Optoelectronic semiconductor chip (1) according to any one of the preceding claims, furthermore comprising a cover layer (75) extending from the light output side (10) across side flanks of the semiconductor layer sequence (2) to the adhesion media layer (7), so that the semiconductor layer sequence (2) is enclosed in at least one cross-section by the cover layer (75) together with the adhesion media layer (7) and the protective metallization (6), wherein the cover layer (75) and the adhesion promoter layer (7) are made of the same material. [17] Optoelectronic semiconductor chip (1) according to the preceding claim, wherein the cover layer (75) is coated with a moisture protection layer (76). [18] Method for manufacturing an optoelectronic semiconductor chip (1) according to any one of the preceding claims comprising the steps: A) Growth of the semiconductor layer sequence (2) which is made of AlInGaP or AlInGaAs, B) Separation and / or structuring of the detention mediation layer (7), C) Deposition and / or structuring of the metal mirror (3) such that the metal mirror (3) partially covers the adhesion promoter layer (7), D) Applying the protective metallization (6) to the metal mirror (3) and to the adhesion promoter layer (7), and E) Removal of a growth substrate (20) for the semiconductor layer sequence (2).

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