Methods for evaluating semiconductor wafers, methods for selecting semiconductor wafers and methods for manufacturing components

Abstract

Method for evaluating a semiconductor wafer, wherein a highly polished wafer is used as the semiconductor wafer, and the procedure includes: a step of acquiring profile measurement data by measuring a profile of an entire surface in a thickness direction of the mirror-polished wafer with a wafer profile measuring system; a step of identifying a slicing direction of the mirror-polished wafer by Extracting profile measurement data in the diameter direction from the profile measurement data on the entire surface of the mirror-polished wafer, Performing first-order or second-order differentiation on the extracted profile measurement data in the diameter direction at a predetermined distance to acquire differential profiles of the profile measurement data in the diameter direction at predetermined rotation angles over the entire surface of the mirror-polished wafer, and Comparing the acquired differential profiles of all pieces of the profile measurement data in the diameter direction to determine that a diameter direction of the differential profile containing a maximum derivative value is the disc cutting direction; a step of capturing xy grid data by Specifying rectangular coordinates with coordinate axes that are the identified slice cutting direction and a direction perpendicular to the identified slice cutting direction, Performing first-order or second-order differentiation on profile measurement data at a predetermined distance in a y-direction at a predetermined interval in an x-direction, wherein the y-direction is the identified slice-cutting direction and the x-direction is the direction perpendicular to the identified slice-cutting direction, and Forming an xy grid with predetermined intervals in the x-direction and the y-direction; containing a step Defining an intermediate region including a center of the mirror-polished wafer in the y-direction of the mirror-polished wafer and a top-end region and a bottom-end region located outside the intermediate region, and Detecting a maximum derivative value in the intermediate region of the mirror-polished wafer and a maximum derivative value in the top-end region and the bottom-end region of the mirror-polished wafer from the acquired xy-grid data; and a step of judging whether or not there is a possibility of occurrence of defects in a device manufacturing process based on the maximum leakage value in the intermediate region and the maximum leakage value in the upper end region and the lower end region.

Description

TECHNICAL FIELD

[0001] The present invention relates to a method for evaluating a semiconductor wafer, a method for selecting a semiconductor wafer and a method for manufacturing a device. STATE OF THE ART

[0002] Currently, a film residue-related anomaly has been reported in a CMP step in device manufacturing processes, leading to uneven film thickness after polishing. The main cause is believed to be a peculiar waveform occurring in the direction in which an ingot is cut with a wire saw in a dicing step of wafer manufacturing processes. The presence of such a peculiar waveform causes a difference in the removal of polishing material between a convex portion and a concave portion of a wafer, resulting in uneven film thickness after polishing. CITATION LISTPATENT LITERATURE

[0003] Patent document 1: JP 2004 - 20 286 A

[0004] JP H11 - 287 630 A describes an optical surface shape measuring device with a test table, a laser oscillator, an automatic focusing mechanism, a displacement meter and a personal computer. SUMMARY OF THE INVENTION TECHNICAL PROBLEM

[0005] In device manufacturing processes, screening wafers with a waveform that causes anomalies related to film residues requires identifying the cutting direction of a wire saw. However, such a method has not yet been established. Therefore, screening using nanotopography has been attempted, but nanotopography only expresses a tiny unevenness on the entire wafer surface with a numerical value and cannot identify the wafer cutting direction.

[0006] Meanwhile, Reference 1 discloses a method for evaluating the surface shape of a wafer using the differentiated shape in a diameter direction of the entire surface. However, this method aims to quantitatively evaluate the shape of a semiconductor wafer, particularly the shape of a peripheral part of the wafer, from a different perspective than conventional wafer shape quality methods such as SFQR, and cannot identify the slicing direction required for detecting a particular waveform.

[0007] Accordingly, as an alternative approach to nanotopography and conventional wafer shape evaluation, there is a need to develop a method that enables effective detection, evaluation, and screening for a particular waveform attributable to the cutting step.

[0008] The present invention was conceived to solve the above-mentioned problems. An object of the present invention is to provide a method for evaluating a semiconductor wafer by precisely and easily identifying a slicing direction, enabling effective detection and evaluation of a particular waveform attributable to the slicing step that influences the occurrence of defects in a device manufacturing process. SOLUTION TO THE PROBLEM

[0009] The present invention has been made to achieve this object and provides a method for evaluating a semiconductor wafer, wherein a highly polished wafer is used as the semiconductor wafer, and the method comprises: a step of acquiring profile measurement data by measuring a profile of an entire surface in a thickness direction of the mirror-polished wafer with a wafer profile measuring system; a step of identifying a slicing direction of the mirror-polished wafer by Extracting profile measurement data in the diameter direction from the profile measurement data on the entire surface of the mirror-polished wafer, Performing first-order or second-order differentiation on the extracted profile measurement data in the diameter direction at a predetermined distance to acquire differential profiles of the profile measurement data in the diameter direction at predetermined rotation angles over the entire surface of the mirror-polished wafer, and Comparing the acquired differential profiles of all pieces of the profile measurement data in the diameter direction to determine that a diameter direction of the differential profile containing a maximum derivative value is the disc cutting direction; a step of capturing xy grid data by Specifying rectangular coordinates with coordinate axes that are the identified slice cutting direction and a direction perpendicular to the identified slice cutting direction, Performing first-order or second-order differentiation on profile measurement data at a predetermined distance in a y-direction at a predetermined interval in an x-direction, wherein the y-direction is the identified slice-cutting direction and the x-direction is the direction perpendicular to the identified slice-cutting direction, and Forming an xy grid with predetermined intervals in the x-direction and the y-direction; containing a step Defining an intermediate region including a center of the mirror-polished wafer in the y-direction of the mirror-polished wafer and a top-end region and a bottom-end region located outside the intermediate region, and Detecting a maximum derivative value in the intermediate region of the mirror-polished wafer and a maximum derivative value in the top-end region and the bottom-end region of the mirror-polished wafer from the acquired xy-grid data; and a step of judging whether or not there is a possibility of occurrence of defects in a device manufacturing process based on the maximum leakage value in the intermediate region and the maximum leakage value in the upper end region and the lower end region.

[0010] Such a method for evaluating a semiconductor wafer enables precise identification of the slicing direction in a convenient manner and precise and convenient judgment as to whether there is a possibility of defects occurring in a device manufacturing process due to the influence of a particular waveform attributable to the slicing step, the judgment being made based on the identified slicing direction.

[0011] In this method for evaluating a semiconductor wafer, the extraction of the profile measurement data in the diameter direction and the acquisition of the differential profiles at a predetermined rotation angle, which is an interval of 0.5 to 10°, can be performed.

[0012] This allows the slicing direction of a highly polished wafer to be determined more accurately and efficiently.

[0013] In this method for evaluating a semiconductor wafer, the predetermined intervals in the x-direction and y-direction in the xy grid can be 0.5 to 2 mm. Furthermore, the predetermined pitch in the y-direction in the xy grid can be 2 to 10 mm.

[0014] These enable a more accurate and efficient assessment of the occurrence of defects in a component manufacturing process.

[0015] In this method for evaluating a semiconductor wafer, a flatness measurement system or a nanotopography measurement system can be used as a wafer profile measurement system.

[0016] These can capture more precise profile measurement data conveniently and at high measuring speed.

[0017] In this method of evaluating a semiconductor wafer, the defect in a device manufacturing process may be an anomaly related to a film residue.

[0018] Accordingly, it is possible to prevent quality defects in a device manufacturing process and effectively suppress a reduction in yield that would otherwise occur due to anomalies related to a film residue.

[0019] Here, there may be provided a method for selecting a semiconductor wafer, which further comprises a screening step for the mirror-polished wafer, as a non-defective product, having no possibility of occurrence of defects according to the above-described method for evaluating a semiconductor wafer.

[0020] In this way, wafers with a high probability of defects can be sorted out, so that the yield in a component manufacturing process can be increased.

[0021] Here, there may be provided a method for manufacturing a device, which comprises manufacturing a device using the mirror-polished wafer selected as a non-defective product by the above-described method for selecting a semiconductor wafer.

[0022] In this way, components of higher quality can be produced in high yield. ADVANTAGEOUS EFFECTS OF THE INVENTION

[0023] As described above, the method for evaluating a semiconductor wafer according to the invention enables a simple and precise identification of a slicing direction and thus a precise judgment as to whether or not defects will occur in a device manufacturing process. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 shows differential profiles of several parts of the profile measurement data in the diameter direction. Fig. 2 shows an explanatory diagram of a disc cutting direction with a wire saw. Fig. 3 shows diagrams for explaining a method for evaluating a semiconductor wafer according to the present invention. Fig. 4 shows diagrams for explaining the method according to the invention for evaluating a semiconductor wafer. Fig. 5 shows the evaluation results of example and comparison example. DESCRIPTION OF THE EMBODIMENTS

[0024] Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.

[0025] As mentioned above, there are demands for a method for evaluating a semiconductor wafer by precisely and easily identifying a slicing direction to enable effective detection and evaluation of a particular waveform attributable to the slicing direction, which has an influence on the occurrence of defects in a device manufacturing process.

[0026] The present inventors have seriously investigated the above problems and consequently found that a method for evaluating a semiconductor wafer as follows can conveniently accurately identify a slicing direction, and whether or not there is an occurrence of defects in a device manufacturing process due to the influence of the particular waveform attributable to the slicing step can be accurately and conveniently judged based on the identified slicing direction. In this method for evaluating a semiconductor wafer, a mirror-polished wafer is used as the semiconductor wafer, and the method includes: a step of acquiring profile measurement data by measuring a profile of an entire surface in a thickness direction of the mirror-polished wafer with a wafer profile measurement system;a step of identifying a slicing direction of the mirror-polished wafer by extracting diameter-direction profile measurement data from the profile measurement data on the entire surface of the mirror-polished wafer, performing first-order or second-order differentiation on the extracted diameter-direction profile measurement data at a predetermined distance to acquire differential profiles of the diameter-direction profile measurement data at predetermined rotation angles over the entire surface of the mirror-polished wafer, and comparing the acquired differential profiles of all parts of the diameter-direction profile measurement data to determine that a diameter direction of the differential profile containing a maximum derivative value is the slicing direction;a step of acquiring xy-grid data by setting rectangular coordinates with coordinate axes being the identified slicing direction and a direction perpendicular to the identified slicing direction, performing first-order or second-order differentiation on profile measurement data at a predetermined distance in a y-direction at a predetermined interval in an x-direction, where the y-direction is the identified slicing direction and the x-direction is the direction perpendicular to the identified slicing direction, and forming an xy-grid with predetermined intervals in the x-direction and the y-direction;a step of defining an intermediate region including a center of the mirror-polished wafer in the y-direction of the mirror-polished wafer and a top-end region and a bottom-end region located outside the intermediate region, and detecting a maximum derivative value in the intermediate region of the mirror-polished wafer and a maximum derivative value in the top-end region and the bottom-end region of the mirror-polished wafer from the detected xy-grid data; and a step of judging whether or not there is a possibility of defects occurring in a device manufacturing process based on the maximum derivative value in the intermediate region and the maximum derivative value in the top-end region and the bottom-end region. This finding has led to the completion of the present invention.

[0027] The invention is described below with reference to the drawings.

[0028] As previously mentioned, screening wafers with a waveform causing a film residue-related anomaly in a device manufacturing process requires first identifying the slicing direction of a wire saw. The present inventors examined first- or second-order differential profiles in several diameter directions obtained from a wafer whose slicing direction is known. The inventors found that the diameter direction containing the maximum derivative value coincides with the cutting direction.

[0029] Fig. Figure 1 shows the result of comparing differential profiles (here, the values ​​are obtained by second-order differentiation) obtained from several pieces of profile measurement data in the diameter direction over the entire in-plane area of ​​a mirror-polished wafer (PW) with a diameter of 300 mm. As shown in Fig. 1, it was found that the diameter direction (in the example of Fig. 1 the direction is designated 85°) of a differential profile with the maximum derivative value corresponds to the actual disc cutting direction with a wire saw (see Fig. 2). Exploiting this fact allows for accurate and easy identification of the slicing direction of a highly polished wafer. (Step of obtaining profile measurement data)

[0030] Fig. 3, Fig. 4 show diagrams for explaining the method according to the invention for evaluating a semiconductor wafer.

[0031] First, as in Fig. 3 shows a profile of a surface in the thickness direction of a highly polished wafer ( Fig. 3(a)) is completely measured with a wafer profile measurement system to acquire profile measurement data. The wafer profile measurement system used in this case is not particularly limited as long as it can measure the profile of an entire surface in a thickness direction of a wafer. Known wafer profile measurement systems can be used. In particular, a flatness measurement system or a nanotopography measurement system is preferably used because they can conveniently and accurately acquire profile measurement data. The subsequent evaluation is carried out using the profile measurement data obtained in this step. (Step of identifying the slicing direction of the mirror-polished wafer)

[0032] Next, the slicing direction of the mirror-polished wafer is identified. As shown in Fig. As shown in Figure 3(b), profile measurement data in the diameter direction are extracted from the acquired profile measurement data on the entire surface. As shown in Fig. Incidentally, as shown in Figure 3(b), the angle (0°) is set as the reference here. However, as long as the disc cutting direction is to be identified at the end, the reference can be set at any position. Then, the extracted profile measurement data is subjected to first-order or second-order differentiation at every predetermined distance, so that differential profiles of the profile measurement data in the diameter direction are obtained. In this case, the distance at which the differentiation is performed is not particularly limited and can be 0.1 to 10 mm. In addition, setting the lower limit value to, for example, 2 mm or more can reduce the influence of noise. In such a range, more accurate evaluation is possible. In addition, the differentiation is preferably second-order differentiation. This enables more accurate evaluation and judgment.

[0033] Such differential profiles of the profile measurement data in the diameter direction are acquired at every predetermined rotation angle across the entire surface of the mirror-polished wafer. In this case, the rotation angle can be an angular interval greater than 0° and is preferably a predetermined angle in a range of 0.5 to 10°, more preferably 1 to 5°. Within such ranges, a more accurate evaluation can be performed.

[0034] Next, the acquired differential profiles of all pieces of profile measurement data are compared in the diameter direction. Then, the diameter direction of the differential profile containing the maximum derivative value can be identified as the slicing direction of the mirror-polished wafer. (Step of acquiring XY grid data)

[0035] After the slicing direction of the mirror-polished wafer to be evaluated is identified, rectangular coordinates are determined for this mirror-polished wafer as shown in Fig. 4(a), where the identified slicing direction and a direction perpendicular to the slicing direction serve as the coordinate axes. Then, differentiation of the profile measurement data is performed over the entire wafer surface and in a direction parallel to the slicing direction to obtain a differential profile in a single direction (the slicing direction).

[0036] More specifically, first-order or second-order differentiation is performed on all profile measurement data at a predetermined pitch in a y-direction at a predetermined interval in an x-direction, where the y-direction is the slicing direction and the x-direction is the direction perpendicular to the slicing direction. Then, an xy-grid is formed with a predetermined interval in the x-direction and a predetermined interval in the y-direction. In this way, xy-grid data is acquired. The size of the xy-grid can optionally be set in a range of about 0.1 mm to 10 mm. The predetermined intervals in the x and y directions are preferably in a range of 0.5 to 2 mm, and the pitch at which differentiation is performed in the y-direction is preferably in a range of 2 to 10 mm. With such pitches, the accuracy of the evaluation can be further increased.Furthermore, for more accurate evaluation of the differential profiles of the profile measurement data on a wafer, the grating intervals in the x-direction and y-direction are preferably smaller than the differentiation distance. In particular, the grating intervals are preferably approximately 1 mm.

[0037] It should be noted that the derivative values ​​are preferably calculated by second-order differentiation. This allows for more precise evaluation and assessment. (Step of assessing whether there is a possibility of errors occurring or not)

[0038] Next, as in Fig. As shown in Figure 4(b), an intermediate region including the center of the mirror-polished wafer, as well as a top-end region and a bottom-end region outside the intermediate region, are defined in the y-direction of the mirror-polished wafer. Then, from the acquired xy-grid data, a maximum derivative value in the intermediate region of the mirror-polished wafer and a maximum derivative value in the top-end and bottom-end regions of the mirror-polished wafer are determined. The reason why the intermediate region, top-end region, and bottom-end region are set as described above is as follows: While the cutting length varies during the initial and final stages of slicing, the cutting length is long during the middle stage of slicing, and the cutting progresses relatively stably.Furthermore, the waviness in the initial and final stages of cutting differs from that in the middle stage of cutting. Accordingly, the influences of a manufacturing process, such as a CMP step, on the film residue differ depending on whether the waviness occurs in the intermediate region of a wafer or in the top and bottom regions. Therefore, by separately specifying regions such as the intermediate region corresponding to the middle stage of cutting and the top and bottom regions corresponding to the initial and final stages of cutting, the assessment accuracy is improved compared to clearly specifying a specific standard for the lattice data on the entire wafer surface.Note that for a wafer with a diameter of 300 mm, the intermediate region may be a region covering an area 200 mm wide in the y-direction with respect to a straight line passing through the wafer center in the x-direction as the center (i.e., based on the straight line passing through the wafer center in the x-direction, the region is located ±100 mm in the y-direction); the top-end regions and the bottom-end regions are preferably regions other than the intermediate region, that is, regions located approximately ±50 mm inside (y-direction) of the wafer from both ends of the wafer in the y-direction (i.e., from end portions of the wafer that lie on a straight line passing through the center of the wafer in the y-direction) (see . Fig. 4(b)).

[0039] Then, whether or not there is a possibility of defects occurring in a device manufacturing process is judged based on the maximum derivative value in the intermediate region and the maximum derivative value in the upper-end region and the lower-end region. As a judgment method in this case, for example, the judgment may be made based on whether or not the maximum derivative value in each region is within predetermined standard values, or whether or not a parameter such as a ratio (error %) of the number of grid data exceeding a predetermined limit (threshold) relative to the total number of grid data on the entire wafer surface is within predetermined standard values.As an indicator of a defect in a component manufacturing process, an anomaly related to a film residue is preferably used in a CMP step during component manufacturing. Note that it is possible to set default values ​​for the parameter used in the assessment, which can be effectively verified based on a user-required profile, etc. (Screening step for mirror-polished wafers as non-defective product)

[0040] After judging whether or not the mirror-polished wafer has the possibility of defects occurring during device manufacturing as described above, the mirror-polished wafer in which no possibility of defects occurring is determined can be effectively selected as a defect-free product. When the mirror-polished wafer selected as a non-defective product is used to manufacture a device, this makes it possible to effectively suppress a defect in the subsequent step of the device manufacturing process, particularly the occurrence of film residue defects in the CMP step. Furthermore, according to the methods for evaluating and selecting a semiconductor wafer according to the present invention, wafers that have a possibility of causing defects in the device pattern in the photolithography step, etc., that do not belong to the CMP step can be checked and removed in advance. EXAMPLE

[0041] The present invention will be described in detail below with reference to an example. However, this does not limit the present invention.

[0042] Forty-four silicon wafers (PW), each with a diameter of 300 mm, were prepared as mirror-polished wafers for evaluation in the example and comparative examples. These silicon wafers were from different batches but for the same user. To verify the effect of the inventive method for evaluating a semiconductor wafer, the 44 wafers also included wafers with and without wire-saw breakage, thus differing in the occurrence of anomalies related to film residues. For these wafers, the nanotopography standard evaluation result processed with a single Gaussian filter (comparative example) was compared with the standard evaluation result (example) based on maximum derivative values ​​in the intermediate region, the top-end region, and the bottom-end region, which are composed of second-order derivative values ​​in the slicing direction.

[0043] A wafer profile measurement system (Wafer-Sight series manufactured by KLA Tencor) was initially used to acquire profile measurement data in the thickness direction of all wafers. This profile measurement data was used for the evaluations in both the example and the comparison example. (Comparison example)

[0044] Based on the nanotopography values, the semiconductor wafers were evaluated to assess whether defects would occur during device manufacturing. Specifically, the flatness measurement system was used to acquire the profile measurement data in the thickness direction of each wafer, and the data were filtered with a simple Gaussian filter (25 mm circular window) to obtain the nanotopography values. The threshold value "nanotopography value = 38 nm" was set as the condition for assessing whether defects would occur during device manufacturing. If the nanotopography value was > 38 nm, defects were considered possible. (Example)

[0045] Based on the method for evaluating a semiconductor wafer according to the present invention, the slicing direction of each wafer was determined, the xy-grid data were acquired, and the maximum derivative values ​​in the intermediate region, the top surface region, and the bottom surface region of the wafer were measured. Specifically, the profile measurement data in the thickness direction of the wafer obtained with the flatness measurement system were used to acquire shape profiles in the diameter directions of the wafer. The data were subjected to second-order differentiation with a differentiation pitch of 10 mm, and differential profiles of the profile measurement data in the diameter direction were acquired. This process was performed over the entire surface of the wafer at rotation angles of 1° pitch. In this way, second-order differential profile data over the entire surface was obtained.Subsequently, from all second-order differential profile data, the diameter direction of the profile containing the maximum derivative value was determined as the slicing direction of the wafer.

[0046] The thus-identified cutting direction was designated as the y-direction in a rectangular xy-coordinate system, while the direction perpendicular to the cutting direction was designated as the x-direction. Second-order differentiation was then performed on the profile measurement data in the y-direction at fixed intervals, with the differentiation interval in the y-direction being 10 mm, to obtain xy-grid data, with grid intervals in the x-direction and y-direction being 1 mm.

[0047] Next, the maximum leakage values ​​were recorded in the intermediate region, the upper-end region, and the lower-end region outside the intermediate region. The intermediate region covers a range of ±100 mm (corresponding to 50 mm to 250 mm in diameter) in the y-direction on the wafer and is based on the straight line passing through the wafer center in the x-direction.

[0048] As a condition for judging whether a defect might occur during device manufacturing, the thresholds were set: "maximum leakage value = 5 nm / mm2" for the intermediate region; and "maximum leakage value = 8 nm / mm2" for the upper-end and lower-end regions. Specifically, the wafer was judged to be defect-prone if either "the maximum leakage value in the intermediate region > 5 nm / mm2" or "the maximum leakage value in the upper-end and lower-end regions > 8 nm / mm2" was met. In other words, it was judged as having no possibility of defect occurrence only if both "the maximum leakage value in the intermediate region ≤ 5 nm / mm2" and "the maximum leakage value in the upper-end and lower-end regions ≤ 8 nm / mm2" were met simultaneously.

[0049] Fig. 5 shows the evaluation results of example and comparison example. Fig. Figure 5(a) shows the results of the evaluation of the wafers based on the nanotopography values ​​in the comparative example. (b) and (c) in Fig. 5 shows the results of the evaluation of the example. Fig. Figure 5(b) shows the maximum derivative values ​​of the second-order differential profile data in the intermediate regions of the wafers. Fig. Figure 5(c) shows the maximum derivative values ​​of the second-order differential profile data in the upper and lower end regions of the wafers. The threshold values ​​adopted for each assessment are also shown in Fig. 5(a) to (c).

[0050] As in Fig. As shown in Figure 5(a), of the total of 44 wafers in the nanotopography-based assessment in Comparative Example, 6 wafers failed due to excessive assessment even though they should have passed (hereinafter referred to as "over-assessed wafers") (these were samples without wire breakage and without anomalies related to film residues); 12 wafers passed due to insufficient assessment even though they should have failed (hereinafter referred to as "unsatisfactory wafers") (these were samples without wire breakage but with anomalies related to film residues in the layer). The percentage of excessive assessment was 13.6%, and the percentage of insufficient assessment was 27.3%.

[0051] Meanwhile, the assessment according to the Fig.In the example shown in Figures 5(b) and (c), the number of over-judged wafers was reduced to 2 and the number of under-judged wafers was also reduced to 2. Both the percentage of over-judgment and the percentage of under-judgment were improved to 4.5%.

[0052] As described above, in the comparative example, many wafers should have passed by nature in the evaluation and selection based on nanotopography but failed the excessive evaluation, and many wafers should have failed but passed the insufficient evaluation. In contrast, it was found that both the excessive evaluation and insufficient evaluation were improved in the evaluation and selection according to the evaluation method of the present invention, and that wafers with a waveform were selected more effectively compared to the nanotopography-based evaluation and selection.Thus, the method for evaluating a semiconductor wafer according to the present invention detects the waveform and is capable of more accurately searching for wafers that may have anomalies related to film residues compared to the conventional method for evaluating and selecting based on nanotopography.

Claims

[1] A method for evaluating a semiconductor wafer, wherein a highly polished wafer is used as the semiconductor wafer, and the procedure includes: a step of acquiring profile measurement data by measuring a profile of an entire surface in a thickness direction of the mirror-polished wafer with a wafer profile measuring system; a step of identifying a slicing direction of the mirror-polished wafer by Extracting profile measurement data in the diameter direction from the profile measurement data on the entire surface of the mirror-polished wafer, Performing first-order or second-order differentiation on the extracted profile measurement data in the diameter direction at a predetermined distance to acquire differential profiles of the profile measurement data in the diameter direction at predetermined rotation angles over the entire surface of the mirror-polished wafer, and Comparing the acquired differential profiles of all pieces of the profile measurement data in the diameter direction to determine that a diameter direction of the differential profile containing a maximum derivative value is the disc cutting direction; a step of capturing xy grid data by Specifying rectangular coordinates with coordinate axes that are the identified slice cutting direction and a direction perpendicular to the identified slice cutting direction, Performing first-order or second-order differentiation on profile measurement data at a predetermined distance in a y-direction at a predetermined interval in an x-direction, wherein the y-direction is the identified slice-cutting direction and the x-direction is the direction perpendicular to the identified slice-cutting direction, and Forming an xy grid with predetermined intervals in the x-direction and the y-direction; containing a step Defining an intermediate region including a center of the mirror-polished wafer in the y-direction of the mirror-polished wafer and a top-end region and a bottom-end region located outside the intermediate region, and Detecting a maximum derivative value in the intermediate region of the mirror-polished wafer and a maximum derivative value in the top-end region and the bottom-end region of the mirror-polished wafer from the acquired xy-grid data; and a step of judging whether or not there is a possibility of occurrence of defects in a device manufacturing process based on the maximum leakage value in the intermediate region and the maximum leakage value in the upper end region and the lower end region. [2] A method for evaluating a semiconductor wafer according to claim 1, wherein the extraction of the profile measurement data in the diameter direction and the acquisition of the differential profiles are performed at a predetermined rotation angle which is an interval of 0.5 to 10°. [3] A method for evaluating a semiconductor wafer according to claim 1 or 2, wherein the predetermined intervals in the x-direction and the y-direction in the xy grid are 0.5 to 2 mm. [4] A method for evaluating a semiconductor wafer according to any one of claims 1 to 3, wherein the predetermined differentiation is performed on the xy grid in the y direction at a pitch of 2 to 10 mm. [5] A method for evaluating a semiconductor wafer according to any one of claims 1 to 4, wherein a flatness measuring system or a nanotopography measuring system is used as the wafer profile measuring system. [6] A method for evaluating a semiconductor wafer according to any one of claims 1 to 5, wherein the defect in a device manufacturing process is an anomaly related to a film residue. [7] A method for selecting a semiconductor wafer, further comprising a screening step for the mirror-polished wafer, as a non-defective product, which has been judged to have no possibility of occurrence of defects according to the method for evaluating a semiconductor wafer according to any one of claims 1 to 6. [8] A method of manufacturing a device, comprising manufacturing a device using the mirror-polished wafer selected as a non-defective product by the method of selecting a semiconductor wafer according to claim 7.

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