Method for treating a polycrystalline silicon carbide wafer

Abstract

The invention relates to a method for treating a polycrystalline silicon carbide wafer, which method comprises: characterising (R2) a surface condition of a front face of the polycrystalline silicon carbide wafer; when the characterised surface condition does not satisfy a predetermined specification for bonding (C) the polycrystalline silicon carbide wafer to a monocrystalline silicon carbide substrate with the front face located at the bonding interface, correcting (R3) the surface condition of the front face of the polycrystalline silicon carbide wafer by removing material therefrom.

Description

[0001] METHOD FOR TREATING A POLYCRYSTALLINE SILICON CARBIDE WAFER

[0002] TECHNICAL FIELD

[0003] The field of the invention is that of polycrystalline silicon carbide wafers intended to serve as supports for thin layers of monocrystalline silicon carbide.

[0004] PRIOR ART

[0005] Silicon carbide (SiC) is increasingly widely used in power electronics applications, particularly to meet the needs of emerging electronics fields such as electric vehicles. Power devices and integrated power systems based on single-crystal SiC can effectively handle much higher power density than their traditional silicon counterparts, even with smaller active area dimensions.

[0006] Monocrystalline SiC substrates for the microelectronics industry remain expensive and difficult to source in large quantities. It is therefore advantageous to use layer transfer solutions to develop composite structures typically comprising a thin monocrystalline SiC layer on a lower-cost support substrate. A well-known thin-layer transfer solution is the Smart Cut™ process. Such a process makes it possible, for example, to manufacture a composite structure comprising a thin monocrystalline SiC layer, taken from a monocrystalline SiC (mSiC) donor substrate, in contact with a polycrystalline SiC (pSiC) recipient substrate.

[0007] This receiving substrate is a pSiC wafer obtained from a relatively thick pSiC plate (generally referred to as a slab) (for example, 0.6 to 3 mm thick). A deposition of pSiC on a growth substrate (for example, a graphite substrate), typically a chemical vapor deposition at a temperature between 1100°C and 1400°C, makes it possible to form the pSiC wafer. Following removal of the growth substrate, the pSiC wafer is subjected to a process for forming one or more wafers (a so-called wafer-ing process in English) which includes various steps of cleaning, etching, grinding and polishing and makes it possible to obtain one or more pSiC wafers having a desired shape (in particular a beveled edge) and a desired thickness. Sawing can also be carried out during this process, in particular when several wafers must be manufactured from the same wafer.The thickness of the polycrystalline SiC wafer thus manufactured is, according to the SEMI standard, 350 pm + / - 25 pm for a substrate with a diameter of 150 mm, or 500 pm + / - 25 pm for a substrate with a diameter of 200 mm.

[0008] The Smart Cut™ process applied to SiC requires specific surface preparation before bonding the donor (mSiC) and recipient (pSiC) substrates. Bonding can be carried out, for example, using the ADB technique (acronym for "Atomic Diffusion Bonding") or the SAB technique (acronym for "Surface activation bonding"). This surface preparation aims to create a specific surface condition, characterized by its roughness over a spatial frequency range from 5x5pm to 150x150pm.

[0009] However, this surface preparation does not appear to be perfectly reproducible since many pSiC wafers thus prepared risk leading to incomplete transfer of the mSiC layer during the Smart Cut™ process. Thus, in practice, a preliminary sorting of the pSiC wafers thus prepared is carried out to reject those which do not meet the expected specifications in terms of roughness to meet the constraints of the bonding process. The rejection rate is high even though pSiC wafers are expensive and their manufacture requires a significant amount of energy.

[0010] STATEMENT OF THE INVENTION

[0011] The invention aims to reduce this rejection rate in order to reduce the cost of the Smart Cut™ process applied to SiC and its environmental impact.

[0012] For this purpose, the invention proposes a method for treating a polycrystalline silicon carbide wafer, comprising the following steps: characterizing a surface roughness of a front face of the polycrystalline silicon carbide wafer; - when the characterized surface roughness meets a predetermined specification for bonding the polycrystalline silicon carbide wafer with a monocrystalline silicon carbide substrate with the front face at the bonding interface: performing said bonding;

[0013] - when the characterized surface roughness does not meet the said specification, the reduction, by removing a thickness of material between 3 pm and 10 pm from the front face of the polycrystalline silicon carbide wafer, of the surface roughness of the front face; the reiteration of the characterization of the surface roughness of the front face; when the surface roughness characterized by the reiteration of the characterization meets the said predetermined specification, the carrying out of the said bonding.

[0014] The predetermined specification corresponds to a criterion previously determined as being sufficient, when fulfilled, to, for example, obtain total bonding of the pSiC wafer with the mSiC substrate with the front face at the bonding interface. The bonding is said to be total when the mSiC substrate is bonded over the entire front face excluding a peripheral ring with a width less than 10 mm at any point, preferably less than 6 mm, even more preferably less than 5 mm. The bonding step and the material removal step are alternatives conditioned respectively on the conformity or non-conformity of the characterization of the surface roughness of the face to be bonded.Thus, the method according to the invention allows the identification of polycrystalline silicon carbide wafers among a batch of wafers resulting from the same watering process which risks leading to an incomplete transfer of a layer of monocrystalline silicon carbide to correct said wafers until the surface condition of the wafer allows satisfactory bonding, so as to avoid rejecting a large number of wafers.

[0015] Some preferred but non-limiting aspects of this method are as follows:

[0016] - material removal is carried out only on the front face;

[0017] - removal of material from the front face includes grinding;

[0018] - grinding includes in succession coarse grinding and fine grinding; - coarse grinding is carried out with a grinding wheel whose abrasive grain size is characterized by a mesh of less than 5000;

[0019] - rough grinding removes a thickness of material less than 10 pm;

[0020] - fine grinding is carried out with a wheel whose abrasive grain size is characterized by a mesh greater than 5000;

[0021] - fine grinding removes a thickness of material less than 3 pm;

[0022] - the removal of material from the front face also includes, following grinding, polishing of the front face;

[0023] - polishing is chemical or chemical-mechanical polishing;

[0024] - polishing removes a thickness of material less than 1 pm;

[0025] - the method further comprises pre-forming the polycrystalline silicon carbide wafer from a polycrystalline silicon carbide plate, said pre-forming comprising double-sided thinning of the polycrystalline silicon carbide plate, said double-sided thinning comprising, for example, successively, very rough grinding, rough grinding and fine grinding;

[0026] - the preliminary training further includes steps of sawing, engraving and / or polishing the back face and / or the front face of the polycrystalline silicon carbide plate;

[0027] - the characterization of the surface state of the front face of the polycrystalline silicon carbide wafer includes a haze measurement by light scattering;

[0028] - it includes, when the surface roughness characterized by the reiteration of the characterization of the surface roughness of the front face does not meet said specification, an additional reduction, by removal of material, of the surface roughness of the front face;

[0029] - the polycrystalline silicon carbide wafer is initially supplied with an initial thickness within a range of acceptable thicknesses and has, after reduction of the surface roughness of the front face, a final thickness within the same range of acceptable thicknesses. The invention extends to a method for constituting a batch of polycrystalline silicon carbide wafers each having a final thickness within a range of acceptable thicknesses comprising:

[0030] - the supply of a set of polycrystalline silicon carbide wafers each having an initial thickness within the same range of acceptable thicknesses;

[0031] - for each of the wafers in the set, successively: o the characterization of a surface roughness of a front face of the wafer; o when the characterized surface roughness meets a predetermined specification for bonding the wafer with a monocrystalline silicon carbide substrate with the front face at the bonding interface, adding the wafer to said batch; o when the characterized surface roughness does not meet said predetermined specification: reducing, by removing a thickness of material between 3 μm and 10 μm from the front face of the polycrystalline silicon carbide wafer, the roughness of the front face; repeating the characterization of the surface roughness of the front face; when the surface roughness characterized by repeating the characterization meets said predetermined specification, adding the wafer to said batch.

[0032] Finally, the invention extends to a method for constituting a batch of multilayer structures, each multilayer structure comprising a thin layer of monocrystalline silicon carbide deposited on a polycrystalline silicon carbide wafer, the method comprising, for each wafer of a batch of polycrystalline silicon carbide wafers constituted as previously mentioned, the bonding of a monocrystalline silicon carbide substrate on the front face of said polycrystalline silicon carbide wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Other aspects, aims, advantages and characteristics of the invention will appear better on reading the following detailed description of preferred embodiments thereof, given by way of non-limiting example, and made with reference to the appended drawings in which Figure 1 is a diagram illustrating different steps of a Smart Cut™ process integrating a treatment of a pSiC wafer in accordance with the invention.

[0034] DETAILED DESCRIPTION OF SPECIFIC EMBODIMENTS

[0035] The invention relates to a method for treating a pSiC wafer intended to serve as a support for a thin layer of mSiC. This method may comprise a preliminary step of forming the wafer from a pSiC plate (slab). To do this, the pSiC plate is subjected to a wafering process. This process may in particular comprise double-sided thinning of the plate and possibly planarization of the plate in order to compensate for any curvature. The thinning may be carried out by grinding. This grinding may comprise, in succession, very coarse grinding which brings the thickness to around 400 μm, coarse grinding which brings the thickness to around 360 μm and fine grinding which removes the last microns of material.The different grinding processes are distinguished by the grain size of the grinding wheel used, these grains becoming increasingly smaller in successive grinding processes. The different grinding processes are implemented on both the front and back faces of the polycrystalline silicon carbide plate.

[0036] In addition to grinding, the wafering process may include one or more steps of cleaning, etching and / or polishing the front face and / or the back face of the polycrystalline silicon carbide wafer. For example, the polishing includes chemical-mechanical polishing. Polishing makes it possible to reduce the surface roughness of the polycrystalline silicon carbide wafer and / or to rectify the flatness of said polycrystalline silicon carbide wafer. Cleaning makes it possible to remove contamination. Finally, the watering process may include sawing, particularly when several polycrystalline silicon carbide wafers must be manufactured from the same polycrystalline silicon carbide wafer.

[0037] For example, the pSic plate is prepared by CVD deposition on graphite, so that the double-sided thinning of said pSic carbide plate is preceded by a graphite detachment step.

[0038] The polycrystalline silicon carbide wafer from the pSiC plate preferably has an initial thickness within an acceptable thickness range or target thickness range and chosen so that after reduction of the surface roughness of the front face of said polycrystalline silicon carbide wafer by one or more successive material removals as described below, the final thickness of the pSiC wafer remains within the same acceptable thickness range, the initial thickness and the final thickness designating the average thickness of the pSiC wafer respectively before and after all the material removals.

[0039] More specifically, the initial thickness and the final thickness of the polycrystalline silicon carbide wafer belong to intervals called respectively the initial thickness distribution and the final thickness distribution of the polycrystalline silicon carbide wafer. The initial thickness distribution of the polycrystalline silicon carbide wafer is chosen to be within the acceptable thickness range and the middle of said initial thickness distribution is chosen to be larger than the middle of the acceptable thickness range, so that the final thickness distribution of the polycrystalline silicon carbide wafer is also within the acceptable thickness range, where the middle of each of the intervals designates the average value of the lower and upper limits of said interval.For example, the midpoint of the initial thickness distribution is larger than the midpoint of the acceptable thickness range of 15 pm.

[0040] Such an embodiment advantageously makes it possible to obtain polycrystalline silicon carbide wafers which meet a thickness standard despite the implementation of one or more successive reductions in surface roughness by material removal. The thickness standard may correspond to a thickness range accepted by equipment in the semiconductor industry. Alternatively or additionally, the thickness standard may either meet a specification commonly adopted in the semiconductor industry or be clearly defined by a semiconductor industry standard.

[0041] For example, the acceptable thickness range is that defined by the SEMI standard for 150 mm diameter pSic wafers, i.e. 350 pm + / - 25 pm. For example, the acceptable thickness range is that commonly adopted by most semiconductor manufacturers for 200 mm diameter pSic wafers, i.e. 500 pm + / - 25 pm.

[0042] In this case, the wafer from the 150 mm diameter pSic plate may have an initial thickness within an initial thickness distribution shifted to 365 pm, for example an initial thickness of 365 pm + / - 10 pm and the wafer from the 200 mm diameter pSic plate may have an initial thickness within an initial thickness distribution shifted to 515 pm, for example a thickness of 515 pm + / - 10 pm.This embodiment allows the final thickness of the 150 mm diameter pSiC wafer to remain compliant with the SEMI standard by having a final thickness included in a final thickness distribution of 350 pm + / - 25 pm and the final thickness of the 200 mm diameter pSiC wafer to remain compliant with the specification commonly accepted by the semiconductor industry, by having a final thickness included in a final thickness distribution of 500 + / - 25 pm, while in accordance with the invention described below one or more operations for correcting the surface condition of the pSiC wafer are carried out in order to ensure the correct implementation of the Smart Cut™ process following its bonding with an mSiC substrate.

[0043] As represented by Figure 1, the method according to the invention can thus comprise a step RI of providing a pSiC wafer. The method according to the invention also comprises a step (designated by R2 in Figure 1) consisting of carrying out a characterization of a surface state of a front face of the pSiC wafer, typically a characterization of a roughness of this front face. This characterization can in particular comprise a haze measurement by light scattering. Such a haze measurement makes it possible to characterize the surface roughness of the front face of the pSiC wafer. This haze comes from a method using the optical reflectivity properties of the surface to be characterized and corresponds to an optical signal scattered by the surface, due to its microroughness. Haze measurement can be carried out, for example, using the Surfscan SP1 or SPA2 inspection system from KLA-Tencor or the SICA88 inspection system from Lasertec.

[0044] The method according to the invention then comprises a step of determining whether or not the characterized surface roughness meets a predetermined specification.

[0045] In certain embodiments, said determined specification is a criterion previously determined as being sufficient, when fulfilled, to obtain total bonding of the pSiC wafer with the mSiC substrate with the front face at the bonding interface. The bonding is said to be total when the mSiC substrate is bonded over the entire front face excluding a peripheral ring with a width less than 10 mm at any point, preferably less than 6 mm, even more preferably less than 5 mm. It is indeed recalled that, since the substrates generally have a chamfer on their edge, the bonding of the mSiC substrate and consequently the subsequent transfer of the thin layer of mSiC occur over the majority of the surface of the pSiC wafer but not in a peripheral ring extending from the edge of the wafer, the width of which depends in particular on the geometry of the chamfer.

[0046] The predetermined specification may relate to an indirect measurement of surface roughness. In the possible embodiment for which the characterization of surface roughness comprises a haze measurement, the predetermined specification may be that the measured haze level must be less than a predetermined threshold, in other words a haze level limit value previously determined as guaranteeing successful bonding, i.e. in particular total bonding as previously defined.

[0047] If the characterized surface roughness meets the predetermined specification, the method according to the invention continues with the bonding (designated by C in Figure 1), for example according to the ADB technique, of the pSiC wafer with an mSiC substrate, the front face of the pSiC wafer being at the bonding interface. In accordance with the Smart Cut™ method, the detachment (designated by D in Figure 1), caused by a heat treatment, a mechanical action or a combination of these means, of the mSiC substrate is then carried out along a weakening plane previously formed therein by ion implantation in order to transfer a thin layer of mSiC onto the pSiC wafer and thus form a composite structure. In this respect, Figure 1 designates by DI the provision of the mSiC substrate and by D2 the ion implantation allowing it to be weakened.Following detachment D and transfer of the thin layer of mSiC onto the pSiC wafer, a finishing treatment (designated by F in Figure 1) of the composite structure is carried out on the one hand and, on the other hand, a possible recycling R of the remainder of the mSiC substrate to enable its reuse.

[0048] If the surface condition of the front face does not meet the predetermined specification, the method according to the invention comprises a step (designated by R3 in Figure 1) of reducing, by removing material from the front face of the pSiC wafer, the surface roughness of this front face. Unlike the prior double-sided thinning of the pSiC wafer, the material removal can be carried out only on the front face.

[0049] This removal of material from the front face removes a thickness of material between 3 and 10 μm. It can be achieved by grinding the front face. As previously mentioned, the grinding of the pSiC wafer can be carried out here only on the front face intended to be bonded to the mSiC substrate. This grinding only on the front face is made possible due to the double-sided grinding carried out previously during the wafering process and which made it possible to balance the stresses between the front and back faces.

[0050] Grinding may include, in succession, coarse grinding and fine grinding. Rough grinding may be carried out with a grinding wheel whose abrasive grain size is characterized by a mesh size of less than 5000. Rough grinding preferably removes a thickness of material of less than 10 μm, for example a thickness of 5 μm.

[0051] Fine grinding can be carried out with a grinding wheel whose abrasive grain size is characterized by a mesh greater than 5000, for example a mesh between 8000 and 1200. Fine grinding preferably removes a thickness of material less than 3 μm.

[0052] In one possible embodiment, the removal of material from the front face may further comprise, following grinding, polishing of the front face. This polishing may be chemical or chemical-mechanical polishing. The polishing preferably removes a thickness of material less than 1 μm.

[0053] It is understood that if this reduction in the surface roughness of the front face intended to be bonded removes, for example, a material thickness of 10 pm, it is then preferable for the pSiC wafer to initially have a thickness greater than that expected by the standard, for example a thickness of 365 pm, so that at the end of the correction it has the thickness of 350 pm expected by the standard or so that it can undergo several surface condition correction operations while retaining a final thickness greater than the lower limit of 325 pm expected by the standard.

[0054] Indeed, following a first correction of the surface roughness of the front face intended to be bonded, the method comprises a reiteration of the characterization of the surface condition of the front face and, when the surface condition characterized by the reiteration of the characterization meets the predetermined specification, the performance of the bonding.

[0055] When the surface roughness characterized by the repeated characterization does not meet the predetermined specification, the method may include additional reduction, by material removal, of the surface roughness of the front face.

[0056] The method of the invention may include one or more additional reductions, by material removal, of the surface roughness of the front face, each preceded by a characterization of the surface condition. Each additional material removal is preferably identical to the first material removal. With 3 to 10 μm removed at each material removal, a first material removal and up to 3 additional material removals can typically be achieved while maintaining a final thickness compliant with the SEMI standard.

[0057] The method according to the invention can also be repeated to treat a set of wafers resulting from the same "watering" process and to constitute a batch of wafers each suitable for bonding with a monocrystalline SiC substrate despite the lack of reproducibility of the surface state of the wafers resulting from said "watering" process. Thus the invention extends to a method for constituting a batch of polycrystalline silicon carbide wafers comprising: - the provision of a set of polycrystalline silicon carbide wafers;

[0058] - for each of the wafers in the set: o characterizing a surface roughness of a front face of the wafer; o when the characterized surface roughness meets a predetermined specification for bonding the wafer with a monocrystalline silicon carbide substrate with the front face at the bonding interface, adding the wafer to said batch; o when the characterized surface roughness does not meet said predetermined specification, reducing, by removing a thickness of material between 3 μm and 10 μm from the front face of the polycrystalline silicon carbide wafer, the surface roughness of the front face, repeating the characterization of the surface roughness of the front face; then, when the surface roughness characterized by the repeating of the characterization meets said predetermined specification, adding the wafer to said batch.

[0059] The wafers in the batch thus formed can then each be bonded with a monocrystalline SiC substrate.

[0060] Each polycrystalline silicon carbide wafer of the polycrystalline silicon carbide wafer set is preferably provided with an initial thickness within a range of acceptable thicknesses and has, after reduction of the surface roughness of the front face, a final thickness within the same range of acceptable thicknesses.

[0061] In other words, each polycrystalline silicon carbide wafer resulting from the batch formation process has a final thickness within a target range, each polycrystalline silicon carbide wafer in the set of polycrystalline silicon carbide wafers having been initially supplied with an initial thickness within a narrowed range within the target range, the narrowed range being centered on a value greater than the central value of the target range.

Claims

CLAIMS 1. A method of treating a polycrystalline silicon carbide wafer, comprising the following steps: - the characterization (R2) of a surface roughness of a front face of the polycrystalline silicon carbide wafer; - when the characterized surface roughness meets a predetermined specification for bonding (C) the polycrystalline silicon carbide wafer with a monocrystalline silicon carbide substrate with the front face at the bonding interface: carrying out said bonding; - when the characterized surface roughness does not meet said specification, the reduction (R3), by removing a thickness of material between 3 pm and 10 pm from the front face of the polycrystalline silicon carbide wafer, of the surface roughness of the front face; the reiteration of the characterization of the surface roughness of the front face; when the surface roughness characterized by the reiteration of the characterization meets said predetermined specification, the carrying out of said bonding.

2. Method according to claim 1, in which the removal of material is carried out only on the front face.

3. Method according to one of claims 1 and 2, in which the removal of material from the front face comprises grinding.

4. Method according to claim 3, in which the grinding comprises in succession a coarse grinding and a fine grinding.

5. Method according to claim 4, in which the coarse grinding is carried out with a grinding wheel whose abrasive grain size is characterized by a mesh of less than 5000.

6. Method according to one of claims 4 and 5, in which the rough grinding removes a thickness of material less than 10 μm.

7. Method according to one of claims 4 to 6, in which the fine grinding is carried out with a grinding wheel whose abrasive grain size is characterized by a mesh greater than 5000.

8. Method according to one of claims 4 to 7, in which the fine grinding removes a thickness of material less than 3 μm.

9. Method according to one of claims 4 to 8, in which the removal of material from the front face further comprises, following grinding, polishing of the front face.

10. The method of claim 9, wherein the polishing is chemical or chemical-mechanical polishing.

11. Method according to one of claims 9 and 10, in which the polishing removes a thickness of material less than 1 μm.

12. A method according to one of claims 1 to 11, further comprising pre-forming the polycrystalline silicon carbide wafer from a polycrystalline silicon carbide plate, said pre-forming comprising double-sided thinning of the polycrystalline silicon carbide plate, said double-sided thinning comprising, for example, successively, very rough grinding, rough grinding and fine grinding.

13. The method of claim 12, wherein said pre-forming further comprises steps of sawing, etching and / or polishing the back face and / or the front face of the polycrystalline silicon carbide wafer.

14. Method according to one of claims 1 to 13, in which the characterization of the surface state of the front face of the polycrystalline silicon carbide wafer comprises a measurement of haze by light scattering.

15. Method according to one of claims 1 to 14, comprising, when the surface roughness characterized by the reiteration of the characterization of the surface roughness of the front face does not meet said specification, an additional reduction, by removal of material, of the surface roughness of the front face.

16. Method according to one of claims 1 to 15, in which the polycrystalline silicon carbide wafer is initially provided with an initial thickness included in a range of acceptable thicknesses and has, after reduction of the surface roughness of the front face, a final thickness included in the same range of acceptable thicknesses.

17. Method for constituting a batch of polycrystalline silicon carbide wafers each having a final thickness within a range of acceptable thicknesses comprising: - the supply of a set of polycrystalline silicon carbide wafers each having an initial thickness within the same range of acceptable thicknesses; - for each of the wafers in the set, successively: o the characterization (R2) of a surface roughness of a front face of the wafer; o when the characterized surface roughness meets a predetermined specification for bonding (C) the wafer with a monocrystalline silicon carbide substrate with the front face at the bonding interface, the addition of the wafer to said batch; o when the characterized surface roughness does not meet said predetermined specification: the reduction (R3), by removing a thickness of material between 3 pm and 10 pm from the front face of the polycrystalline silicon carbide wafer, of the surface roughness of the front face; the reiteration of the characterization of the surface roughness of the front face; when the surface roughness characterized by the reiteration of the characterization meets said predetermined specification, the addition of the wafer to said batch.

18. A method of forming a batch of polycrystalline silicon carbide wafers according to claim 17, wherein each silicon carbide wafer of the set of polycrystalline silicon carbide wafers is provided with an initial thickness within a narrow range within the acceptable thickness range, the narrow range being centered on a value greater than the center value of the acceptable thickness range.

19. Method for manufacturing a batch of multi-layer structures, each multi-layer structure comprising a thin layer of monocrystalline silicon carbide deposited on a polycrystalline silicon carbide wafer, the method comprising, for each wafer of a batch of polycrystalline silicon carbide wafers constituted according to one of claims 17 or 18, bonding a monocrystalline silicon carbide substrate to the front face of said polycrystalline silicon carbide wafer.

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