Method for manufacturing a substrate for an electronic power or radiofrequency device

Abstract

The invention relates to a method for manufacturing a substrate (15) for an electronic power or radiofrequency device comprising · forming a support substrate (10) comprising a deposition of at least one layer (100) of polycrystalline silicon carbide by chemical vapour deposition (CVD) in an atmosphere comprising a mixture of argon and a deposition precursor fluidised in hydrogen, the chemical vapour deposition being carried out under Ar / (Ar+H2) ratio and temperature conditions suitable for forming carbon inclusions (1) in the layer of silicon carbide, and · assembling the support substrate (10) and a surface layer (20) made of a monocrystalline material.

Description

[0001]METHOD FOR MANUFACTURING A SUBSTRATE FOR A POWER OR RADIOFREQUENCY ELECTRONIC DEVICE FIELD OF THE INVENTION The present invention relates to a substrate for an electronic device, in particular for application to power or radiofrequency electronics. The invention also relates to an electronic device comprising such a substrate, and to a method for manufacturing such a substrate. STATE OF THE ART Silicon carbide (SiC) is widely used for manufacturing power or radiofrequency electronic components. A substrate for producing such components typically comprises a support substrate that may be made of polycrystalline SiC (p-SiC), and a surface layer of monocrystalline SiC (m-SiC) extending over the support substrate. Electronic components are manufactured in or on the monocrystalline SiC layer. The structure is cut into the form of chips, each comprising one or more electronic components.Each chip is soldered onto a heat sink stack, comprising metal layers, a heat-conducting ceramic, and a heat sink. Heat is thus dissipated primarily through the heat sink stack, resulting in significant thermal stresses on the filler material soldering the electronic component and the top metal layer of the heat sink stack. However, the coefficient of thermal expansion (CTE) and Young's modulus of SiC and the thermal stack, particularly copper, are very different. Temperature variations therefore cause deformations of unequal magnitude in the different layers above and below the solder. In particular, since the Young's modulus of SiC is high compared to that of other materials, stresses are concentrated in these materials, particularly in the filler material.Thus, the filler material is highly stressed, which leads to cracks, delaminations, or crumbling at the solder interface, resulting in a shortened device lifetime. To reduce these mechanical stresses, it is known to thin the layers of the composite structure, particularly the polycrystalline SiC base substrate. However, the abrasion of such a base substrate is long and laborious, resulting in a high cost of the electronic component. In addition, thinning involves a risk of breakage, making the composite structure unusable. Another solution is to modify the materials used to carry out the soldering, which is difficult to implement, in particular while preserving the mechanical strength and the electrical and thermal conductivity of the soldering.STATEMENT OF THE INVENTION An aim of the invention is to propose a composite structure for the production of electronic devices, having better resistance to temperature cycles, while avoiding cracks, delaminations and crumbling at the soldering interface. To this end, the invention proposes a method for manufacturing a substrate for a power or radiofrequency electronic device, comprising ^ the formation of a support substrate comprising a deposition of at least one layer of polycrystalline silicon carbide by chemical vapor deposition, CVD, in an atmosphere comprising a mixture of argon and a deposition precursor fluidized in hydrogen, said chemical vapor deposition being carried out under Ar / (Ar+H2) ratio and temperature conditions suitable for forming carbon inclusions in said silicon carbide layer, and ^ the assembly of the support substrate and a surface layer made of a monocrystalline material.The CVD process under gas atmosphere is an alternative to the known sintering process. The CVD process allows to control the composition and morphology of the deposited layer. In particular, it can allow to create a concentration gradient of inclusions in a single deposition process. The elongated silicon carbide grains are likely to generate an anisotropic electrical and thermal resistivity which is lower in a direction perpendicular to the surface of the substrate. This improves the evacuation of heat and the conduction of electricity towards the back surface of the substrate. The presence of carbon inclusions does not penalize the operation of the electronic device which is manufactured in or on the superficial monocrystalline layer, which is devoid of such inclusions. Advantageously, 1. the deposition precursor is methyltrichlorosilane.Preferably, the surface layer is made of a semiconductor material, preferably silicon carbide or gallium nitride or diamond. Advantageously, at least a first phase of the chemical vapor deposition is carried out at a temperature above 1200°C, preferably above 1400°C. Advantageously, a first temperature at the start of chemical vapor deposition is higher than a second temperature at the end of chemical vapor deposition. Preferably, the Ar / (Ar+H2) ratio decreases during the chemical vapor deposition step. Advantageously, the formation of the support substrate further comprises a step of assembling said at least one layer of silicon carbide comprising the carbon inclusions with a base layer of porous silicon carbide.The invention also relates to a substrate for a power or radiofrequency electronic device, comprising ^ a support substrate made of polycrystalline silicon carbide having a front face and a rear face, and ^ a surface layer made of a monocrystalline material extending over the front face of said support substrate, said substrate being characterized in that at least a portion of said support substrate comprises a plurality of silicon carbide grains having an elongated shape oriented in a direction perpendicular to the surface of the substrate and a plurality of carbon inclusions located between said grains. Preferably, the surface layer is made of a semiconductor material, preferably silicon carbide or gallium nitride or diamond.Advantageously, the ratio between the length and the width of the silicon carbide grains in the support substrate is greater than or equal to 1:1.2, advantageously greater than 1:10 and more advantageously greater than 1:20. The ratio between the length and the width of the silicon carbide grains further facilitates polishing. Thus, if polishing causes a grain of silicon carbide elongated to be torn off in a direction perpendicular to the surface of the substrate, a cavity is obtained having reduced horizontal dimensions compared to the tearing of a grain in an isotropic structure. In addition, tearing is made more difficult since the grain is more deeply embedded in the matrix formed by the other grains. Advantageously, the carbon inclusions are discontinuous.Preferably, the ratio between the width and the length of the carbon inclusions is 1:1.2, advantageously greater than 1:20 and more advantageously greater than 1:30. Advantageously, the support substrate has a concentration gradient of the carbon inclusions, so that the density of the carbon inclusions increases from the front face towards the back face. In certain embodiments, only a portion of the support substrate comprises said carbon inclusions and the support substrate further comprises a portion free of carbon inclusions between the surface layer of monocrystalline SiC and the portion comprising the carbon inclusions. Preferably, the volume ratio of the carbon inclusions in the support substrate is between 1% and 40%, preferably between 1% and 20%.The invention also relates to an electronic device comprising a substrate as described above and at least one electronic power or radiofrequency component formed in or on the surface layer, and a heat dissipation device, the substrate being brazed to the heat dissipation device by means of a filler material so that the filler material is in integral contact with at least part of the portion comprising carbon inclusions on the rear face of the support substrate. BRIEF DESCRIPTION OF THE FIGURES Other characteristics and advantages of the invention will emerge from the detailed description which follows, with reference to the appended drawings, in which: Figure 1 illustrates a device comprising two electronic components produced from a substrate according to the invention and a heat dissipation stack. Figure 2A illustrates a substrate according to a first embodiment.Figure 2B illustrates a substrate according to a second embodiment. Figure 2C illustrates a substrate according to a third embodiment. Figures 3A to 3D illustrate the steps for producing a support substrate according to the invention. Figures 4A to 4C illustrate the steps for assembling the support substrate with the surface layer. Figure 5 is a graph of the different silicon carbide phases obtained during a CVD process as a function of the temperature and the gas composition in the deposition chamber. DETAILED DESCRIPTION OF EMBODIMENTS Figure 1 illustrates a power or radiofrequency electronic device comprising one or more electronic chips 11, 12 produced from a substrate according to the invention. The chips may be linked by interconnections. In the case of a radiofrequency device, the electronic chip may carry a lateral device made of gallium nitride.The electronic chips 11, 12 are mounted on a heat dissipating structure by solders 22, 23. This dissipating structure (DBC, acronym for the English term "Direct Bonded Copper") comprises two copper metallizations 17, 19 and a substrate 18 made of a heat-conducting and electrically insulating ceramic, for example aluminum nitride. Electrical connections 27, 28 are fixed to the copper metallization 17 by means of solders 25, 26. A solder 29 fixes the device to a heat sink 34 and a base plate 32. A layer of thermal grease 31 ensures thermal contact between the sink 34 and the base plate 32. The power or radiofrequency electronic device is encapsulated in a case 39 which is typically made of plastic.Each chip is formed from a substrate comprising a silicon carbide support substrate and a surface layer made of a monocrystalline material in or on which at least one power electronic component or one radiofrequency electronic component is formed. Presentation of the substrate Figures 2A to 2C illustrate substrates 15 for a power or radiofrequency electronic device according to different embodiments. Each substrate 15 comprises, from its rear face to its front face, a support substrate 10 and a surface layer 20. The rear face 105, 106 of the support substrate 10 is intended to be fixed on the thermal stack 17, 18, 19 of Figure 1 by a solder 22. One or more electronic components 11, 12 may be formed in or on the surface layer 20. The support substrate 10 is made of polycrystalline silicon carbide. At least a portion of the support substrate 10 comprises carbon inclusions 1.The silicon carbide is in the form of a plurality of elongated grains 2. The ratio between the width and the length of the grains 2 is greater than or equal to 1:1.2, and preferably greater than 1:10. In preferred embodiments, the ratio between the width and the length of the grains is greater than 1:20. The grains 2 are oriented in a Z direction perpendicular to the surface 220 of the substrate and bonded together. The measurement and variation of the grain size can be evaluated by counting the number of intersections between a line parallel to the base of the substrate and the grain boundaries. Such a measurement is for example carried out by a technical observation of electron microscopy such as backscattered electron microscopy (BSE). The carbon 1 inclusions are dispersed discontinuously between the grains 2 of silicon carbide.The ratio between the width and the length of the carbon inclusions 1 is greater than or equal to 1:1.2, and preferably greater than 1:10. In the preferred embodiments, the ratio between the width and the length of the carbon inclusions 1 is greater than 1:30. The elongated geometry of the silicon carbide grains 2 and the carbon inclusions 1 results in improved electrical and / or thermal conductivity in a direction Z perpendicular to the surface 220 of the substrate compared to the conductivity perpendicular to Z, because the number of grain boundaries to be crossed between the two faces is limited. Such thermal conductivity promotes in particular good heat dissipation towards a thermal stack bonded to the rear face 105 of the substrate by a solder. With reference to FIG. 2A, the carbon inclusions 1 may be distributed throughout the entire extent of the support substrate 10. The distribution of the inclusions may be homogeneous.Alternatively, the support substrate has a concentration gradient of the carbon inclusions. In this case, the density of the carbon inclusions decreases from the rear face towards the front face. The gradient can be produced continuously, or successively in several layers having carbon levels decreasing from the rear face towards the surface. In certain cases, with reference to FIG. 2B, a portion 10A extending from the front face is devoid of carbon inclusions and a second portion 10B comprises inclusions, which can be distributed homogeneously or according to a gradient. Such a configuration has a front face of homogeneous composition, which facilitates the preparation of the support substrate for bonding a layer of monocrystalline SiC.In particular, the grinding and / or polishing steps are easier to perform on a homogeneous front face, because the carbon inclusions are more brittle than the SiC grains. These inclusions are therefore more easily destroyed or torn off during polishing, which can lead to an increase in the roughness of the surface. For example, the portion 10B comprising the inclusions may be a so-called thin layer, having a thickness of between 100 nm and 3 µm. In this case, the layer comprising the inclusions has very little impact on the thermal and electrical conductivity. Alternatively, the portion 10B comprising the inclusions is a so-called thick layer, having a thickness that is, for example, approximately 350 µm. Such a layer allows thinning of the substrate via its rear face after the electronic components have been manufactured on its front face. For example, the layer may be thinned to a final thickness of between 100 and 180 µm.This makes it possible to reduce the total resistance to the passage of a current flowing in the direction of a Z axis perpendicular to the base of the substrate. For all thicknesses of the portion comprising the inclusions, also for intermediate thicknesses between 3 and 100 µm, it is possible to prepare a starting portion 10B having a thickness greater than the thickness envisaged for the final application, and to carry out thinning in a subsequent step. In other embodiments, the substrate may comprise other additional layers. With reference to FIG. 2C, the substrate may comprise a porous silicon carbide layer 60 extending from its rear face 106. The substrate may comprise other layers having a porosity different from the layer 60, or one or more layers comprising inclusions obtained by a different method such as sintering, or made of another material.A high carbon content reduces the Young's modulus of silicon carbide and thus brings the Young's modulus of the support substrate closer to the Young's modulus of a thermal stack on which the electronic component will be soldered. This avoids mechanical and thermal stresses in the substrate, particularly on the back side of the support substrate, and in the solder. The reduction in stresses increases the lifetime of the component. The volumetric content of carbon inclusions in the support substrate is between 1% and 40%. The thickness of the layer including the inclusions after CVD deposition is typically between 500 µm and 4 mm, with thickness variations (TTV, acronym for the English term "Total Thickness Variation") which are typically between 50 µm and 1.5 mm. After thinning, the final thickness of the silicon carbide layer formed by CVD can vary depending on the intended application.For example, for a substrate diameter of 150 mm, the thickness of the layer comprising the inclusions is typically 350 µm ±25 µm, and for a substrate diameter of 200 mm, the thickness of the layer comprising the inclusions is approximately 500 µm ±25 µm. The surface layer 20 is made of a monocrystalline material, for example a semiconductor such as silicon carbide or gallium nitride or another III-V type semiconductor. In some cases, the surface layer is made of diamond. In a preferred embodiment, the surface layer is made of monocrystalline silicon carbide. In a variant, the surface layer 20 may be a non-continuous layer, for example a layer composed of a set of blocks which are each made of a monocrystalline material. This variant may be used for materials not available in the dimensions corresponding to the diameter of the support substrate.For example, the surface layer may be composed of a plurality of juxtaposed diamond blocks. The function of the support substrate is to provide mechanical support for the component to be manufactured, and to efficiently conduct heat to the thermal stack. Furthermore, due to the anisotropy of the grains and the carbon inclusions, the electrical conductivity perpendicular to the surface of the substrate is maximized because the number of grain boundaries to be crossed on the path is reduced. Manufacturing method We will now describe the steps of a method for manufacturing such a substrate 15. We begin by providing a support 80 for manufacturing the support substrate 10. Typically, a graphite support 80 is used that is easy to remove or burn after manufacturing the support substrate. The support 80 is introduced into a chemical vapor deposition (CVD) chamber and the chamber is heated to a first temperature T1.The first temperature T1 is greater than 1200°C, preferably greater than 1400°C. A high temperature T1 promotes the formation of carbon inclusions in the support substrate to be formed. Simultaneously, a gas mixture is introduced into the deposition chamber. The gas mixture comprises a carrier gas, typically argon, and a deposition precursor fluidized by another gas which is typically hydrogen. The precursor is for example methyltrichlorosilane (CH3SiCl3). With reference to FIG. 3A, a layer 100 of silicon carbide comprising carbon inclusions is thus deposited on the support 80. In the case where an upper layer free of inclusions or a gradient of inclusions is targeted (FIG. 2B), the temperature in the chamber is progressively lowered during the vapor deposition process to reach an end-of-deposition temperature T2 lower than T1 and / or the Ar / (Ar+H2) gas ratio is lowered.In the case where a layer with a homogeneous distribution of inclusions is deposited (Figure 2A), these parameters are kept constant. The deposition of the silicon carbide layer is thus continued in order to obtain a thickness greater than the thickness of the support substrate to be manufactured. Typically, a thickness of between 500 µm and 2 mm is targeted. At the beginning of the growth of the silicon carbide layer 100, the grain size is often variable and then becomes more homogeneous. By promoting the growth of a thick layer, the portion in which the grain size varies greatly can subsequently be removed, and the portion in which the grain size is homogeneous and of good crystalline quality can be used. During and after deposition, the surface 110 of the layer 100 has a high roughness due to the vertical orientation of the grains.A substrate having silicon carbide in the form of a plurality of elongated grains is for example illustrated in Figures 3a to 3c of patent FR3134234. In the method according to the invention, silicon carbide grains having a similar structure are obtained. However, to form the carbon inclusions between the silicon carbide grains, the method according to the invention is carried out under determined conditions of temperature and argon content in the mixture of carrier gas and fluidizing gas introduced with the precursor. The temperature is adjusted according to the argon content and preferably higher than the temperature used in the method described in patent FR31342234, which also promotes growth of the silicon carbide in the form of elongated grains. Such deposition conditions also cause the growth of carbon inclusions in the form of elongated grains.Advantageously, the ratio between the length and the width of the silicon carbide grains in the support substrate is greater than or equal to 1:1.2, advantageously greater than 1:10 and more advantageously greater than 1:20. With reference to FIG. 3B, once the envisaged thickness of the silicon carbide layer 100 has been reached, the carbon support 80 is removed mechanically or by combustion. With reference to FIG. 3C, the lower portion 13 of the silicon carbide layer is then removed in which the grain size is inhomogeneous and the crystalline quality is less good than in the upper portion produced at the end of the CVD deposition. A surface portion 14 having a high roughness or a high local variation in thickness on a scale larger than the roughness is also removed.The removal of these excess portions 13, 14 is typically carried out by grinding followed by chemical-mechanical polishing to achieve a surface 120 that is flat and sufficiently smooth for bonding a surface layer. Such polishing uses a slip containing abrasive particles in a chemically active mixture. Typically, after the removal steps, the thickness of the silicon carbide support substrate 10 is between 150 and 500 µm and may vary depending on the intended application. After subsequent thinning steps, the thickness is typically between 100 µm and 180 µm. With reference to FIG. 3D, the support substrate 10 thus prepared is assembled with a surface layer 20 made of a monocrystalline material, typically by a Smart Cut type process. TM. With reference to Figure 4A, a monocrystalline donor substrate 200 is prepared to produce the surface layer 20. Cleaning and / or a surface treatment can be applied to the surface of the donor substrate 200. A weakening zone 21 is then formed in the donor substrate 200, so as to delimit a monocrystalline layer 20. The weakening zone 21 is formed in the donor substrate 200 at a predetermined depth which corresponds substantially to the thickness of the monocrystalline layer intended to form the surface layer of the support substrate for the power or radiofrequency electronic device to be formed. Preferably, the weakening zone 21 is created by implantation of hydrogen and / or helium atoms in the donor substrate. With reference to Figure 4B, the donor substrate 200 is then bonded to the silicon carbide layer 10.With reference to FIG. 4C, a detachment of the donor substrate 200 is caused along the weakening zone 21, so as to transfer the monocrystalline layer 20 onto the silicon carbide layer comprising the carbon inclusions. It is possible, before or after assembly with the monocrystalline silicon carbide layer 20, to assemble the support substrate 10 with other layers, for example with a porous silicon carbide layer 60 as illustrated in FIG. 2C. From the finalized substrate, power or radiofrequency electronic components can be formed in or on the monocrystalline surface layer. The substrate is brazed onto a heat removal device. The soldering is carried out by adding a material, for example silver, a silver-filled epoxy, gold-silicon, gold-tin, lead-tin, or a sintered material in liquid phase, in solid contact with the underside of the substrate.Thus, the filler material is in thermal contact with the carbon inclusions arranged on the back side of the support substrate, which allows heat to be removed from the substrate to the heat removal device efficiently. Grain formation during the CVD process The use of a CVD process promotes the formation of grains in the silicon carbide and the formation of carbon inclusions. In addition, unlike a layer produced by sintering, CVD deposition generally results in anisotropic growth of the grains, so that their axis of maximum elongation extends parallel to the Z axis perpendicular to the base of the substrate. A strong anisotropy is desired to promote thermal and / or electrical conductivity along the Z axis. Figure 5 is a representation of the different chemical compositions deposited as a function of the temperature and the composition of the gas in the deposition chamber.When the temperature and the Ar / (Ar+H2) gas ratio are relatively low, a deposit of silicon carbide and pure silicon is obtained. .For intermediate values ​​of these two parameters, only silicon carbide is deposited. At high temperatures and a high Ar / (Ar+H2) gas ratio, both silicon carbide and carbon are deposited. The operating conditions of the invention therefore correspond to the upper part of the phase diagram. In the temperature ranges shown, the amount of carbon is lower than the amount of silicon carbide deposited, and the carbon is present in the form of inclusions in the silicon carbide layer. The ideal rate for the formation of silicon carbide grains and carbon inclusions therefore depends on the temperature and the atmosphere in the deposition chamber, in particular the ratio of the carrier gas flow to the fluidizing gas. The geometry and size of the inclusions also depend on these parameters.The CVD process for obtaining a two-phase deposition of silicon carbide with carbon inclusions is explained in detail in R. Liu et al. The process of R. Liu et al. uses methyltrichlorosilane (CH3SiCl3) as a precursor. The precursor is mixed with argon and hydrogen gas before introducing the gas mixture into the CVD deposition chamber. Depositions are carried out at different temperatures and argon levels. The appearance and shape of carbon inclusions are evaluated according to these parameters. The appearance of carbon inclusions depends on the Ar / (Ar+H2) ratio and the deposition temperature. For example, for an Ar / (Ar+H2) volume ratio of 25%, the appearance of carbon inclusions occurs from a temperature of 1560°C. For a volume ratio of 50%, carbon inclusions are formed at a temperature greater than or equal to 1500°C.In a hydrogen-free argon atmosphere, carbon inclusions can be formed from a deposition temperature between 1200°C and 1300°C. By using ratios including a high argon content and a high temperature, a high concentration of inclusions is obtained. The volumetric content of carbon in the substrate thus depends on the argon content and the temperature. At a given temperature, the grain size can also be reduced by increasing the argon content in the deposition chamber. To reduce the carbon grain size for a fixed carbon concentration, the temperature is lowered and the argon content is simultaneously increased. The ratio between the width and the length of the carbon inclusions also depends on the temperature and the Ar / (Ar+H2) ratio. In addition to obtaining an anisotropic structure, CVD deposition has other advantages over the formation of a two-phase structure by sintering.The use of a binder that can be polluting, particularly in a clean room, is avoided. Control of the gas flow and mixing is also easy to master. By lowering the temperature during CVD deposition with an adjustment of the Ar / (Ar+H2) gas ratio, an inclusion concentration gradient is achieved in a single deposition process. The temperature decrease can be achieved in a continuous ramp to achieve a continuous gradient for the inclusion concentration. Alternatively, the temperature can be lowered in steps to create layers in the substrate in which the inclusion rate decreases in discrete steps. As an illustration and not a limitation, a carbon inclusion concentration gradient can be achieved over a thickness of 10 µm to 50 µm of the polycrystalline silicon carbide layer.Typically, the initial carbon inclusion concentration is decreased by between 1 and 40%, so that the inclusion concentration is maximal at the beginning of the deposition and reaches a value of zero at the end of the deposition. Such a decrease can be obtained by continuously decreasing the set temperature during the growth of the SiC layer. The thermal dynamics of known CVD machines make it possible to deposit a SiC layer with such a gradient by performing a continuous deposition with modification of the temperature set, without interrupting the deposition for possible cooling steps. To obtain such a concentration gradient, it is also possible to decrease the argon level during the deposition, or to combine a decrease in temperature with a decrease in the argon level. Alternatively, a first portion of the substrate can be produced by CVD deposition at a temperature and an argon level causing carbon inclusions.The argon level is then significantly reduced and / or the deposition chamber is allowed to cool before carrying out a second deposition step in which the deposited layer consists of SiC without carbon inclusions. Thus, a support substrate can be produced in which a first portion comprises carbon inclusions, and a second portion is free of carbon inclusions. The surface layer of monocrystalline SiC will then be transferred onto the second portion free of carbon inclusions. REFERENCES R. Liu et al.: Experimental phase diagram of SiC in CH3SiCl3–Ar–H2 system, Journal of Materials Research August 2016-1(17):1-11. FR3134234.

Claims

CLAIMS 1. A method of manufacturing a substrate (15) for a power or radiofrequency electronic device, comprising o forming a support substrate (10) comprising a deposition of at least one layer (100) of polycrystalline silicon carbide by chemical vapor deposition (CVD) in an atmosphere comprising a mixture of argon and a deposition precursor fluidized in hydrogen, said chemical vapor deposition being carried out under Ar / (Ar+H2) ratio and temperature conditions suitable for forming carbon inclusions (1) in said silicon carbide layer, and o assembling the support substrate (10) and a surface layer (20) made of a monocrystalline material.

2. The method of claim 1, wherein the deposition precursor is methyltrichlorosilane (CH3SiCl3). 3.Method according to claim 1 or claim 2, the surface layer (20) is made of a semiconductor material, preferably silicon carbide or gallium nitride or diamond.

4. Method according to one of the preceding claims, in which at least a first phase of the chemical vapor deposition is carried out at a temperature above 1200°C, preferably above 1400°C.

5. Method according to one of the preceding claims, in which a first temperature (T1) for the start of chemical vapor deposition is higher than a second temperature (T2) for the end of chemical vapor deposition.

6. Method according to one of the preceding claims, in which the Ar / (Ar+H2) ratio decreases during the chemical vapor deposition step. 7.Method according to one of the preceding claims, in which the formation of the support substrate further comprises a step of assembling said at least one layer of silicon carbide comprising the carbon inclusions (1) with a base layer of porous silicon carbide.

8. Substrate for a power or radiofrequency electronic device, comprising o a support substrate (10) made of polycrystalline silicon carbide having a front face (410) and a rear face, and o a surface layer (20) made of a monocrystalline material extending over the front face (410) of said support substrate (10), said substrate being characterized in that at least a portion of said support substrate (10) comprises a plurality of silicon carbide grains having an elongated shape oriented in a direction perpendicular to the surface of the substrate and a plurality of carbon inclusions located between said grains.

9. Substrate according to claim 8, wherein the surface layer (20) is made of a semiconductor material, preferably silicon carbide or gallium nitride or diamond. 10.A substrate according to claim 8 or claim 9, wherein the ratio of the length to the width of the silicon carbide grains (1) in the support substrate (10) is greater than or equal to 1:1.2, preferably greater than 1:10 and more preferably greater than 1:

20.

11. A substrate according to any one of claims 8 to 10, wherein the carbon inclusions (1) are discontinuous.

12. A substrate according to any one of claims 8 to 11, wherein the ratio of the width to the length of the carbon inclusions (1) is 1:1.2, preferably greater than 1:20 and more preferably greater than 1:

30.

13. A substrate according to any one of claims 8 to 12, wherein the support substrate has a concentration gradient of the carbon inclusions (1), such that the density of the carbon inclusions (1) increases from the front face towards the back face. 14.A substrate according to any one of claims 8 to 13, wherein only a portion of the support substrate comprises said carbon inclusions (1) and the support substrate (30) further comprises a portion free of carbon inclusions (1) between the. surface layer (20) of monocrystalline SiC and the portion comprising the carbon inclusions (1).

15. Substrate according to any one of claims 8 to 14, wherein the volume ratio of the carbon inclusions (1) in the support substrate is between 1% and 40%, preferably between 1% and 20%.

16. Electronic device comprising a substrate according to any one of claims 8 to 15 and at least one electronic power or radiofrequency component formed in or on the surface layer (20), and a heat removal device, the substrate being brazed to the heat removal device by means of a filler material so that the filler material is in integral contact with at least part of the portion comprising carbon inclusions (1) on the rear face of the support substrate (10).

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