Power converter

Abstract

Power Converter This description relates to a power converter (400) comprising: a switch (114) including first (114d) and second (114s) conduction terminals for receiving a first alternating voltage (Vds), a first circuit (402) for detecting a minimum value reached by the first voltage at each half-cycle, and for averaging minimum values ​​over several half-cycles, and a second circuit (404) for controlling the switch configured, based on the average of said values, to open the switch when the first voltage is substantially zero. Figure for the abbreviation: Fig. 4

Description

Title of the invention: Power converter technical field

[0001] This description relates generally to electronic devices. This description relates more particularly to power converters. Prior art

[0002] Among existing power converters, inverters are known, for example, which convert a direct current input voltage into an alternating current output voltage. However, existing inverters exhibit operating drifts related in particular to variations in ambient conditions and aging phenomena. Summary of the invention

[0003] There is a need to improve known power converters.

[0004] One embodiment overcomes all or part of the disadvantages of known power converters.

[0005] One embodiment provides a power converter comprising: - a switch including first and second conduction terminals intended to receive a first alternating voltage; - a first circuit for detecting a minimum value reached by the first voltage at each half-cycle, and for averaging minimum values ​​over several half-cycles; and - a second control circuit for the switch configured, based on the average of said values, to open the switch when the first voltage is substantially zero.

[0006] According to one embodiment, the first circuit has a time constant at least five times greater, preferably at least ten times greater, than one period of the first voltage.

[0007] According to one embodiment, the first circuit comprises, between a first node connected, preferably connected, to the first conduction terminal of the switch and a second node for applying a reference potential, a half-wave rectifier element in series with a parallel association of a capacitive element and a resistor.

[0008] According to one embodiment, a third node, located between the half-wave rectifier element and the parallel combination of the capacitive element and the resistor, has a potential that is a function of a lower envelope of the first voltage.

[0009] According to one embodiment, the single-alternation rectifier element is a diode.

[0010] According to one embodiment, the first circuit further comprises a voltage source connected, preferably connected, between the parallel association of the capacitive element and the resistor and the second node.

[0011] According to one embodiment, the second circuit is further configured to modify a duty cycle of the switch as a function of the average of said values.

[0012] According to one embodiment, the switch is a field-effect transistor, the first and second terminals corresponding respectively to drain and source terminals of the transistor.

[0013] According to one embodiment, the switch has a switching frequency between 0.1 MHz and 100 MHz, preferably between 1 and 10 MHz, more preferably equal to about 1.5 MHz.

[0014] According to one embodiment, the converter further comprises a piezoelectric resonator adapted to provide the first voltage.

[0015] According to one embodiment, the second circuit comprises: - a comparator of the average of said values ​​to a threshold; - a proofreader; and - a pulse width modulation circuit.

[0016] According to one embodiment, the threshold is a function of the energy consumption of a load supplied by the converter.

[0017] One embodiment provides a method for controlling a power converter as described, comprising the following steps: a) average the minimum values ​​of the first alternating voltage after several alternations; and b) adjust a switching closing time based on the average of said values. Brief description of the drawings

[0018] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0019] Fig. 1 represents, schematically and partially, an example of a power converter;

[0020] [Fig.2] is a graph of an example of the evolution of a voltage across the terminals of a switch of the converter of [Fig.1];

[0021] [Fig.3] is a graph of another example of the evolution of the voltage across the switch of the converter of [Fig.1];

[0022] [Fig.4] represents, schematically and partially, a power converter according to a first embodiment;

[0023] [Fig.5] represents, schematically and partially, a variant of the converter of [Fig.4];

[0024] [Fig.6] represents, schematically and partially, a variant of a converter circuit of [Fig.4];

[0025] [Fig.7] represents, schematically and partially, another variant of a converter circuit of [Fig.4];

[0026] [Fig.8] represents, schematically and partially, a part of a power converter according to a second embodiment;

[0027] [Fig.9] represents, schematically and partially, a variant of the part of the converter in [Fig.8];

[0028] Figure 10 is a graph of the variation of a converter potential in Figure 4 as a function of the duty cycle of a switch; and

[0029] Figure 11 is a graph showing the variation of the efficiency of the converters in Figures 1 and 4 as a function of the inductance of an inductive element of these converters. Description of embodiments

[0030] The same elements have been designated by the same reference numerals in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.

[0031] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been shown and are detailed. In particular, applications using power converters are not detailed, as the described embodiments are compatible with common applications using power converters.

[0032] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") together, this means that these two elements can be connected or linked through one or more other elements.

[0033] In the following description, when referring to absolute positional qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative positional qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to Orientation qualifiers, such as the terms "horizontal", "vertical", etc., refer to the orientation of the figures unless otherwise specified.

[0034] Unless otherwise specified, the expressions "approximately", "roughly", and "in the order of" mean within 10%, preferably within 5%.

[0035] Figure 1 represents, schematically and partially, an example of a 100 power converter. The 100 converter illustrated in Figure 1 is more precisely an "L-piezo" type inverter.

[0036] In the example shown, the converter 100 includes a source 102 for supplying a DC voltage Vin. The source 102 has a negative terminal (-) connected, preferably connected, to a node 104, or rail, for applying a reference potential, for example, ground. The source 102 also has another positive terminal (+) connected, preferably connected, to another node 106.

[0037] A first inductive element 108 of inductance Lf, for example a coil, connects, preferably connects, the node 106 to yet another node 110 of the converter 100.

[0038] In the example shown, the converter 100 includes a piezoelectric element 112 (typically a resonator) connecting, preferably connecting, the nodes 110 and 104.

[0039] A switch 114 links, preferably connects, nodes 110 and 104. The switch 114 is, for example, a field-effect transistor (FET), for example, a metal-oxide-semiconductor (MOS) transistor. The switch 114 is preferably an N-channel MOS transistor, or NMOS transistor.

[0040] Alternatively, the switch is a high-electron mobility transistor (HEMT). In this case, transistor 114 is preferably a gallium nitride (GaN) based HEMT.

[0041] The switch 114 has a first conduction terminal 114d (drain) connected, preferably connected, to node 110 and another conduction terminal 114s (source) connected, preferably connected, to node 104. The switch 114 also has a third control terminal 114g (grid).

[0042] By way of example, the switch 114 of the converter 100 has a switching frequency (set by a control circuit not shown) between 0.1 MHz and 100 MHz, preferably between 1 and 10 MHz, more preferably equal to about 1.5 MHz.

[0043] Periodic switching of switch 114 results in the production, by the piezoelectric element 112, of an oscillating signal, for example a sinusoidal periodic signal. In the example shown, an alternating voltage Vds is present between the drain terminal 114d and the source terminal 114s of transistor 114.

[0044] In the case of an NMOS transistor, the transistor 114 is in a conducting state when a voltage Vgs greater than or equal to a threshold voltage Vthl is applied between its gate terminal 114g and its source terminal 114s and in a blocking state when the voltage Vgs is strictly less than the threshold voltage Vthl.

[0045] In the example shown, the power converter 100 further comprises a second inductive element 116 of inductance Ls, for example a coil, in series with a capacitive element 120 of capacitance Cs, for example a capacitor, between the terminal 110 and an output terminal 122 of the converter.

[0046] A load, for example resistive, symbolized in [Fig.1] by a resistance 124 of value Rout, is intended to be connected, preferably connected, between the output terminal 122 and the node 104 of application of the reference potential.

[0047] During operation, the source 102 applies the DC voltage Vin between nodes 106 and 104 of the converter 100. Transistor 114 applies the AC voltage Vds between nodes 110 and 104, causing the piezoelectric element 112 to oscillate. The AC voltage Vds is filtered by this element 112, by the second inductive element 116, and by the capacitive element 120, before being applied to the terminals of the load 124. Typically, the LC filter formed by elements 116 and 120 ensures that the voltage Vout generated between nodes 122 and 104 is a sinusoidal voltage corresponding to the voltage Vds, with only a fundamental component retained.

[0048] More specifically, transistor 114 is typically controlled by pulse-width modulation (PWM) to produce the alternating voltage Vds, which is filtered, in particular, by the piezoelectric element 112 to obtain the desired voltage Vds. The switching frequency of transistor 114 is substantially constant and equal to half the oscillation frequency of the piezoelectric resonator 112. After each switching from the open state to the closed state, transistor 114 remains closed for a longer time as the power demanded by the load 124 increases. Conversely, switch 114 remains closed for a shorter time as the power demanded by the load 124 decreases.

[0049] Figure 2 is a graph of an example of the evolution, as a function of time t, of the voltage Vds across the terminals of transistor 114 of converter 100 of Figure 1. Figure 2 illustrates more precisely an example of the shape of a positive half-cycle of the voltage Vds.

[0050] In the example shown, transistor 114 is closed at time t_close and then opened at time t_open. From time t_open, a voltage appears between the first and second conduction terminals 114d, 114s of transistor 114. Shortly before the closing time t_close of transistor 114 (box 202), the voltage Vds becomes negative. This causes a small current to flow through a reverse diode of transistor 114. At time t_close, the voltage Vds becomes zero and the current flow between the first and second conduction terminals 114d, 114s of transistor 114 is then interrupted.

[0051] The instant t_close corresponds approximately to the instant when the voltage Vgs applied between the gate terminal 114g and the source terminal 114s of transistor 114 becomes greater than or equal to the threshold voltage Vthl of this transistor. At the instant t_close, transistor 114 becomes substantially conducting. The instant t_open corresponds approximately to the instant when the voltage Vgs becomes strictly less than the threshold voltage Vthl. At the instant t_open, transistor 114 becomes substantially blocked.

[0052] At a time t_null, prior to the closing time t_close of transistor 114 (Box 202) and close to the closing time t_close, the voltage Vds between nodes 110 and 104 of converter 100 is substantially zero. At the closing time t_close, the voltage Vds is, for example, between -0.1 and -2 V. In the example illustrated in [Fig. 2], the voltage Vds is more precisely equal to approximately -2 V at the closing time t_close.

[0053] The example shown in [Fig. 2], in which transistor 114 is closed when the voltage Vds is negative and close to 0 V, corresponds to a case known as near-zero voltage switching, or "quasi-ZVS" (from the English "Zero Volt Switching" - ZVS). In this case, the switching causes little disturbance to the converter 100 and results in low energy losses at the transistor 114.

[0054] Figure 3 is a graph of another example of the evolution of the voltage Vds at terminals of transistor 114 of converter 100 of [Fig.1]. [Fig.3] illustrates more precisely an example of the shape of another positive half-cycle of the alternating voltage Vds.

[0055] In the example shown, in the vicinity of the closing time t_close of transistor 114 (box 302), the voltage Vds between nodes 110 and 104 of converter 100 is positive. At time t_close, the voltage Vds is, for example, between 0.5 and 5 V. In the example illustrated in [Fig. 3], the voltage Vds is more precisely equal to approximately 4 V at time t_close.

[0056] The example shown in [Fig. 3], in which transistor 114 is closed when the voltage Vds is positive and, for example, equal to several volts, corresponds to a case of so-called hard switching, or abrupt switching. In this case, the switching causes strong disturbances in the converter 100 and generates significant energy losses at the transistor 114. More precisely, in the example illustrated in [Fig. 3], the abrupt switching causes, just after the instant t_close, a very rapid variation dVds / dt in the voltage Vds across the terminals. of transistor 114. This results in a strong current spike in transistor 114, which can lead to irreversible damage to this transistor.

[0057] Consequently, abrupt switching of the type illustrated in [Fig. 3] is generally avoided, and quasi-ZVS switching is preferred, as explained above in relation to [Fig. 2]. To this end, the converter 100 is initially set so that the switching at time t_close occurs in quasi-ZVS by adjusting the control parameters of the transistor 114. However, due in particular to variations in the power consumed by the load 124 and changes in the physical characteristics of elements of the converter 100 (for example, fluctuations in the value of the inductance Lf and the resonance frequency of the piezoelectric resonator 112), it proves difficult to maintain this type of operation.

[0058] Typically, manufacturing tolerances of the converter 100 elements, variations in ambient temperature, an aging phenomenon of the elements, etc., gradually lead to a drift in operation resulting in a loss of switching in quasi ZVS.

[0059] To overcome this problem, a circuit for detecting impulse disturbances could have been provided, for example, a voltage slope detection circuit analogous to the circuit described in the publication by S. Li, W. Shu, and S. Lu entitled “Voltage slope-based zero voltage switching detection method for wireless power transfer systems” (Electron. Lett., vol. 54, no. 12, pp. 775–777, 2018). However, such a circuit would not be adaptable to a converter of the type of converter 100 in [Fig. 1] having a single switch 114. Furthermore, the circuit described in the aforementioned publication requires the use of active elements or components to reset a detection signal at each period. This results in additional power consumption, thereby reducing the energy efficiency of the converter.

[0060] A source voltage detection circuit could also have been used, for example, analogous to the circuit described in US patent application US 5166549. Such a circuit, for example, uses a resistor in series with a power switch to detect switching near the zero voltage of that switch. However, this requires adding an element, in this case a resistor, inside the converter's power loop. This resistor unfavorably increases the converter's energy losses, thus reducing its efficiency.

[0061] Figure 4 schematically and partially represents a 400 power converter according to one embodiment. The 400 converter in Figure 4 includes elements common to the 100 converter in Figure 1. These common elements will not be described again below.

[0062] The converter 400 of [Fig.4] differs from the converter 100 of [Fig.1] mainly in that the converter 400 further comprises a first detection circuit 402 and a second control circuit 404.

[0063] According to one embodiment, the first circuit 402 is a circuit for detecting a minimum value reached by the alternating voltage Vds at each alternation and for averaging this minimum value over several alternations of this voltage.

[0064] In the example shown, the circuit 402 includes a half-wave rectifier element 406. The half-wave rectifier element 406 is, for example, as illustrated in [Fig. 4], a diode whose anode is connected, preferably connected, to a node 408 of the circuit 402 and whose cathode is connected, preferably connected, to node 110 of the converter 400. The diode 406 is conducting when the voltage Vak between its anode and cathode is greater than or equal to a threshold voltage Vth2 of this diode and is otherwise blocked. For simplicity, it is assumed that the diode 406 is never subjected to a reverse bias voltage large enough to cause it to enter avalanche mode. As an example, the threshold voltage Vth2 of the diode 406 is between 0.2 and 0.7 V, for example, approximately 0.6 V for a silicon diode.

[0065] In the rest of the description, Va denotes the potential present at node 408.

[0066] In the example shown, the circuit 402 further includes a resistor 410, of value RI, connected in parallel with another capacitive element 412, for example a capacitor of capacitance CL. The resistor 410 has one terminal connected, preferably connected, to node 408 and another terminal connected, preferably connected, to node 104, which applies the reference potential. Similarly, the capacitive element 412 has one terminal connected, preferably connected, to node 408 and another terminal connected, preferably connected, to node 104. The resistor 410 can be implemented as a current-source biased MOS transistor.

[0067] The role of the RC 410-412 cell is to average, over several alternations of the voltage Vds, the minimum value reached by the latter.

[0068] The role of diode 406 is to allow an electric current to flow between nodes 110 and 408 when the voltage Vds is less than or equal to the potential Va minus a voltage drop across this diode. This then results in a voltage drop across capacitor 412. Conversely, diode 406 prevents any current flow between nodes 110 and 408 when the voltage Vds is greater than the potential Va plus the voltage drop across this diode.

[0069] During one half-cycle of the voltage Vds, the voltage Vds increases, for example, from the instant t_open when transistor 114 is open, then decreases in the vicinity of the instant t_close when this transistor is closed. It is assumed, as explained previously in relation to [Fig. 2], that the voltage Vds is negative at the instant t_close. If the voltage Furthermore, Vds has a sufficiently low value that the voltage Vak across diode 406 is greater than or equal to its threshold voltage Vth2, meaning diode 406 is conducting. This tends to charge node 408, thus decreasing the potential Va at this node. This decrease is all the more rapid when the voltage Vds is low. Therefore, the more negative the voltage Vds is, the higher the potential Va.

[0070] Functionally, the first circuit 402 of the converter 400 acts as a lower envelope detector of the voltage Vds.

[0071] During a subsequent half-cycle of the voltage Vds, the increase in voltage Vds from the instant t_open when transistor 114 is turned on causes diode 406 to be blocked. Node 408 is then isolated from node 110. This results in a discharge from node 408 to node 104, where the reference potential is applied, thus lowering the potential Va. This drop in potential Va is, however, dampened or filtered over successive half-cycles of the voltage Vds by the parallel connection of resistor 410 and capacitor 412.

[0072] The resistance RI and the capacitance Cl are, for example, such that the first circuit 402 has a time constant r, equal in this example to the product of the resistance RI and the capacitance Cl (t = R1*C1), at least five times greater, preferably at least ten times greater, than one period of the alternating voltage Vds. This makes it possible to average, or smooth, the values ​​taken by the potential Va over several half-cycles of the voltage Vds. The potential Va is, for example, applied to an input of the second circuit 404. As an example, if the switching frequency of transistor 114 is approximately 10 MHz, the time constant r is on the order of microseconds.

[0073] According to one embodiment, the second circuit 404 is a control circuit for transistor 114 configured, based on the average of the potential values ​​Va, to control the closing of transistor 114 when the voltage Vds is substantially zero. Circuit 404 ensures that the closing time t_close of transistor 114 occurs when the voltage Vds is, for example, between 0 and -1 V.

[0074] In general, the average of the potential Va values ​​allows us to estimate whether the converter 400 is in the quasi-ZVS operating mode, which we seek to maintain, or whether it is approaching the abrupt switching operating mode, which we wish to avoid. The second circuit 404 is configured to maintain the converter 400 in the quasi-ZVS operating mode, in which switching (at time t_close) occurs when the voltage Vds is negative and close to zero, despite drift and aging of the converter components.

[0075] In the example shown, circuit 404 includes a comparator 414. The comparator 414 includes, for example, a (+) input connected, preferably connected, to node 408 of circuit 402 and receiving the potential Va. The comparator 414 includes, for example, another (-) threshold comparison input, the other input receiving, for example, a reference potential Vref. This other comparator input is, for example, connected to a node (not shown) for applying the reference potential Vref. The reference potential Vref is adjusted to obtain quasi-ZVS operation. In the example shown, the value of the potential Vref is approximately 0.1 V.

[0076] In the example shown, an output of comparator 414 is connected to an input of a controller 416 (CORR). The comparator output transmits, for example, to the input of controller 416 a signal representing a deviation of the potential Va from the reference signal Vref. As an example, controller 416 is a proportional-integral (PI) regulator. Controller 416 allows, for example, a more stable control loop than if the circuit 404 had no controller.

[0077] In this example, the controller 416 provides an output signal a. Signal a corresponds, for example, to a DC voltage representing a duty cycle to be applied to the transistor after pulse-width modulation. For simplicity, signal a will be referred to as the "duty cycle" in the remainder of this description.

[0078] In the example shown, the signal a at the output of the controller 416 is transmitted to an input of a pulse-width modulation (PWM) circuit 418. The circuit 418 is, for example, adapted to adjust the closing times t_close and opening times t_open of transistor 114 according to the signal a. More precisely, in the example shown, the output of the circuit 418 is connected to the gate 114g of transistor 114 and provides the Vgs signal to the gate 114g.

[0079] In general, the first and second circuits 402 and 404 allow the estimation, based on the average of the potential Va values, of an operating deviation of the converter 400 from an operation in which the transistor 114 is open when the voltage Vds is negative and close to 0 V ("quasi-ZVS" operation). The circuits 402 and 404 also allow the duty cycle α to be adjusted according to this deviation in order to maintain the quasi-ZVS operation of the converter 400.

[0080] One advantage of the converter 400 is its ability to compensate for drifts, for example, variations in the inductance Lf of the coil 108 and fluctuations in the resonant frequency of the resonator 112 over time. This allows the converter 400 to exhibit higher energy efficiency than the converter 100 of [Fig. 1], as well as an increased service life.

[0081] Another advantage of the 400 converter lies in the fact that the duty cycle control circuit 404 of transistor 114 allows for changes in the output power of this converter while maintaining the switching of transistor 114 towards the open state when the voltage Vds is negative and close to zero. For example, at a frequency of 1.4 MHz at 20 V, the 400 converter is capable of maintaining quasi-ZVS operation over a power range between 0 and 24 W, compared to 9 to 21 W for the inverter 100 of [Fig. 1].

[0082] Yet another advantage of the 400 converter is that it does not exhibit energy dissipation in the power circuit. Furthermore, the 400 converter does not suffer any degradation in the control of the MOS transistor 114.

[0083] As an alternative, the diode 406 and the parallel combination of the resistor 410 and the capacitor 412 can be interchanged. In this case, the anode of the diode 406 is more precisely connected, preferably connected, to the reference potential application node 104 and its cathode is connected, preferably connected, to node 408. The resistor 410 and the capacitor 412 then each have one terminal connected, preferably connected, to node 408 and another terminal connected, preferably connected, to node 110.

[0084] [Fig. 5] schematically and partially represents a variant of the 400 converter of [Fig. 4]. The 404 circuit of the 400 converter has not been shown in [Fig. 5] in order to avoid cluttering the figure.

[0085] The variant illustrated in [Fig. 5] differs from the embodiment illustrated in [Fig. 4] primarily in that, in this variant, the first circuit 402 of the converter 400 further comprises a source 502 of a DC and substantially constant voltage Vpol. The source 502 is, for example, connected, preferably connected, between the node 104 for applying the reference potential and the parallel combination of the resistor 410 and the capacitor 412. More specifically, the source 502 comprises a negative terminal (-) connected, preferably connected, to node 104 and another positive terminal (+) connected, preferably connected, to a node 504 of the circuit 402.

[0086] The bias voltage Vpol is approximately equal to the threshold voltage Vth2 of diode 406. The source 502 is thus used to compensate for the threshold voltage Vth2 of diode 406. This makes it even easier to relate the potential Va to the lower envelope of the AC voltage Vds to estimate whether the converter 400 is in the quasi-ZVS operating mode or moving away from it.

[0087] Fig. 6 represents, schematically and partially, a variant of the circuit 402 of the converter 400 of Fig. 4.

[0088] In this variant, diode 406 of circuit 402 is replaced by a bipolar PNP transistor 602. The transistor 602 is, for example, connected so as to obtain a function analogous to that of diode 406. More precisely, in the example shown, transistor 602 has a first conduction terminal 602c (collector) connected, preferably connected, to node 104 for application of the reference potential, a second conduction terminal 602e (emitter) connected, preferably connected, to node 408 and a third control terminal 602b (base) connected, preferably connected, to the drain terminal 114d of transistor 114.

[0089] Furthermore, in this variant, the parallel association of the resistor 410 and the capacitor 412 is not connected between the node 408 and the node 104 but between the node 408 and another node 604, or a rail, of application of a potential Vdd supplying the circuit 402. By way of example, the potential Vdd is substantially constant and between 2 and 5 V, for example equal to about 3 V.

[0090] The gain of transistor 602 is chosen to be at least 50, so that the collector current ic is much greater (in a ratio of at least 50) than the base current ib drawn by transistor 114 when the latter is conducting (the sum of the base and collector currents being, for a PNP type transistor, equal to the emitter current taken from node 408).

[0091] The role of transistor 602 is to prevent the charging / discharging of capacitor 412 from interfering with the operation of transistor 114.

[0092] The variant of circuit 402 shown in relation to [Fig. 6] operates similarly to that of circuit 402 in [Fig. 4]. However, the variant in [Fig. 6] allows the capacitance Cl of capacitor 412 to be higher than in the embodiment of [Fig. 4], which helps to reduce voltage drifts related to leakage currents.

[0093] Figure 7 represents, schematically and partially, another variant of the circuit 402 of the converter 400 of Figure 4.

[0094] The variant of circuit 402 illustrated in [Fig. 7] differs from the variant of circuit 402 illustrated in [Fig. 6] in that circuit 402 further comprises an additional half-wave rectifier element 702. The half-wave rectifier element 702 is, for example, a diode or a Zener diode whose anode is connected, preferably connected, to the base terminal 602b of the bipolar transistor 602 and whose cathode is connected, preferably connected, to the drain terminal 114d of the power transistor 114.

[0095] Diode 702 advantageously prevents transistor 602 from having to withstand a significant reverse voltage Vbe between its terminals 602b and 602e when transistor 114 is open. Another advantage of this variant is that diode 702 allows the potential Va to be increased and to fall within a higher voltage range than in the variant of [Fig. 6]. For example, the potential Va in this case is between 0 V and Vdd. This avoids as well as the potential Va being negative, which facilitates regulation by the second circuit 404.

[0096] Although this has not been shown in Figures 6 and 7, the potential Va is for example transmitted to the second circuit 404 in order to adapt the control of the transistor 114 as previously explained in relation to [Fig.4].

[0097] Fig. 8 represents, schematically and partially, a part of an 800 power converter according to one embodiment.

[0098] The 800 converter of [Fig.8] includes common elements with the 400 converter of [Fig.4]. These common elements will not be described again below.

[0099] The converter 800 of [Fig.8] differs from the converter 400 of [Fig.4] mainly in that the converter 800 includes, in addition to the switch 114, another switch 802. The switch 802 is for example a MOS transistor, analogous to the switch 114.

[0100] Terminal 114s of transistor 114 is connected, preferably connected, to node 104 and terminal 114d of transistor 114 is connected, preferably connected, to a node 804 of converter 800.

[0101] The transistor 802 has a first conduction terminal 802s (source) connected, preferably connected, to node 804 and a second conduction terminal 802d (drain) connected, preferably connected, to another node 806 of the converter 800. The potential Vin is present between nodes 806 and 104.

[0102] Diode 406 has its anode terminal connected, preferably connected, to node 804 and its cathode terminal connected, preferably connected, to node 408. The parallel combination of resistor 410 and capacitor 412 is connected, preferably connected, between nodes 408 and 806.

[0103] In the example shown, the series association of transistors 802 and 114 between nodes 806 and 104 forms part of a bridge arm of converter 800.

[0104] The potential Va present at node 408 is a function of a peak potential present at the source terminal 802s of transistor 802. Although not shown in [Fig. 8], the converter 800 preferably includes a regulation circuit or loop analogous to the circuit 404 shown in relation to [Fig. 4]. The regulation circuit of converter 800 then maintains the peak potential present at terminal 802s between the voltage Vin and a voltage equal to Vin plus a reverse voltage of transistor 802, corresponding to the conduction voltage of a reverse diode of this transistor. The peak voltage is greater than and substantially equal to the voltage Vin.

[0105] As an alternative, a bias source may be interposed between node 806 of converter 800 and the parallel combination of resistor 410 and the capacitor 412. This voltage source provides advantages similar to those described in relation to [Fig.5] for the voltage source 502 Vpol.

[0106] [Fig.9] represents, schematically and partially, a variant of the part of converter 800 of [Fig.8].

[0107] The variant illustrated in [Fig.9] differs from the embodiment illustrated in [Fig.8] mainly in that the first circuit 402 of the converter 800 further comprises another single-alternation rectification element 902, another capacitive element 904 and, optionally, another resistor 906.

[0108] The half-wave rectifier element 902 is a diode whose anode is connected, preferably connected, to a node 908 of the converter 800 and whose cathode is connected, preferably connected, to the node 806. The diode 902 is for example analogous to the diode 406.

[0109] The capacitive element 904 has one terminal connected, preferably connected, to node 908 and another terminal connected, preferably connected, to node 804. The capacitive element 904, of capacitance C2, is for example a capacitor analogous to capacitor 412.

[0110] The optional resistor 906, with a value of R2, is connected in parallel with the capacitive element 904. The resistor 906 has one terminal connected, preferably connected, to node 908 and another terminal connected, preferably connected, to node 804.

[0111] In addition, the anode of diode 406 is connected, preferably connected, to node 408 and the cathode of diode 406 is connected, preferably connected, to node 908. In this example, the parallel association of resistor 410 and capacitor 412 is connected, preferably connected, between nodes 408 and 604.

[0112] Furthermore, capacitor 412 is connected between node 408 and node 604. Alternatively, capacitor 412 is connected between node 408 and another node for applying a fixed potential, for example node 104 for applying the reference potential.

[0113] The variant of the 800 converter illustrated in [Fig.9] advantageously allows the potential Va to evolve within a higher voltage range than for the 800 converter of [Fig.8]. In this case, the potential Va is, for example, between 0 V and Vdd.

[0114] In operation, when transistor 114 is closed and transistor 802 is open, node 804 is brought to a potential substantially equal to that of node 104. Resistor 410 in parallel with capacitor 412 forms a filter which, after several half-cycles, stores at node 408 a minimum value of a potential difference between nodes 604 and 408 (with respect to voltage drops across diode 406). If the capacitance C2 of capacitor 904 is much greater, for example between ten and one hundred times greater, than the capacitance Cl of capacitor 412, a transfer of The charge between capacitors 904 and 412 will have little influence on a potential difference across capacitor 904. In this case, the potential Va will stabilize quickly, that is, after only a few cycles (less than 10 cycles).

[0115] On the other hand, if the capacitance C2 of capacitor 904 is much lower, for example between ten and one hundred times lower, than the capacitance Cl of capacitor 412, a transfer of charge between capacitors 904 and 412 will have a great influence on the potential difference across capacitor 904. In this case, the potential Va will stabilize slowly, that is to say after a large number of alternations (at least 10 alternations).

[0116] When transistor 114 is switched to the open state and transistor 802 is not yet switched to the closed state, the source terminal 802s of transistor 802 exhibits an increasing potential, for example, due to LC resonance. This potential may, for example, exceed the voltage Vin. In this case, capacitor 904 stores the peak value of the potential present at the source terminal 802s of transistor 802 relative to the potential Vin, taking into account the voltage drops across diode 902.

[0117] In a case where the optional resistor 906 is present, this resistor filters the voltage across the capacitor 904 when the transistor 114 is switched on. This advantageously eliminates or reduces high-frequency disturbances caused by the switching of transistor 114.

[0118] As an alternative, each diode 406, 902 can be replaced by a Zener diode. This allows, in particular, for adjusting the range in which the potential Va varies.

[0119] The [Fig. 10] is a graph of variation of the potential Va present at node 408 of the converter 400 of the [Fig.4] as a function of the duty cycle a.

[0120] In the example shown, graph 1000 has a first region 1002 in which the duty cycle α is between approximately 0.25 and approximately 0.30. This first region 1002 corresponds to the quasi-ZVS operating mode, in which the converter 400 is maintained. In region 1002, the potential Va increases with the duty cycle α. By averaging the values ​​of the potential Va over several half-cycles, the duty cycle α can be adjusted as shown in relation to [Fig. 4] to approach a switching point 1004 at zero voltage. Point 1004 corresponds to a value of the duty cycle α for which transistor 114 is closed at time t_close when the voltage Vds is zero.

[0121] Graph 1000 further includes a second region 1006 in which the duty cycle a is between approximately 0.30 and approximately 0.35. The second region 1006 corresponds to the mode of operation in abrupt switching, which the converter 400 is prevented from reaching by means of the control described above.

[0122] Although not shown in [Fig. 10], the variants of the 400 converter shown in relation to Figures 5, 6 and 7 and the 800 converter of Figures 8 and 9 exhibit, for example, variations in potential Va, as a function of the duty cycle a, analogous to that shown in [Fig. 10] for the 400 converter of [Fig. 4], up to a vertical offset.

[0123] The [Fig. 11] is a graph 1100 of variation of an efficiency q (in percent, %) of the converters 100 and 400 of figures 1 and 4 as a function of the inductance Lf (in nanohenry, nH) of the inductive element 108 of these converters.

[0124] Figure 11 more specifically comprises a first curve 1102 illustrating the variation of the efficiency q of converter 100 and a second curve 1104 illustrating the variation of the efficiency q of converter 400. In Figure 11, it can be seen that the efficiency q of converter 400 is substantially always higher than the efficiency q of converter 100. In particular, when the inductance Lf is equal to approximately 500 nH, the efficiency q of converter 400 is equal to approximately 96.5% compared to 92% for converter 100.

[0125] Although not shown in [Fig. 11], the variants of the 400 converter shown in relation to Figures 6 and 7 and the 800 converter of Figures 8 and 9 exhibit variations in efficiency q, as a function of the inductance Lf, analogous to curve 1104.

[0126] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will become apparent to them. In particular, although examples of application to piezoelectric resonator converters have been given above, the described embodiments are not limited to this type of converter, and those skilled in the art are especially capable of adapting the described embodiments to Class E, E2, phi2, etc. converters.

[0127] Finally, the practical implementation of the described embodiments and variants is within the reach of a person skilled in the art, based on the functional specifications given above. In particular, the choice of values ​​for the inductances Lf and Ls, the resistances RI and R2, the capacitances Cl, C2 and Cs, etc., is within the reach of a person skilled in the art.

Claims

Demands

1. Power converter (400; 800) comprising: - a switch (114; 802) comprising first (114d; 802d) and second (114s; 802s) conduction terminals intended to receive a first alternating voltage (Vds); - a first circuit (402) for detecting a minimum value reached by the first voltage (Vds) at each half-cycle and for averaging minimum values ​​over several half-cycles, the first circuit (402) comprising, between a first node (110) connected, preferably connected, to the first conduction terminal (114d; 802d) of the switch (114; 802) and a second node (104; 604) for applying a reference potential, a half-wave rectifier element (406; 602) in series with a parallel combination of a capacitive element (412) and a resistor (410), in which a third node (408), located between the element (406;602) half-wave rectification and the parallel association of the capacitive element (412) and the resistor (410), presents a potential (Va) as a function of a lower envelope of the first voltage (Vds); and - a second circuit (404) for controlling the switch (114; 802) configured, as a function of an average of the values ​​of said potential (Va), to close the switch (114; 802) when the first voltage (Vds) is zero.;

2. Converter according to claim 1, wherein the first circuit (402) has a time constant (r) at least five times greater, preferably at least ten times greater, than one period of the first voltage (Vds).

3. Converter according to claim 1 or 2, wherein the single-alternation rectifier element (406) is a diode.

4. Converter according to any one of claims 1 to 3, wherein the first circuit (402) further comprises a voltage source (502) (Vpol) connected, preferably connected, between the parallel association of the capacitive element (412) and the resistor (410) and the second node (104; 604).

5. Converter according to any one of claims 1 to 4, wherein the second circuit (404) is further configured to modify a duty cycle (a) of the switch (114; 802) as a function of the average of said values.

6. Converter according to any one of claims 1 to 5, wherein the switch (114; 802) is a field-effect transistor, the first (114d; 802d) and second (114s; 802s) terminals corresponding respectively to drain and source terminals of the transistor.

7. Converter according to any one of claims 1 to 6, wherein the switch (114; 802) has a switching frequency between 0.1 MHz and 100 MHz, preferably between 1 and 10 MHz, more preferably about 1.5 MHz.

8. Converter according to any one of claims 1 to 7, further comprising a piezoelectric resonator (112) adapted to supply the first voltage (Vds).

9. Converter according to any one of claims 1 to 8, wherein the second circuit (404) comprises: - a comparator (414) of the average of said values ​​to a threshold (Vref); - a corrector (416); and - a pulse width modulation circuit (418).

10. Converter according to claim 9, wherein the threshold (Vref) is a function of the energy consumption of a load (124) supplied by the converter (400; 800).

11. A method for controlling a power converter according to any one of claims 1 to 10, comprising the following steps: a) averaging the minimum values ​​of the first alternating voltage (Vds) after several cycles; and b) adjusting a closing instant (t_close) of the switch (114; 802) as a function of the average of said values.

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