PROCEDE DE FABRICATION DE MICRO-LEDs

Abstract

A method for manufacturing micro-LEDs comprising the following steps: i) providing a stack comprising at least one layer of n-doped GaN (104), one layer of n-doped GaN (105), quantum wells (106) and one layer of p-doped GaN (107), ii) porosifying the GaN layer (104), to obtain a porosified GaN layer (104'), iii) forming mesas in the stack, iv) covering the porosified GaN layer (104') with a second electrode (301) or with an encapsulation layer (302), the second electrode (301) or the encapsulation layer (302) being in direct contact with the porosified GaN layer (104'). step ii) being carried out in such a way that the optical index of the porosified GaN layer (104') does not vary by more than 10% with respect to the optical index of the second electrode (301) and / or with respect to the optical index of the encapsulation layer (302). Figure for the abstract: 1F.

Description

Title of the invention: METHOD FOR MANUFACTURING MICRO-LEDs Technical field

[0001] The present invention relates to the general field of color micro-displays.

[0002] The invention relates to a method for manufacturing micro-LEDs.

[0003] The invention also relates to a structure thus obtained.

[0004] The invention is particularly interesting because it makes it possible to improve the uniformity and reproducibility of emission of micro-screens based on micro LEDs, in particular GaN type micro-LEDs.

[0005] The invention finds applications in numerous industrial fields, and in particular in the field of color micro-screens based on micro-LEDs. STATE OF THE PRIOR ART

[0006] Color micro-screens comprise pixels formed of blue, green and red sub-pixels (RGB pixels). In the remainder of the description, these sub-pixels will be referred to more simply as pixels for the sake of brevity.

[0007] The blue and green pixels can be made from nitride materials and the red pixels from phosphide materials. Red pixels can also be made from nitride materials, for example, by growth on a substrate comprising porous GaN.

[0008] A GaN-based light-emitting diode (LED) micro-display comprises a matrix of unitary micro LEDs on a substrate comprising a CMOS circuit. One LED corresponds to one pixel. Each LED is connected to the CMOS circuit.

[0009] According to a conventional manufacturing method, a GaN epitaxy and an upper anode can be pixelated directly on the growth substrate (in sapphire or Si), an electrode (cathode) can be deposited (with or without contact with the N-GaN), then metal pads added by microelectronic means to allow a transfer with interconnection of the substrate containing the pixels on the CMOS control circuit. The removal of the growth substrate and the thinning of the GaN makes it possible to add electrical functions on the rear face (contact with the N-GaN if not made on the front face), as well as to limit the cross talk between pixels and to add optical functions on the light emission side (for example in the upper passivation layers).

[0010] Another method for manufacturing micro-LEDs involves bonding a non-pixelated GaN epitaxy and anode directly onto a silicon wafer containing the CMOS circuit. The bonding is a metallic bonding allowing the conduction of electric current (eutectic or direct bonding). Then, this CMOS circuit and GaN epitaxy assembly is thinned in order to be able to use, subsequently, traditional microelectronic processes. The epitaxy as well as the bonding layer are then pixelated in order to individualize the micro-LEDs of the micro-screen matrix. Each of the micro-LEDs can then be addressed by the CMOS circuit.

[0011] An upper electrode (cathode) allows contact with the N-GaN either by lateral contact with the N-GaN (for example aluminum) or by contact above the N-GaN layer with a transparent conductive layer, for example, in indium-tin oxide (or ITO for "indium tin oxide"). The optical index of this ITO layer is between 1.9 and 2.1. An encapsulation layer is then deposited above the GaN. The encapsulation layer is, conventionally, made from SiN whose optical index is also between 1.9 and 2.1. The optical index of GaN is, for its part, approximately 2.4.

[0012] However, in these two methods of manufacturing micro LED matrices, described above, a variation in the thickness (TTV: "total thickness variation") of the GaN is introduced, not only at the wafer scale but also from wafer to wafer. These thickness variations come both from the thickness variations of the epitaxy but especially from the thinning processes or the planarization processes used in order to remove the buffer layers of the epitaxy several microns thick, due to the non-uniformities of the processes used. However, these thickness variations can lead to a variation in the optical performances of the LED (luminance, angular emission, spectrum, etc.), in particular when the anode is a mirror, and the LED thus formed is of the resonant cavity type (emissive source in a Fabry-Pérot resonator).Changing the GaN thickness will change the optical cavity formed between the anode, the GaN and the upper optical interface (ITO / SiN in the previous example), which changes the extraction (in the SiN in the example) and consequently the extraction in air.

[0013] In the case where micro-lens or meta-surface type devices are structured in the upper encapsulation layer in order to maximize light extraction and / or to redirect the optical flow in a precise direction, the uniformity of the emission in this passivation layer is all the more important. Indeed, the efficiency of these devices depends on the angular emission in the passivation layer.

[0014] In the case where the encapsulation layer is not structured, the uniformity of the emission in the air (or the control of the extraction in the air) can be improved by introducing an anti-reflection layer at the passivation layer / air interface or by depositing a very thick passivation layer (typically approximately ~1 pm).

[0015] The addition of anti-reflection on the encapsulation layer prevents light from returning into the stack.

[0016] However, even with an anti-reflection layer, uniformity of emission in air will only be good if the emission in the encapsulation layer is uniform.

[0017] Emission uniformity in SiN can be achieved by broadening the LED emission spectrum (but this is not what is sought for this type of device) or by thickening the n-GaN but this also tends to decrease the EQE.

[0018] However, this adds steps to the process or may not be compatible with all devices that are increasingly miniaturized.

[0019] Indeed, the addition of thick layers will introduce optical interference phenomena (also called optical crosstalk) between pixels in miniaturized devices, by lateral guidance of light in the dielectrics.

[0020] In parallel, studies on the porosification of n-GaN are being carried out. For example, it has been shown in the article by Lin et al. 'CInGaN resonant microcavity with n+ -porous-GaN / p+- GaN tunneling junction' (IEEE Elec.Dev. Lett, vol. 42, NO. 11, 2021) or in the article by Mishkat-Ul-Masabih et al. ('Electrically injected nonpolar GaN-based VCSELs with lattice-matched nanoporous distributed Bragg Reflector mirrors', Appl. Phys. Express 12, 036504, 2019) that it is possible to fabricate a resonant cavity LED by positioning conductive porous GaN-based Bragg mirrors at the top and bottom of the structure. Porosification makes it possible to modify the optical index of GaN and to improve the electroluminescent properties of the resonant cavity LED, in particular by obtaining Bragg mirrors with high reflectivity on both sides of the optical cavity, but also perfect control of the optical cavity thickness (IX cavity for example).

[0021] However, this method is difficult to use in the case of miniaturized LED matrices. The thickness of the Bragg mirrors reaches several pm, which poses a form factor problem for microelectronics integration processes. Thus, the devices described are several tens of micrometers on each side. In addition, the epitaxial stack is particularly complex (because it contains an alternation of heavily doped and less doped layers), and induces an increase in the resistivity of the pLEDs (porous N-GaN being generally less conductive than non-porous). Statement of the invention

[0022] An aim of the present invention is to propose a method which overcomes the drawbacks of the prior art, and which makes it possible, in particular, to manufacture a micro-LED having a uniform and repeatable emission despite the process variations.

[0023] For this, the present invention proposes a method for manufacturing micro-LEDs including at least the following steps:

[0024] i) providing a stack comprising at least one highly n-doped GaN layer, one n-doped GaN layer, quantum wells and one p-doped GaN layer and a first electrode,

[0025] ii) porosifying the highly n-doped GaN layer, whereby a porosified GaN layer is obtained,

[0026] iii) forming mesas in the stack,

[0027] iv) covering the porosified GaN layer with a second electrode formed from a layer of transparent conductive oxide, the second electrode being in direct contact with the porosified GaN layer, then, preferably, covering the second electrode with an encapsulation layer,

[0028] or

[0029] depositing a second electrode on a side face of the porosified GaN layer or on a side face of the n-doped GaN layer and covering the porosified GaN layer with an encapsulation layer, the encapsulation layer being in direct contact with the porosified GaN layer.

[0030] Steps ii) and iii) can be carried out in the order ii) and iii) or in the order iii) and ii).

[0031] Step ii) is carried out in such a way that the optical index of the porosified GaN layer does not vary by more than 10% relative to the optical index of the second electrode and / or relative to the optical index of the encapsulation layer. Preferably, it does not vary by more than 5% and even more preferably it does not vary by more than 2% relative to the optical index of the second electrode and / or of the encapsulation layer.

[0032] The optical index depends on the volume concentration of the pores in the layer. It will be chosen according to the materials of the transparent conductive oxide layer and / or the encapsulation layer. The volume concentration of pores can be determined from the following approximate formula:

[0033] neff =

[0034] with p the volume concentration of pores, nGaN the optical index of GaN and nair the optical index of air.

[0035] For example, in order to obtain an effective index of 1.9, a pore concentration of the order of 45% will be chosen.

[0036] Advantageously, the transparent conductive oxide layer is a layer of indium tin oxide and / or the encapsulation layer is made of SiN, SiO2 or SiON. Advantageously, the encapsulation layer has an optical index close to that of ITO. Preferably, the encapsulation layer is made of SiN.

[0037] The invention is fundamentally distinguished from the prior art by the presence of a porosified GaN layer under and in contact with the transparent conductive oxide layer or by the presence of a porosified GaN layer under and in contact with the encapsulation layer.

[0038] The optical index of GaN is modified by porosification. The porosification is carried out such that the optical index of the porosified GaN layer is close to:

[0039] - the optical index of transparent conductive oxides (TCO), in particular 1TTO,

[0040] and / or

[0041] - the optical index of the encapsulation layers, for example in SiN, in particular, in the case where the upper electrode (e.g. aluminum) covers the sides of the porosified layer and where the porosified layer is in direct contact with the encapsulation layer.

[0042] Since the indices of the porosified layer, the TCO layer and the encapsulation layer are close, the reflections at these interfaces are minimized, making the emission in the SiN independent of the thickness variations of the porous GaN.

[0043] Advantageously, the porous GaN layer has a porosity between 40% and 70% by volume to have an effective optical index close to 1.9 (i.e. close to the optical index of the upper layers) and thus minimize reflections between the porous GaN and these upper layers.

[0044] The porous GaN layer being arranged between the anode (lower electrode) and the cathode (upper electrode, here the transparent conductive oxide layer), the porosity will not be too high for this porosified layer to be able to transport the electrons. To maintain a conductive porous layer, it is possible to implement localized differential doping of the N-GaN layer in order to maintain, at the pixel scale, a non-porosified zone.

[0045] The fine localization of the GaN / porous GaN interface makes it possible to control the thickness of the LED cavity and thus to position the reflection interface between the GaN and the porous GaN at a constructive interference position in order to maximize light extraction. It is thus possible to reduce the thicknesses of the micro-LEDs by the pattern ("design") of the epitaxy, by compacting the P-GaN stack, quantum wells and N-GaN to its minimum, advantageously between 250 and 500nm, in order to maximize the coupling of the optical power in the vertical mode rather than in the modes guided in the plane. The gains in extraction as well as in emission uniformity will be all the more important as the GaN thickness is low.

[0046] The GaN layers are preferably formed by epitaxy.

[0047] Porosification is carried out by electrochemical anodization. Electrochemical porosification has selectivity depending on the doping level. It takes place only in the most N-doped areas (1019at.cm3 ​​for example), defined in particular during epitaxy. The position of the porous areas is then finely controlled. Thus, the thickness of non-porosified GaN will be constant regardless of the thickness variations resulting from the process. The variations, introduced by the microLED manufacturing process, are transferred to the porous layer which absorbs the process variations. The porous layer is an optical extraction layer tolerant to thickness variations.

[0048] Pixelation can be done before or after transfer, the growth substrate must be removed, at least if it is opaque (case Si).

[0049] Advantageously, the thickness of the heavily doped GaN layer is between 100nm and 500nm, preferably between 200 and 500nm. Thus, the thickness of GaN is greater than the TTV introduced by epitaxy and by thinning processes (of the order of 200nm).

[0050] An anti-reflective layer may be deposited on the encapsulation layer.

[0051] According to a first advantageous embodiment, the method is a micro-LED production method by monolithic bonding of the epitaxy.

[0052] According to a variant of this first embodiment, step i) is advantageously carried out according to the following steps a) to c):

[0053] a) providing an initial stack comprising a support layer, optionally a buffer layer of (Al,Ga)N, an unintentionally doped GaN layer, a heavily n-doped GaN layer, an n-doped GaN layer, quantum wells, a p-doped GaN layer and a first electrode,

[0054] b) transferring the first stack onto a support substrate covered with a metal layer,

[0055] c) removing the support layer, where appropriate the (Al,Ga)N buffer layer, the GaN layer not intentionally doped, for example by thinning, whereby a substrate of interest is obtained comprising the support substrate, the first electrode, the p-doped GaN layer, the GaN / InGaN quantum wells, the n-doped GaN layer and the heavily n-doped GaN layer.

[0056] According to another variant of this first advantageous embodiment, the method may comprise, before step ii), a step during which the doping rate of the heavily n-doped GaN layer is locally reduced, for example by implantation of helium or hydrogen ions, so as to have a first part of the heavily n-doped GaN layer having a first conductivity and a second part of the heavily doped GaN layer having a second conductivity, the first electrical conductivity being greater by at least a factor of ten than the second electrical conductivity, whereby:

[0057] - the second part is not porosified during step ii),

[0058] - the porosified GaN layer of the mesas obtained in step iii) comprises a part non-porosified and a porosified portion, the non-porosified portion preferably being in the center of the non-porosified portion.

[0059] Thus, the doped GaN layer comprises doped areas and lightly doped areas, the lightly doped areas not being porosified during step ii). The doped GaN layer of the mesas obtained in step iii) comprises a non-porosified central part and a porosified periphery.

[0060] Still according to this first advantageous embodiment, it is possible for the method to comprise the following steps:

[0061] - the method comprises an additional step between step i) and step ii) during from which the heavily n-doped GaN layer and a portion of the n-doped GaN layer are etched to form a mesa pre-structure,

[0062] - during step ii), the central part of the heavily n-doped GaN layer is not not porosified, for example by stopping the porosification step before the total porosification of the heavily doped GaN layer, whereby the GaN layer of the mesas obtained in step iii) comprises a non-porosified central part and a porosified periphery,

[0063] - step iii) is carried out by etching the other part of the n-doped GaN layer, the quantum wells, the p-doped GaN layer, the first electrode and part of the support substrate.

[0064] In these two embodiments, the injection is improved because only the periphery of the GaN layer is porosified. The non-porosified area in the center of the pixel can be used to reestablish contact.

[0065] According to a second advantageous embodiment, the method is a micro-LED production method by flipping chips or hybrid bonding.

[0066] According to this second embodiment, the method can comprise the following successive steps:

[0067] i) providing a stack comprising a support layer, an unintentionally doped GaN layer, a heavily n-doped GaN layer, an n-doped GaN layer, quantum wells, a p-doped GaN layer and a first electrode,

[0068] iii) forming mesas in the stack, by etching the first electrode, the p-doped GaN layer, the quantum wells, the n-doped GaN layer, the heavily n-doped GaN layer and a portion of the unintentionally doped GaN layer,

[0069] - implementing step ii) to porosify the heavily n-doped GaN layer, whereby a porosified GaN layer is obtained,

[0070] - transfer the stack obtained onto a support substrate covered by a layer of metal,

[0071] - remove the support layer, the unintentionally doped GaN layer, by for example by thinning, whereby a substrate of interest is obtained comprising the support substrate, the first electrode, the p-doped GaN layer, the GaN / InGaN quantum wells, the n-doped GaN layer and the heavily n-doped GaN layer,

[0072] - implement step iv).

[0073] Advantageously, the method further comprises at least one of the following steps:

[0074] - depositing an anti-reflective layer is deposited on the encapsulation layer,

[0075] - structuring the encapsulation layer by micro-lenses or meta-surfaces to maximize light extraction and / or redirect optical flow in a specific direction.

[0076] The method may, in addition, comprise a step of depositing dielectric on the flank of the mesas acting as a passivation layer for the defects created during the etching of the mesas as well as the deposit of an electrically and thermally conductive element, for example based on copper, in the space between the mesas, thus creating the second metal electrode (cathode) which will be in contact with the N contact deposit in ITO or using the lateral contact.

[0077] It is possible to reduce the thickness of the micro-LEDs, because the gains in extraction as well as in emission stability will be all the more important as the thickness of GaN is low.

[0078] The invention also relates to a micro-LED structure obtained according to the method described above.

[0079] The micro-LED structure comprises a stack, the stack comprising at least one porosified highly n-doped GaN layer, an n-doped GaN layer, quantum wells, a p-doped GaN layer and a first electrode, mesas being formed in the stack,

[0080] the porosified GaN layer being covered and in direct contact with a second electrode formed from a layer of transparent conductive oxide, the second electrode preferably being covered by an encapsulation layer,

[0081] or

[0082] a second electrode being arranged on a lateral face of the porosified GaN layer or on a lateral face of the n-doped GaN layer, the porosified GaN layer being covered and in direct contact with an encapsulation layer,

[0083] the optical index of the porosified GaN layer not varying by more than 10% relative to the optical index of the second electrode and / or relative to the optical index of the encapsulation layer.

[0084] For example, the structure comprises a substrate of interest, the substrate of interest comprising a support substrate, a first electrode, a p-doped GaN layer, GaN / InGaN quantum wells, an n-doped GaN layer, a heavily doped GaN layer, mesas being formed in the substrate of interest. The mesas comprising the porosified heavily doped GaN layer, the doped GaN layer, the quantum wells, the p-doped GaN layer, the bottom electrode and a portion of the support substrate. The mesas are covered by a second electrode formed of a transparent conductive oxide layer, preferably an indium tin oxide layer, and / or by an encapsulation layer.

[0085] Advantageously, the highly doped GaN layer of the mesas comprises a non-porosified central part and a porosified periphery.

[0086] According to a first advantageous embodiment variant, the central part is lightly doped.

[0087] According to a second advantageous embodiment variant, the central part is heavily doped.

[0088] Advantageously, the porosified GaN layer has a thickness of between 100 and 500 nm, preferably between 300 and 500 nm.

[0089] Other characteristics and advantages of the invention will emerge from the additional description which follows.

[0090] It goes without saying that this additional description is given only as an illustration of the subject of the invention and must in no case be interpreted as a limitation of this subject. Brief description of the drawings

[0091] The present invention will be better understood on reading the description of exemplary embodiments given purely for informational purposes and in no way limiting, with reference to the appended drawings in which:

[0092] The [Fig. 1 A]

[0093] The[Fig.lB]

[0094] The[Fig.lC]

[0095] The[Fig.lD]

[0096] The[Fig.lE]

[0097] [Fig. 1F] schematically represents different stages of a method of manufacturing micro-LEDs according to a particular embodiment of the invention.

[0098] The [Fig.2A]

[0099] The [Fig.2B]

[0100] The [Fig.2C]

[0101] The [Fig.2D]

[0102] The [Fig.2E]

[0103] The [Fig.2F]

[0104] [Fig.2G] schematically represents different steps of a method of manufacturing micro-LEDs according to another particular embodiment of the invention.

[0105] The [Fig.3A]

[0106] The [Fig.3B]

[0107] The [Fig.3C]

[0108] The [Fig.3D]

[0109] The [Fig.3E]

[0110] The [Fig.3F]

[0111] [Fig.3G] schematically represents different stages of a method of manufacturing micro-LEDs according to another particular embodiment of the invention.

[0112] The [Fig.4A]

[0113] The [Fig.4B]

[0114] The [Fig.4C]

[0115] The [Fig.4D]

[0116] The [Fig.4E]

[0117] The [Fig.4F]

[0118] The [Fig.4G]

[0119] The [Fig.4H]

[0120] The [Fig.4I]

[0121] [Fig.4J] schematically represents different steps of a method of manufacturing micro-LEDs according to another particular embodiment of the invention.

[0122] [Fig.5A] schematically represents in section a micro-LED structure, according to a comparative example.

[0123] [Fig.5B] is a graph representing the luminance of the structure of [Fig.4A] as a function of the thickness of the GaN layer.

[0124] [Fig.6A] schematically represents in section a micro-LED structure, according to a particular embodiment of the invention.

[0125] [Fig.6B] is a graph representing the luminance of the structure of [Fig.5A] as a function of the thickness of the GaN layer.

[0126] [Fig.7A] schematically represents in section a micro-LED structure, according to another comparative example.

[0127] [Fig.7B] is a graph representing the luminance of the structure of [Fig.6A] as a function of the thickness of the GaN layer.

[0128] [Fig.8A] schematically represents in section a micro-LED structure, according to another particular embodiment of the invention.

[0129] [Fig.8B] is a graph representing the luminance of the structure of [Fig.7A] as a function of the thickness of the GaN layer.

[0130] [Fig.9] is a graph representing the luminance as a function of the emission angle, according to a particular embodiment of the invention.

[0131] [Fig. 10] is a graph representing the EQE as a function of the total GaN thickness.

[0132] The different parts represented in the figures are not necessarily on a uniform scale, in order to make the figures more readable.

[0133] The different possibilities (variants and embodiments) must be understood as not being mutually exclusive and can be combined with each other.

[0134] Further, in the following description, terms that depend on the orientation, such as "above", "below", etc. of a structure apply with the assumption that the structure is oriented as illustrated in the figures.

[0135] DETAILED DESCRIPTION OF PARTICULAR EMBODIMENTS

[0136] Although this is in no way limiting, the invention particularly finds applications in the field of monochrome micro-screens or color micro-screens, and more particularly for the manufacture of LEDs. However, it could be used in the field of photovoltaics or even water electrolysis ("water splitting") since, on the one hand, ITnGaN absorbs in the entire visible spectrum and, on the other hand, its valence and conduction bands are around the stability domain of water, a thermodynamic condition necessary for the water decomposition reaction. The invention may also be of interest for the manufacture of long-wavelength emitting lasers.

[0137] The invention is more particularly described for a monolithic type integration by complete transfer of the layers, that is to say that the porosification step is carried out after transfer (figures 1A to 1F, 2A to 2G and 3A to 3G)).

[0138] However, it is also possible to carry out the porosification step on the growth substrate, to manufacture the LED and then to make a flip chip type assembly or hybrid bonding on a substrate comprising an integrated circuit of the ASIC type (Application-Specific Integrated Circuit). The porosification step is carried out before transfer, which allows relaxation during growth (Figures 4A to 4J).

[0139] The method is particularly interesting for manufacturing structures comprising porosified (Al,In,Ga)N / (Al,In,Ga)N mesas having, in particular, a pitch of less than 30 pm.

[0140] By (Al,In,Ga)N, we mean AIN, AlGaN, InGaN or GaN. Hereinafter, we refer more particularly to porous GaN, but it is possible to have, for example, ITnGaN or porous AlGaN.

[0141] We will describe in more detail the micro-LED manufacturing process with reference to the attached figures 1A-1F, 2A-2G and 3A-3G.

[0142] The micro-LED manufacturing process comprises the following steps:

[0143] a) providing a first stack 100 comprising (figures 1A, 2A, 3A):

[0144] - a base substrate 101,

[0145] - possibly a buffer layer 102, for example in AlGaN,

[0146] - an unintentionally doped GaN layer (GaN nest) 103,

[0147] - a highly n-doped GaN layer (n+-GaN) 104, having a first electrical conductivity,

[0148] - a layer of n-doped GaN (n-GaN) 105,

[0149] - Gan / InGaN 106 quantum wells,

[0150] - a p-doped GaN layer (p-GaN) 107,

[0151] - a first electrode (or lower electrode) 108, preferably metallic,

[0152] b) transferring the first stack 100 onto a support substrate 201, covered by an electrically conductive layer 202, preferably a metal layer (figures 1B, 2B, 3B), the metal layer 202 interconnecting with the first electrode 108 during the transfer, preferably carried out by metal-metal bonding,

[0153] c) removing the base substrate 101, then removing the buffer layer 102 if applicable and the GaN nest layer 103, for example by thinning, whereby a substrate of interest is obtained comprising the support substrate 201, the lower electrode 202, the p-doped GaN layer 107, the GaN / InGaN quantum wells 106, the n-doped GaN layer 105, the heavily n-doped GaN layer 104 (Figures IC, 2C, 3C),

[0154] d) partially or totally porosifying the highly n-doped GaN layer 104, whereby a porosified GaN layer 104' is obtained (Figures 1D, 2E, 3E),

[0155] e) forming mesas in the substrate of interest, the mesas comprising the porosified GaN layer 104', the doped GaN layer 105, the quantum wells 106, the p-doped GaN layer 107, the lower electrode 108 and a portion of the support substrate 201 (Figures 1E, 2F, 3F).

[0156] According to a first alternative, the method may further comprise the following steps:

[0157] f) covering the mesas (i.e. covering the upper face of the porosified layer 104') with a second electrode (or upper electrode) 301 formed for example from a layer of transparent conductive oxide, preferably a layer of indium tin oxide (figures 1F, 2G, 3G),

[0158] g) optionally, depositing an encapsulation layer 302 on the second electrode 301,

[0159] h) optionally, depositing an anti-reflective layer 303 on the encapsulation layer 302.

[0160] According to another alternative, the method may further comprise the following steps:

[0161] f') forming a second electrode (or upper electrode) 301 for example a layer of transparent conductive oxide, or a layer of aluminum on a lateral face of the mesas (i.e. on a lateral face of the porosified layer 104' and / or on a lateral face of the layer 105),

[0162] g') cover the mesas (i.e. cover the upper face of the porosified layer 104') by an encapsulation layer 302,

[0163] h') optionally, depositing an anti-reflective layer 303 on the encapsulation layer 302.

[0164] Thus, the contact of the second electrode 301 can be made on the upper face of the porosified GaN layer 104', on the lateral face of the porosified GaN layer 104' or on the lateral face of the doped GaN layer 105.

[0165] The upper face of the porosified GaN layer 104' is in direct contact with the upper electrode 301 made of transparent conductive oxide or in direct contact with the encapsulation layer 302. By direct contact, it is meant that there is no intermediate layer between the aforementioned layers.

[0166] The first stack provided in step a) comprises a base substrate 101 having, for example, a thickness ranging from 250 μm to 2 mm. The thickness depends on the nature of the base substrate 101 and its dimensions. For example, for a 2-inch diameter sapphire base substrate, the thickness may be 350 μm. For a 6-inch diameter sapphire support layer, the thickness may be 1.3 mm. For a 200 mm diameter silicon support layer, the thickness may be 1 mm.

[0167] In the case of a base substrate 101 made of silicon, a buffer layer made of (Al,Ga)N is advantageously interposed between the substrate 101 and the GaN nest layer 103. This is a buffer layer for growth.

[0168] The GaN nest layer 103 is an unintentionally doped layer (nest) to avoid porosification. By unintentionally doped GaN, we mean a concentration lower than 5e17at / cm3. The GaN nest layer 103 has, for example, a thickness ranging from 500nm to 5pm. Advantageously, its thickness is between 1 and 4pm to absorb the stresses linked to the mesh mismatch between the GaN and the underlying layers.

[0169] The highly doped GaN layer n 104 is deposited on the nested GaN layer. By highly doped GaN is meant a concentration greater than 6.1018 at / cm3, preferably at least 8.1018 at / cm3, or even greater than 1019 at / cm3. It has a thickness between 100nm and 500 nm, preferably between 200nm and 500 nm and even more preferably between 300nm and 500 nm. This layer makes it possible to absorb the TTVs due to the micro-LED manufacturing process. This layer is porosified during step d).

[0170] The heavily doped GaN layer n 104 comprises two main faces (an upper face and a lower face) parallel or substantially parallel to each other and a lateral face.

[0171] The doped GaN layer 105 is formed on the heavily doped GaN layer 104. Doped GaN means a concentration greater than 1018 at / cm3, preferably between 1.1018 at / cm3 and 5.1018 at / cm3. The GaN layer has, for example, a thickness ranging from 100nm to 1pm. It must be sufficiently electrically conductive to be able to make contact on this layer during the electrochemical anodization step. This electrically conductive layer is electrically connected to the voltage or current generator. Advantageously, it ensures the quality of the material of the upper layer. The minimum thickness varies depending on the doping rate.

[0172] The n 105 doped GaN layer comprises two main faces (an upper face and a lower face) parallel or substantially parallel to each other and a lateral face.

[0173] Subsequently, n-type doping is described, but it could be p-type doping. The dopings could be reversed.

[0174] The quantum wells 106 are, for example, GaN / InGaN wells.

[0175] The p-doped layer 107 has, for example, a thickness of between 100nm and 200nm. It has, for example, a doping rate of 119.cm 3 or even at least 120.cm3 in the case of Mg doping.

[0176] The various aforementioned GaN layers as well as the quantum wells 106 are formed by epitaxy.

[0177] The first stack 100 may be a more complex stack and may contain, for example, one or more of the following elements: an AlGaN electron blocking layer (or EBL for “Electron Blocking Layer”), a multilayer with different dopings to produce porous mesas, etc.

[0178] During step b), the first stack (p side) is transferred onto a second stack comprising a support substrate 201 and a lower electrode 202 (or first electrode). The first electrode 108 is deposited on the first stack and then the assembly is transferred onto the support substrate 201 covered by the metal layer 202.

[0179] The support substrate 201 is preferably a substrate comprising an integrated circuit of the “ASIC” type (“Application-Specific Integrated Circuit”). The ASIC circuit may comprise electronic components (transistor(s), capacitor(s), resistors, etc.) allowing the individual control / power supply of each micro-LED according to the color expected for the pixel. The electronic components are made directly in the volume (or “bulk”) of the substrate.

[0180] The support substrate 201 may also be a matrix substrate of thin-film transistors (TFT), in particular to obtain larger direct-view screens.

[0181] The substrate 201 is preferably a silicon wafer.

[0182] The lower electrode 202 (or first electrode) covers the support substrate. It could also be made of ITO. The lower electrode 202 is, for example, made of aluminum or silver. It may, for example, have a thickness of between 40 and 200 nm.

[0183] In step c), the base substrate 101, the buffer layer 102 if applicable, and the GaN nest layer 103 are removed. For example, the base substrate 101 is removed by laser (also called a lift-off technique). The buffer layer 102 and the GaN nest layer 103 may be removed by thinning. The thinning may end at the nest layer 103 / heavily doped GaN layer 104 interface. Preferably, the thinning ends in the heavily doped GaN layer 104.

[0184] During step d), the heavily doped GaN layer 104 is partially or totally porosified. The higher the doping rate, the greater the porosification will be at fixed potential. The choice is made according to the targeted optical index.

[0185] In step d), the structure and a counter-electrode (CE) are electrically connected to a voltage or current generator. The structure acts as a working electrode (WE). Subsequently, it will be called a voltage generator, but it could be a current generator allowing a current to be applied between the device and the counter-electrode.

[0186] The contact is made on an electrically conductive layer of the structure, preferably on the doped GaN layer 105.

[0187] The counter-electrode is made of an electrically conductive material, such as for example a metal such as platinum.

[0188] In step d), the electrodes are immersed in an electrolyte, also called an electrolytic bath or electrolytic solution. The electrolyte may be acidic or basic. The electrolyte is, for example, oxalic acid. It may also be KOH, HF, HNO3, NaNO3 or H2SO4 or a mixture thereof.

[0189] The applied voltage may be between 1 and 30V for example. Preferably, it is between 5 and 18V (for example between 5 and 15V), and even more preferably between 6 and 12V, for example between 8 and 10V. The voltage is chosen according to the doping rates of the different layers and the target porosity rate. It is applied, for example, for a period ranging from a few seconds to several hours. Porosification is complete when there is no longer any current at imposed potential. At that moment, the entire doped structure is porosified and the electrochemical reaction stops.

[0190] The electrochemical anodization step can be carried out under ultraviolet light. (UV).

[0191] At the end of the porosification step, the porosity rate of the porosified GaN layer 104 is at least 10%. It preferably ranges from 10% to 80%, and even more preferably from 30% to 70%.

[0192] The largest dimension (height) of the pores can vary from a few nanometers to a few micrometers. The smallest dimension (diameter) can vary from a few nanometers to a hundred nanometers, in particular from 30 to 70nm.

[0193] The porosification obtained (porosity rate and pore size) depends on the doping of the layer and the process parameters (applied voltage, duration, nature and concentration of the electrolyte, chemical post-treatment or annealing).

[0194] The anodization of the GaN layer 104 may be total. According to embodiment variants described in more detail below, the anodization may be partial. Otherwise, one or more zones 110 of the heavily doped GaN layer are not porosified during step d). Each non-porosified zone goes from the first main face to the second main face to form an electrical conduction path through the GaN layer. The electrical conduction path may have the shape of a channel or a tube for example.

[0195] Thus, electrical conduction is improved and by choosing the position of the non-porosified areas. It is also possible to play on relaxation.

[0196] During step e), the mesas are formed. The structuring of the stack is, for example, carried out by photolithography.

[0197] Mesas, also called elevations, are raised elements. They are obtained, for example, by etching a continuous layer or several superimposed continuous layers, so as to leave only a certain number of "reliefs" of this layer or these layers. The etching is generally a plasma etching (or dry etching). The reliefs make it possible to define pixels.

[0198] Preferably, the sides of the mesas are perpendicular to this stack of layers.

[0199] The surface of the mesas can be for example circular, hexagonal, square or rectangular.

[0200] The largest dimension of the surface of the mesas ranges from 500nm to 500pm, preferably from 1 to 10pm and even more preferably from 3 to 5pm. For example, the largest dimension of a circular surface is the diameter.

[0201] The thickness (or depth) of the mesas corresponds to the dimension of the mesa perpendicular to the underlying stack. The depth of the mesas ranges from 0.5 to 1 pm, preferably from 0.3 to 2 pm.

[0202] The spacing between two consecutive mesas ranges from 50nm to 20pm.

[0203] During step f), a second electrode 301 is deposited on the porosified layer 104' (i.e. on the upper face of the porosified layer 104'). The second electrode is a transparent conductive oxide layer. This can be a layer of indium-tin oxide (or ITO for "indium tin oxide"), alumina-doped zinc oxide (or AZO for "aluminium-doped zinc oxide"), Gallium Zinc oxide (GZO) or SnO2. This layer covers the mesas. The transparent conductive oxide layer acts as the upper electrode or cathode.

[0204] After step f), it is possible to implement a step g) to deposit an encapsulation layer 302 on the transparent conductive oxide layer 301. The encapsulation layer 302 is, for example, a layer of SiN, SiO2 or SiON. It could also be a multi-layer.

[0205] A structuring of the encapsulation layer 302 by micro-lenses can also be carried out.

[0206] It is also possible to deposit an anti-reflector 303 (i.e. an anti-reflection layer) on the encapsulation layer 302 (step h)).

[0207] Advantageously, the method comprises between step e) and step f), a step during which a planarizing material or stack 304 is deposited between the mesas. The material or stack may be conductive or insulating. Preferably, it includes copper. The material is, for example, deposited by electrolytic deposition (or ECD for “Electrochemical Deposition”). Advantageously, a step of chemical-mechanical polishing (CMP) of the deposited material 304 is carried out.

[0208] We will now describe two embodiment variants for which the core of the heavily doped GaN layer of the pixels is not porosified. The core represents, for example, from 5% to 25% of the volume of the layer.

[0209] According to an advantageous embodiment variant, shown in FIGS. 2A to 2G, the method comprises the following steps:

[0210] a) providing a first stack 100 comprising a base substrate 101, optionally an AlGaN buffer layer 102, a GaN nest layer 103, a heavily n-doped GaN layer 104, an n-doped GaN layer 105, Gan / InGaN quantum wells 106 and a p-doped GaN layer 107 ([Fig.2A]),

[0211] b) transferring the first stack 100 onto a second stack comprising a support substrate 201 covered by a metal layer 202 ([Fig.2B]),

[0212] c) removing the base substrate 101, then removing the buffer layer 102 if applicable, and the GaN nest layer 103 for example by thinning, whereby a substrate of interest is obtained comprising a support substrate 201, the lower electrode 202, the p-doped GaN layer 107, GaN / InGaN quantum wells 106, an n-doped GaN layer 105, a heavily n-doped GaN layer 104 ([Fig.2C]),

[0213] - locally modify the doping rate of layer 104 to form zones 110 having an electrical conductivity lower than the first electrical conductivity, by example by means of ion implantation, the GaN N++ 104 layer is thus locally 'de-doped' and the 110 zones of lower conductivity will not be porosified during step d) ([Fig.2D]),

[0214] d) porosifying the highly n-doped GaN layer 104, whereby a porosified layer 104' locally comprising zones 110 that are little or not at all porosified is obtained ([Fig.2E]),

[0215] e) forming mesas in the substrate of interest, by etching the second part of the doped GaN layer 105, the quantum wells 106, the p-doped GaN layer 107, the lower electrode 202 and a part of the support substrate 201, the mesas thus comprising the porosified GaN layer 104' having locally non-porosified areas 110, the doped GaN layer 105, the quantum wells 106, the p-doped GaN layer 107, the lower electrode 202 and a part of the support substrate 201 ([Fig.2F]),

[0216] - preferably implementing a filling step (with a material 304 or a stack of material) / planarization between the mesas,

[0217] f) covering the mesas with an upper electrode 301 formed from a layer of transparent conductive oxide ([Fig.2G]),

[0218] g) optionally, depositing an encapsulation layer 302 on the transparent conductive oxide layer and, advantageously, an anti-reflection layer 303.

[0219] The local reduction of the doping rate of the heavily doped GaN layer 104 is for example achieved by implanting helium or hydrogen. The ion implantation step makes it possible to reduce the conductivity, deactivate the dopants initially present.

[0220] After the porosification step, it is possible to carry out a thermal annealing step to increase the conductivity of the zone 110.

[0221] According to another advantageous embodiment variant, shown in FIGS. 3A to 3G, the method comprises the following steps:

[0222] a) providing a first stack 100 comprising a base substrate 101, optionally an AlGaN buffer layer 102, a nested GaN layer 103, a heavily n-doped GaN layer 104, an n-doped GaN layer 105, Gan / InGaN quantum wells 106 and a p-doped GaN layer 107 ([Fig.3A]),

[0223] b) transferring the first stack 100 onto a second stack comprising a support substrate 201 and a metal layer 202 ([Fig.3B]),

[0224] c) removing the base substrate 101, then if necessary the buffer layer 102 and the GaN nest layer 103, for example by thinning, whereby a substrate of interest is obtained comprising a support substrate 201, the upper electrode 202, the p-doped GaN layer 107, GaN / InGaN quantum wells 106, an n-doped GaN layer 105, a heavily doped GaN layer 104 ([Fig.3C]),

[0225] - etch the GaN n++ 104 layer and part of the GaN n 105 layer to forming 'pre-pixels' stopping in a first part of the n-GaN layer 105, the pre-pixel comprising the n++ GaN layer 104 and a part of the n GaN layer 105 ([Fig.3D]),

[0226] d) porosifying the periphery of the heavily doped GaN layer n 104 (the electrochemical porosification starting with the outline of the pixels, the porosification process is stopped before the core is porosified), the second part of the unetched n-GaN layer 105 allowing the current to be conducted for the electrochemical porosification step ([Fig.3E]), whereby a partially porosified GaN layer 104' is obtained,

[0227] e) forming mesas in the substrate of interest from the pre-pixels, by etching the second part of the doped GaN layer 105, the quantum wells 106, the p-doped GaN layer 107, the lower electrode 202 and a part of the support substrate 201, the mesas thus comprising the partially porosified heavily doped GaN layer 104', the doped GaN layer 105, the quantum wells 106, the p-doped GaN layer 107, the first electrode 108 and a part of the support substrate 201 ([Fig.3F]),

[0228] - preferably implement a filling step (with a 304 material or a stack of material) / planarization between the mesas,

[0229] f) covering the mesas with an upper electrode 301 formed from a layer of transparent conductive oxide,

[0230] g) optionally, depositing an encapsulation layer 302 on the transparent conductive oxide layer and, advantageously, an anti-reflection layer 303.

[0231] We have previously described embodiment variants implementing a porosification step after transfer (integration with monolithic bonding of the epitaxy).

[0232] We will now describe in more detail an alternative embodiment where the porosification step is implemented before the transfer step (so-called flip chip integration).

[0233] According to this other advantageous embodiment variant, shown in FIGS. 4A to 4J, the method may comprise the following steps:

[0234] i) providing a stack comprising a support layer 101, an unintentionally doped GaN layer 103, a heavily n-doped GaN layer 104, an n-doped GaN layer 105, quantum wells 106 and a p-doped GaN layer 107, a first electrode 108 ([Fig.4A]),

[0235] iii) forming mesas in the stack, by etching the first electrode 108, the p-doped GaN layer 107, the quantum wells 106), the n-doped GaN layer 105, the heavily n-doped GaN layer 104 and a portion of the unintentionally doped GaN layer 103 ([Fig.4B]),

[0236] ii) selectively porosifying the highly n-doped GaN layer 104, whereby a porosified GaN layer is obtained 104' ([Fig.4C]),

[0237] - preferably deposit a passivation dielectric layer 401 ([Fig.4D]),

[0238] - etch and planarize the upper surface of the stack to shape the first electrode 108, and preferably, fill the inter-mesa space with an electrically conductive and thermally conductive element ([Fig.4E]),

[0239] - prepare metal pads 402 for hybrid bonding or turning of chips (“flip chip”) ([Fig.4F]),

[0240] - transfer the stack obtained onto a support substrate 201, for example of the type ASIC, also including metal pads ([Fig.4G]),

[0241] - remove the support layer 101, the unintentionally doped GaN layer 103, for example by thinning, whereby a substrate of interest is obtained comprising the support substrate 201, the first electrode 108, the p-doped GaN layer 107, the GaN / InGaN quantum wells 106, the n-doped GaN layer 105 and the porosified n-doped GaN layer 104' ([Fig.4H]),

[0242] iv) covering the porosified GaN layer 104' with a second electrode 301 formed from a layer of transparent conductive oxide, preferably a layer of indium tin oxide, the second electrode 301 being in direct contact with the porosified GaN layer 104' ([Fig.4I]),

[0243] - deposit an encapsulation layer 302 on the second electrode ([Fig.4J]).

[0244] The characteristics of the different layers, of the different elements described for this embodiment variant where the porosification step is implemented before the transfer step may be identical to the characteristics of the different layers, of the different elements described for the embodiment variant where the porosification step is implemented after the transfer step.

[0245] The micro-LED structure obtained comprises:

[0246] - a substrate of interest in which mesas are formed,

[0247] the substrate of interest comprising a support substrate 201, a lower electrode 202, a p-doped GaN layer 107, GaN / InGaN quantum wells 106, an n-doped GaN layer 105, a completely or partially porosified GaN layer 104',

[0248] the mesas comprising the porosified GaN layer 104', the doped GaN layer 105, the quantum wells 106, the p-doped GaN layer 107, the lower electrode (or anode) 202 and a portion of the support substrate 201,

[0249] - an upper electrode 301 (or cathode) formed from a transparent oxide layer conductor, preferably a layer of indium tin oxide, covering the mesas,

[0250] - optionally, by an encapsulation layer 302 and an anti-reflection layer 303.

[0251] As mentioned, the 104' GaN layer of the mesas can be completely po- rosified or partially porosified.

[0252] Advantageously, the GaN layer 104' of the mesas comprises a non-porosified central part 110 and a porosified periphery.

[0253] The central part can be lightly doped or heavily doped.

[0254] The approach is particularly interesting:

[0255] - for structures whose GaN layer is covered and in contact with a transparent electrode then by an encapsulation layer (the GaN having an optical index close to that of the transparent electrode)

[0256] - for structures where the electrode contact is a lateral contact and where the layer of GaN is covered and in contact with the encapsulation layer (the GaN having an optical index close to that of the encapsulation layer).

[0257] In all cases, the uniformity of the emission in the encapsulation is found in the air thanks either to a structuring which breaks the cavity effect, or by the addition of an anti-reflection layer which allows the light emitted in the encapsulation layer, in particular in SiN, to pass directly into the air without interacting again with the stack of the structure.

[0258] Comparative examples and illustrative and non-limiting examples of different embodiments:

[0259] Example 1: comparative example with an LED structure covered with ITO and SiN

[0260] In this first illustrative example, the LED stack studied successively comprises ([Fig.5A]): an aluminum layer 202, a p-doped layer 107, quantum wells 106, an n-doped GaN layer 105 with an optical index of 2.4, a transparent conductive oxide layer 301 in ITO with an optical index of 1.91 and an encapsulation layer 302 in SiN with an optical index of 1.95.

[0261] The simulation of the luminance at 0° (in the axis perpendicular to the plane of the structure) in SiN as a function of the thickness of n-GaN ([Fig.5B]) shows that the luminance depends very strongly on the variations in the GaN thickness.

[0262] Example 2: illustrative example with an LED structure covered with ITO and SiN:

[0263] In this example, the LED stack studied successively comprises ([Fig.6A]): an aluminum layer 202, a p-doped layer 107, quantum wells 106, an n-doped GaN layer 105 with an optical index of 2.4, a porous GaN layer 104' with an optical index of 1.9, a transparent conductive oxide layer 301 in ITO with an optical index of 1.91 and an encapsulation layer 302 in SiN with an optical index of 1.95. Compared to the previous example, a porous GaN layer has been added. The thickness of non-porosified GaN is chosen so as to be at a maximum extraction.

[0264] Simulation of luminance at 0° in SiN as a function of porous GaN thickness ([Fig.6B]) confirms that luminance is much more robust to variations thickness of GaN than with the structure of comparative example 1 (i.e. almost independent of the thickness of porous GaN with a value close to the maximum of the case of example 1).

[0265] Example 3: comparative example with an LED structure covered with ITO, SiN and SiO2:

[0266] In this first illustrative example, the LED stack studied successively comprises ([Fig.7A]): an aluminum layer 202, a p-doped layer 107, quantum wells 106, an n-doped GaN layer 105 with an optical index of 2.4, a transparent conductive oxide layer 301 in ITO with an optical index of 1.91, an encapsulation layer 302 in SiN with an optical index of 1.95, an anti-reflection layer 303 in SiO2.

[0267] The simulation of the luminance at 0° in air, located above the layer 303, as a function of the thickness of n-GaN ([Fig.7B]) shows that the luminance depends very strongly on the variations in the GaN thickness.

[0268] Example 4: illustrative example with an LED structure covered with ITO, SiN and SiO2:

[0269] In this example, the LED stack studied successively comprises ([Fig.8A]): an aluminum layer 202, a p-doped layer 107, quantum wells 106, an n-doped GaN layer 105 with an optical index of 2.4, a porous GaN layer 104' with an optical index of 1.9, a transparent conductive oxide layer 301 made of ITO with an optical index of 1.91, an encapsulation layer 302 made of SiN with an optical index of 1.95, an anti-reflection layer 303 made of SiO2.

[0270] The thickness of non-porosified GaN is chosen so as to be at maximum extraction.

[0271] The simulation of the luminance at 0° in air, located above layer 303, as a function of the thickness of porous GaN ([Fig.8B]) confirms that the luminance is much more robust to variations in GaN thickness than with the structure of comparative example 3, i.e. almost independent of the thickness of porous GaN.

[0272] Furthermore, the simulation of the luminance in air as a function of the observation angle for different thicknesses of porous GaN ([Fig.9]) shows that the luminance in air is little impacted by the thickness of porous GaN even at angles other than 0°.

[0273] The 2D simulation of the external quantum efficiency or EQE (in air) of a micro-LED having mesas of size of about Ipm as a function of the GaN thickness was also studied ([Fig. 10]). The microLED is not covered by an encapsulation layer. It should be noted that this simulation represents the global EQE (between 0 and 90°).

[0274] It is interesting to note that the lower the GaN thicknesses, the higher the EQEs and the greater the oscillations as a function of GaN thickness. It is likely that the oscillation effects will be stronger as the space angular will be reduced, for example if the emission considered is between 0 and 18.5° in the axis perpendicular to the plane of the structure.

Claims

Claims

1. A method for manufacturing micro-LEDs comprising at least the following steps: i) providing a stack comprising at least one heavily n-doped GaN layer (104), one n-doped GaN layer (105), quantum wells (106) and one p-doped GaN layer (107) and a first electrode (108), ii) porosifying the heavily n-doped GaN layer (104), whereby a porosified GaN layer is obtained (104'), iii) forming mesas in the stack, iv) covering the porosified GaN layer (104') with a second electrode (301) formed of a conductive transparent oxide layer, the second electrode (301) being in direct contact with the porosified GaN layer (104'), and then, preferably, covering the second electrode (301) with an encapsulation layer (302),or depositing a second electrode (301) on a side face of the porosified GaN layer (104') or on a side face of the n-doped GaN layer (105) and covering the porosified GaN layer (104') with an encapsulation layer (302), the encapsulation layer (302) being in direct contact with the porosified GaN layer (104'), steps ii) and iii) being able to be carried out in the order ii) and iii) or in the order iii) and ii), step ii) being carried out in such a way that the optical index of the porosified GaN layer (104') does not vary by more than 10% with respect to the optical index of the second electrode (301) and / or with respect to the optical index of the encapsulation layer (302).,

2. Method according to claim 1, characterized in that the transparent conductive oxide layer is an indium tin oxide layer and / or in that the encapsulation layer (302) is made of SiN, SiO2 or SiON.

3. Method according to any one of claims 1 to 2, characterized in that the volume concentration of pores in the porosified GaN layer (104') is determined from the following formula: nef f = V(1 - P^GaN+P^air with p the volume concentration of pores, nGaN the optical index of GaN and nair the optical index of air.

4. Method according to one of claims 1 to 3, characterized in that step i) is carried out according to the following steps a) to c): a) providing an initial stack (100) comprising a support layer (101), optionally a buffer layer of (Al,Ga)N (102), an unintentionally doped GaN layer (103), a heavily n-doped GaN layer (104), an n-doped GaN layer (105), quantum wells (106), a p-doped GaN layer (107) and a first electrode (108), b) transferring the first stack onto a support substrate (201) covered by a metal layer (202), c) removing the support layer (101), optionally the buffer layer of (Al,Ga)N (102), the unintentionally doped GaN layer (103), for example by thinning, whereby a substrate of interest is obtained comprising the support substrate (201), the first electrode (108), the p-doped GaN layer (107), the GaN / InGaN quantum wells (106),the n-doped GaN layer (105) and the heavily n-doped GaN layer (104).,

5. Method according to claim 4, characterized in that, before step ii), the method comprises a step during which the doping rate of the highly n-doped GaN layer (104) is decreased locally, for example by implantation of helium or hydrogen ions, so as to have a first part of the highly n-doped GaN layer (104) having a first conductivity and a second part (110) having a second conductivity, the first electrical conductivity being greater by at least a factor of ten than the second electrical conductivity, whereby: - ​​the second part (110) is not porosified during step ii), - the porosified GaN layer (104') of the mesas obtained in step iii) comprises a non-porosified part (110) and a porosified part, the non-porosified part (110) preferably being in the center of the non-porosified part.

6. Method according to claim 4, characterized in that: - the method comprises an additional step between step i) and step ii) during which the highly n-doped GaN layer (104) and a part of the n-doped GaN layer (105) are etched to form a mesa pre-structure, - during step ii), the central part (111) of the highly n-doped GaN layer (104) is not porosified, for example by stopping the porosification step before the total porosification of the heavily doped GaN layer (104), whereby the GaN layer (104') of the mesas obtained in step üi) comprises a non-porosified central part (111) and a porosified periphery, - step iii) is carried out by etching the other part of the n-doped GaN layer (105), the quantum wells (106), the p-doped GaN layer (107), the first electrode (108) and a part of the support substrate (201).

7. Method according to one of claims 1 to 3, characterized in that the method comprises the following successive steps: i) providing a stack comprising a support layer (101), an unintentionally doped GaN layer (103), a heavily n-doped GaN layer (104), an n-doped GaN layer (105), quantum wells (106) and a p-doped GaN layer (107) and a first electrode (108), iii) forming mesas in the stack, by etching the first electrode (108), the p-doped GaN layer (107), the quantum wells (106), the n-doped GaN layer (105), the heavily n-doped GaN layer (104) and a portion of the unintentionally doped GaN layer (103), - implementing step ii), whereby a po-rosified GaN layer (104') is obtained, - transferring the stack obtained onto a support substrate (201) covered by a metal layer (202), - removing the support layer (101), the unintentionally doped GaN layer (103), for example by thinning, whereby a substrate of interest is obtained comprising the support substrate (201), the first electrode (108), the p-doped GaN layer (107), the GaN / InGaN quantum wells (106), the n-doped GaN layer (105) and the heavily n-doped GaN layer (104), - implementing step iv).

8. A micro-LED structure comprising a stack, the stack comprising at least one porosified heavily n-doped GaN layer (104'), an n-doped GaN layer (105), quantum wells (106) and a p-doped GaN layer (107), a first electrode (108), mesas being formed in the stack, the porosified GaN layer (104') being covered and in direct contact with a second electrode (301) formed of an oxide layer transparent conductive, the second electrode (301) preferably being covered by an encapsulation layer (302), or a second electrode (301) being arranged on a side face of the porosified GaN layer (104') or on a side face of the n-doped GaN layer (105), the porosified GaN layer (104') being covered and in direct contact with an encapsulation layer (302), the optical index of the porosified GaN layer (104') not varying by more than 10% with respect to the optical index of the second electrode (301) and / or with respect to the optical index of the encapsulation layer (302).

9. Structure according to claim 8, characterized in that the porosified GaN layer (104') of the mesas comprises a non-porosified central part (110, 111) and a porosified periphery.

10. Structure according to claim 9, characterized in that the central part (110) is lightly doped.

11. Structure according to claim 9, characterized in that the central part (111) is heavily doped.

12. Structure according to one of claims 8 to 11, characterized in that the porosified GaN layer (104') has a thickness of between 100 and 500 nm, preferably between 300 and 500 nm.

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