Electronic device comprising a layer of a 2D material

Abstract

Electronic device comprising a layer of a 2D material. This description relates to an electronic device comprising a stack including, in order from the top face of a substrate (13), a first electrode (17), a layer of a 2D material (25), and a second electrode (27), wherein the top surface and sides of the 2D material layer (25) are completely covered by an encapsulation layer comprising at least the second electrode (27). Figure for the abstract: Fig. 1

Description

Title of the invention: Electronic device comprising a layer of a 2D material Technical field

[0001] The present description generally relates to an electronic device comprising a layer of a 2D material and more particularly to an electronic device comprising a layer of a 2D material between two conductive layers. Prior art

[0002] A 2D material or two-dimensional material is a material consisting of a single monoatomic or monomolecular sheet, or a stack of several superimposed monoatomic or monomolecular sheets, without chemical bonding between two adjacent sheets. In other words, a 2D material is a stack of one or more crystalline planes of the same nature, without chemical bonding between two adjacent planes. In such a material, the successive crystalline planes or sheets are linked only by Van de Waals bonds.

[0003] We are more particularly interested here in 2D materials having state change properties, that is to say having the capacity to switch from a relatively weakly resistive state to a relatively strongly resistive state, and vice versa, under the effect of a polarization. The change of state of a 2D material can be ensured by two electrodes located on either side of the 2D material.

[0004] Electronic devices including such materials can take advantage of the change in resistive state to implement a memory function or a switching function, for example a radiofrequency signal switching function. Summary of the invention

[0005] One embodiment overcomes all or part of the drawbacks of known electronic devices comprising a layer of 2D material.

[0006] One embodiment provides an electronic device comprising a stack comprising, in order from the upper face of a substrate, a first electrode, a layer of a 2D material, and a second electrode, wherein the top surface and the sides of the 2D material layer are entirely covered by an encapsulation layer comprising at least the second electrode.

[0007] According to one embodiment, the encapsulation layer consists solely of the second electrode.

[0008] According to one embodiment, the device comprises, between the layer of the material 2D and the first electrode, an insulating layer and a conductive via passing through the insulating layer, the conductive via being in contact by a first face with said layer of the 2D material and by a second face, opposite the first face, with the first electrode.

[0009] According to one embodiment, the encapsulation layer comprises an insulating layer on and in contact with at least a portion of the sides of the layer of 2D material.

[0010] According to one embodiment, the layer of 2D material is in contact by a first face with the encapsulation layer and by a second face, opposite the first face, with the first electrode.

[0011] According to one embodiment, the second electrode is in contact with only a portion of the layer of the 2D material.

[0012] According to one embodiment, the 2D material is semiconducting.

[0013] According to one embodiment, the 2D material is based on a metal dichalcogenide transitional.

[0014] According to one embodiment, the 2D material is based on molybdenum disulfide.

[0015] According to one embodiment, the layer of the 2D material corresponds to an em stacking of several monolayers of molybdenum disulfide and graphene.

[0016] According to one embodiment, the 2D material is based on hexagonal boron nitride.

[0017] Another embodiment provides a method of manufacturing an electronic device electronics comprising the formation of a stack comprising the following successive steps: - forming a first electrode on the upper face of a substrate; - forming a layer of a 2D material on the upper face of the first electrode; and - forming a second electrode on the upper face of the layer of 2D material, so that the upper face and the sides of the layer of 2D material are entirely covered by an encapsulation layer comprising at least the second electrode. Brief description of the drawings

[0018] These characteristics and advantages, as well as others, will be explained in detail in the following description of particular embodiments given without limitation in relation to the attached figures among which:

[0019] [Fig.lA], [Fig.lB] and [Fig.lC] respectively represent a top view and two partial and schematic sectional views of an electronic device according to a first embodiment;

[0020] [Fig.2A] and [Fig.2B] respectively represent a top view and a view in section, partial and schematic, of an electronic device according to a second embodiment;

[0021] [Fig.3A] and [Fig.3B] respectively represent a top view and a sectional view, partial and schematic, of an electronic device according to a third embodiment; and

[0022] [Fig.4A], [Fig.4B] and [Fig.4C] respectively represent a top view and two partial and schematic sectional views of an electronic device according to a fourth embodiment. Description of the embodiments

[0023] The same elements have been designated by the same references in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same references and may have identical structural, dimensional and material properties.

[0024] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been shown and are detailed. In particular, the control circuits of the memory cells or switching cells described have not been detailed, the production of such control circuits being within the scope of the person skilled in the art from the teachings of the present description.

[0025] Unless otherwise specified, when referring to two elements connected to each other, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") to each other, this means that these two elements can be connected or be connected by means of one or more other elements.

[0026] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "upper", "lower", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made unless otherwise specified to the orientation of the figures.

[0027] Unless otherwise specified, the expressions "about", "approximately", "substantially", and "of the order of" mean to within 10%, preferably to within 5%.

[0028] [Fig.lA], [Fig.lB] and [Fig.lC] respectively represent a top view and two partial and schematic sectional views of an electronic device 11 according to a first embodiment, [Fig.lB] corresponding to the sectional view along the section plane BB illustrated in [Fig.lA] and [Fig.lC] corresponding to the sectional view along the section plane CC illustrated in [Fig.lA].

[0029] The electronic device 11 corresponds, for example, to a memory cell. In practice, several memory cells can be formed side by side, for example in forming a network or matrix with rows and columns.

[0030] The electronic device 11 comprises, from a lower face, a substrate 13. For example, the substrate 13 is a semiconductor substrate. The substrate 13 is for example made of a semiconductor material of high resistivity, for example of resistivity greater than 2.3.103 Qm. The substrate 13 is for example made of silicon.

[0031] The electronic device 11 comprises, for example, an insulating layer 15 covering the upper face of the substrate 13. For example, the insulating layer 15 is in contact, by its lower face with the upper face of the substrate 13. The insulating layer 15 covers, for example, the entire surface of the upper face of the substrate 13. The insulating layer 15 is for example made of an oxide. The insulating layer 15 is for example made of silicon dioxide (SiO2).

[0032] The electronic device 11 further comprises a lower electrode 17 covering at least a portion of the upper face of the insulating layer 15. For example, the lower electrode 17 is in contact, via its lower face, with the upper face of the insulating layer 15. The lower electrode 17 is, for example, made of a conductive material. The lower electrode 17 is, for example, made of a metallic material. For example, the lower electrode 17 is made of titanium, titanium nitride, copper, aluminum, tungsten, nickel and / or a mixture of one or more of these materials.

[0033] For example, the lower electrode 17 is common to several neighboring memory cells, for example the memory cells of the same row.

[0034] The lower electrode 17 is, for example, surrounded laterally by an insulating layer 19 making it possible to insulate the lower electrode 17 from the lower electrodes of neighboring cells. The insulating layer 19 is, for example, made of an oxide. For example, the insulating layer 19 is made of silicon dioxide.

[0035] The electronic device 11 comprises, for example, an insulating layer 21 crossed by a conductive via 23. By way of example, the conductive via 23 has a cylindrical shape comprising an upper face and a lower face of circular shape. For example, the conductive via 23 is flush, by its upper face, with the upper face of the layer 21. Similarly, the conductive via 23 is flush, for example, by its lower face, with the lower face of the layer 21. The insulating layer 21 and the conductive via 23 cover, for example, the upper face of the electrode 17 and the insulating layer 19. For example, the insulating layer 21 and the conductive via 23 are in contact, by their lower faces, with the upper face of the lower electrode 17 and the insulating layer 19. The conductive via 23 is, for example, located directly above the lower electrode 17.For example, the conductive via 23 has a diameter smaller than the width of the lower electrode 17 taken in the plane of [Fig.lC]. The conductive via 23 is for example centered on the lower electrode 17, it. thus only covers a portion of the surface of the upper face of the lower electrode 17. For example, the conductive via 23 is made of a metallic material. The conductive via 23 is, for example, made of platinum and / or nickel. The insulating layer 21 is, for example, made of an oxide. For example, the insulating layer 21 is made of silicon dioxide. The conductive via 23 has, for example, a height of between 100 nm and 1 pm. The via 23 has, for example, a surface cross-section of between 0.01 pm2 and 5 pm2.

[0036] The electronic device 11 further comprises a layer 25 of a 2D material. For example, the layer 25 has, in top view, a square or substantially square shape. The layer 25 covers, for example, the upper face of the conductive via 23 and the insulating layer 21. For example, the layer 25 is in contact by its lower face with the upper face of the conductive via 23 and the insulating layer 21. The layer 25 is for example located directly above the conductive via 23. The layer 25 is for example centered directly above the conductive via 23. For example, the layer 25 covers the entire surface of the upper face of the conductive via 23. The layer 25 is for example localized and does not cover, for example, the entire surface of the upper face of the insulating layer 21.

[0037] By way of example, the layer 25 comprises a stack of one or more monoatomic or monomolecular sheets of the 2D material. By way of example, the layer 25 comprises a number of monoatomic or monomolecular sheets less than 20, for example less than 10, for example less than 5, for example less than 3, for example less than 2, for example equal to 1. By way of example, the layer 25 has a thickness of the order of a few nanometers, for example between 0.1 nm and 10 nm.

[0038] The layer 25 is for example made of a 2D semiconductor material. For example, the layer 25 is made of a transition metal dichalcogenide material or TMD (from the English "Transition Metal Dichalcogenide"), for example of formula MX2 in which "M" corresponds to a transition metal and "X" corresponds to a chalcogen. For example, the layer 25 is made of molybdenum disulfide (MoS2). As a variant, the layer 25 corresponds to a TMD whose transition metal is chosen from the sixth column of the periodic table of elements. As a variant, the layer 25 corresponds to a stack of monolayers of several different 2D materials, for example a stack of monolayers of graphene and molybdenum disulfide, or a stack of several different TMDs.

[0039] As a variant, the layer 25 is made of an insulating material, for example hexagonal boron nitride or h-BN (from the English "hexagonal Boron Nitride").

[0040] As an example, the layer 25 is first formed on a growth substrate and then transferred to the upper face of the insulating layer 21 and the conductive via 23. As an example, the layer 25 is first formed on a growth substrate and then transferred to the upper face of the insulating layer 21 and the conductive via 23. for example, the growth substrate (not shown) of layer 25 is made of silicon dioxide (SiO2) or sapphire in the case of a molybdenum disulfide layer 25. For example, the growth substrate of layer 25 is made of sapphire or copper in the case of a h-BN layer 25.

[0041] The electronic device 11 further comprises an upper electrode 27 completely covering the layer 25. The upper electrode 27 has, for example, the shape of a rectilinear strip extending in a direction orthogonal to the direction in which the lower electrode 17 extends. By way of example, the upper electrode 27 is common to several neighboring memory cells, for example the memory cells of the same column.

[0042] In the example shown, the upper electrode 27 completely covers the upper face and all of the flanks of the layer 25. The upper electrode 27 is for example in contact with the entire upper surface and the entire surface of the flanks of the layer 25. By way of example, the upper electrode 27 further covers the layer 19 in the vicinity of the layer 25. By way of example, the upper electrode 27 covers the layer 19 on either side of the layer 25 over a width 1 greater than 1 nm, for example greater than 10 nm, for example greater than 20 nm, for example greater than 50 nm, for example greater than 100 nm, for example greater than 200 nm, for example greater than 300 nm, for example greater than 400 nm. By way of example, the upper electrode 27 is made of a conductive material. For example, the upper electrode 27 is made of a metallic material. The upper electrode 27 is for example made of titanium nitride.The upper electrode 27 has, for example, a thickness of between 50 nm and 300 nm, for example of the order of 100 nm.

[0043] Similar to what has been described above in connection with the electrode 17, the upper electrode 27 is, for example, surrounded by an insulating layer (not shown) making it possible to insulate the upper electrode 27 of the memory cells of the same column from the upper electrode 27 of the memory cells of the neighboring columns. This insulating layer is for example made of an oxide. By way of example, this insulating layer is made of silicon dioxide.

[0044] By way of example, the layer 25 is located opposite the intersection of the lower electrode 17 and the upper electrode 27.

[0045] In the embodiment of Figures 1A to 1C, the upper electrode 27 forms an encapsulation layer completely covering the upper face and the sides of the layer 25.

[0046] For example, the upper electrode 27 is formed by a localized lift-off deposition process. The formation of the upper electrode 27 thus comprises a step of depositing a sacrificial layer, for example made of resin, on the upper face of the insulating layer 21 and of the layer 25. The sacrificial layer The sacrificial layer is for example made of polymethyl methacrylate or PMMA (from the English "poly(methyl methacrylate)"). After the deposition of the sacrificial layer, it is removed locally at the locations where it is desired to form the upper electrode 27. A step of deposition of the material of the upper electrode 27 is subsequently carried out on the entire upper face of the structure, that is to say on the upper face of the sacrificial layer and in the openings made in this same layer. The last step consists of the removal of the sacrificial layer leading to the removal of the layer of material of the upper electrode 27 when the latter is formed on the sacrificial layer.

[0047] An advantage of the present embodiment is linked to the fact that the upper electrode 27 forms an encapsulation layer completely covering the upper face and the flanks of the layer 25. This makes it possible to avoid delamination of the layer 25 during the formation of the upper electrode 27 in contact with the latter, and more particularly during the removal of the sacrificial layer when the upper electrode 27 is formed by a localized deposition process by lift-off. The inventors have in fact noted that the stresses exerted by the metal of the upper electrode 27 cause delamination of the layer 25 when the flanks of the layer 25 are left free, and that the flanks of the electrode 27 are therefore in contact with the upper face of the layer 25. The contact zone between the layer 25 and the flanks of the metal layer 27 is the place where delamination begins.

[0048] Another advantage of the present embodiment is that it makes it possible to protect the layer 25 from external attacks, for example during subsequent process steps such as oxidation steps.

[0049] Yet another advantage of the present embodiment is that it makes it possible to increase the thickness of the upper electrode 27 in order to increase its conductivity, without increasing the risk of delamination.

[0050] [Fig.2A] and [Fig.2B] respectively represent a top view and a sectional view, partial and schematic, of an electronic device 31 according to a second embodiment, [Fig.2B] corresponding to the sectional view along the section plane BB illustrated in [Fig.2A].

[0051] The electronic device 31 corresponds, for example, to a radiofrequency switch or RF switch.

[0052] The electronic device 31 is for example partly structurally similar to the electronic device 11 illustrated in FIGS. 1A to 1C except for the geometry of the lower electrode 17 and the upper electrode 27.

[0053] For example, in the electronic device 31, the lower 17 and upper 27 electrodes extend, at least locally, in the same direction. For example, the electronic device 31 includes a region in which a end of the lower electrode 17 extends directly above one end of the upper electrode 27 and in which the lower 17 and upper 27 electrodes extend in the same direction but in two opposite directions.

[0054] In [Fig.2A], the lower 17 and upper 27 electrodes are for example shown one perpendicular to the other in a central part, the lower electrode 17 extending to the right in the orientation of [Fig.2A] while the upper electrode 27 extends to the left. For example, in the region perpendicular to the electrodes 27 and 17, the lower electrode 17 has a width less than the width of the upper electrode 27. In this region, the layer 25 has, for example, a width taken in the plane of [Fig.2B], greater than the width of the lower electrode 17 and extends, for example, beyond the perpendicular to the lower electrode 17. The embodiments described are however not limited to this particular configuration.

[0055] In the electronic device 31, the layer 25 is comprised between the upper electrode 27 and the lower electrode 17 and is thus located opposite the end of the upper electrode 27 and opposite the end of the lower electrode 17.

[0056] In this embodiment and similarly to what has been described in relation to the first embodiment illustrated in figures 1A to 1C, the upper electrode 27 completely covers the upper surface and the sides of the layer 25 so as to form an encapsulation layer making it possible to avoid delamination of the layer 25 during the formation of the electrode 27.

[0057] [Fig.3A] and [Fig.3B] respectively represent a top view and a sectional view, partial and schematic, of an electronic device 41 according to a third embodiment [Fig.3B] corresponding to the sectional view along the section plane BB illustrated in [Fig.3A].

[0058] The electronic device 41 is similar to the electronic device 11 illustrated in figures 1A to 1C except that it does not include, between the lower 17 and upper 27 electrodes, a conductive via 23 and that the upper electrode 27 does not cover the entire upper surface of the layer 25.

[0059] The electronic device 41 illustrated in FIGS. 3A and 3B corresponds, for example similarly to what has been described in relation to FIGS. 1A to 1C, to a memory cell.

[0060] In the electronic device 41, the lower electrode 17 is for example in contact, by its upper face, with the lower face of the layer 25.

[0061] By way of example, the upper electrode 27 is formed directly above the layer 25 with a width less than the width of the layer 25 taken in the plane of [Fig.3B]. The upper electrode 27 is thus formed directly above the layer 25 without covering two peripheral strips of the layer 25 located on either side of the upper electrode 27.

[0062] By way of example, the electronic device 41 comprises an insulating layer 43 formed on either side of the upper electrode 27 on the peripheral parts of the layer 25 left free by the upper electrode 27. By way of example, the insulating layer 43 extends in the same direction as the upper electrode 27, i.e. orthogonally to the lower electrode 17. By way of example, the insulating layer 43 comprises two portions. The insulating layer 43 extends for example on either side of the upper electrode 27 from the flanks of the upper electrode 27, extending onto and in contact with the upper face of the layer 25 not covered by the electrode 27. By way of example, the insulating layer 43 extends until it covers the flanks of the layer 25 not covered by the upper electrode 27.For example, the insulating layer 45 also extends over a portion of the upper face of the lower electrode 17 and of the layer 19.

[0063] Thus, in this example, a first portion 431 of the insulating layer 43 is in contact with the left flank of the upper electrode 27 in the orientation of [Fig.3A] and is formed in contact with a part of the layer 25 not covered by the upper electrode 27. By way of example, the first insulating portion 431 extends beyond the opposite side of the layer 25 and extends onto the upper face of the device by covering the flank of the layer 25. By way of example, the portion 431 of the layer 43 extends over a part of the lower electrode 17 and of the layer 19 located in the vicinity of the upper electrode 27.

[0064] Similarly, a second portion 432 of the insulating layer 43 is for example in contact with the right flank of the upper electrode 27 in the orientation of [Fig.3A] and is formed in contact with a part of the layer 25 not covered by the upper electrode 27. By way of example, the second insulating portion 433 extends beyond the opposite side of the layer 25 and extends onto the upper face of the device by covering the flank of the layer 25. By way of example, the portion 433 of the layer 43 extends over a part of the lower electrode 17 and of the layer 19 located in the vicinity of the upper electrode 27.

[0065] By way of example, the insulating layer 43 is made of an oxide, for example silicon oxide.

[0066] The insulating layer 43 is for example formed before the formation of the upper electrode 27. For example, the insulating layer 43 is formed as a full plate so as to cover the entire upper face of the lower electrode 17 and the upper face of the layer 25. The insulating layer 43 is for example formed in contact with the lower electrode 17 and the layer 25. The insulating layer 43 is subsequently, for example, removed locally so as to be kept only opposite two peripheral strips of the layer 25, in the direction orthogonal to the direction of the lower electrode 17. For example, at the end of this step, the insulating layer 43 is only retained on two portions extending simultaneously on the layer 25 and the upper face of the layer 19 and the lower electrode 17. In other words, the insulating layer 43 is removed opposite a central strip of the layer 25. The upper electrode 27 is for example formed after the formation of the insulating layer 43 by a localized deposition process by peeling. The upper electrode 27 is for example formed so as to remain only between the two portions of the layer 43. By way of example, the upper electrode 27 is formed with a thickness greater than the thickness of the layer 43. The upper electrode 27 extends for example on and in contact with a part of the upper face of the layer 43.

[0067] In the embodiment of Figures 3A and 3B, the upper electrode 27 and the insulating layer 43 together form an encapsulation layer completely covering the upper face and the sides of the layer 25. This encapsulation layer, comprising the upper electrode 27, makes it possible to avoid delamination of the layer 25 during the formation of the electrode 27. The insulating layer 43 makes it possible in particular to prevent the upper electrode 27 and the lower electrode 17 from being in direct contact with each other.

[0068] An advantage of the present embodiment is that it makes it possible to reduce the width of the upper electrode 27 and thus reduce the material cost of such a device.

[0069] [Fig.4A], [Fig.4B] and [Fig.4C] respectively represent a top view and two partial and schematic sectional views of an electronic device 51 according to a fourth embodiment, [Fig.4B] corresponding to the sectional view along the section plane BB illustrated in [Fig.4A] and [Fig.4C] corresponding to the sectional view along the section plane CC illustrated in [Fig.4A].

[0070] The electronic device 51 corresponds, for example, to a radiofrequency switch or RF switch.

[0071] The electronic device 51 is for example partly structurally similar to the electronic device 41 illustrated in FIGS. 3A to 3C. The electronic device 51 differs from the device 41 in particular by the geometry of the lower electrode 17 and the upper electrode 27.

[0072] By way of example, in the electronic device 51, and similarly to what is shown which has been described in relation to FIGS. 2A and 2B, the lower 17 and upper 27 electrodes extend, at least locally, in the same direction. The electronic device 51 comprises for example a region in which one end of the lower electrode 17 extends directly above one end of the upper electrode 27 and in which the lower 17 and upper 27 electrodes extend in the same direction but in two opposite directions.

[0073] In the electronic device 51, the layer 25 is between the upper electrode 27 and the lower electrode 17 and more particularly between the ends res- aspects of the upper 27 and lower 17 electrodes.

[0074] In the embodiment of Figures 4A to 4C, the layer 25 has, for example, a width taken in the plane of [Fig.4B], greater than the width of the lower electrode 17. The layer 25 extends in this plane for example beyond the vertical line of the lower electrode 17 by extending over a part of the upper face of the layer 19 in the vicinity of the lower electrode 17.

[0075] By way of example, the upper electrode 27 is in contact with the layer 25. By way of example, the upper electrode 27 covers the upper face of the layer 25, leaving three peripheral parts of the layer 25 free and not covered by the upper electrode 27.

[0076] Similar to what has been described in relation to Figures 3A and 3B, the upper electrode 27 is surrounded, opposite the layer 25, by an insulating layer 45. The insulating layer 45 is for example similar in its composition to the insulating layer 43 illustrated in Figures 3A and 3B. In the embodiment of Figures 4A to 4C, the insulating layer 45 has the shape of a "U" surrounding the end of the upper electrode 27. For example, the layer 45 does not extend along the upper electrode 27 as has been described in relation to Figures 3A and 3B.

[0077] The insulating layer 45 extends for example from the three sides of the upper electrode 27 located opposite the layer 25, extending opposite the layer 25 so as to cover the parts of the layer 25 not covered by the upper electrode 27. The layer 45 further covers the sides of the layer 25 not covered by the upper electrode 27 and extends over a part of the upper face of the layer 19 in the vicinity of the layer 25. For example, in the electronic device 51, the upper electrode 27 and the lower electrode 17 are not in direct contact with each other.

[0078] Here again, the insulating layer 45 and the upper electrode 27 form an encapsulation layer completely covering the upper face and the sides of the layer 25 and making it possible to avoid delamination of the layer 25 during the formation of the upper electrode 27.

[0079] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will occur to those skilled in the art.

[0080] Finally, the practical implementation of the embodiments and variants described is within the reach of those skilled in the art from the functional indications given above.

Claims

Claims

1. Electronic device comprising a stack comprising, in order from the upper face of a substrate (13), a first electrode (17), a layer of a 2D material (25), and a second electrode (27), in which the upper surface and the sides of the layer of the 2D material (25) are entirely covered by an encapsulation layer (27; 27, 43; 27, 45) comprising at least the second electrode (27).

2. A device according to claim 1, wherein the encapsulation layer (27) consists solely of the second electrode (27).

3. Device according to claim 2, comprising, between said layer of 2D material (25) and the first electrode (17), an insulating layer (21) and a conductive via (23) passing through the insulating layer (21), the conductive via (23) being in contact by a first face with said layer of 2D material (25) and by a second face, opposite the first face, with the first electrode (17).

4. An electronic device according to claim 1, wherein the encapsulation layer (27, 43; 27, 45) comprises an insulating layer (43; 45) on and in contact with at least a portion of the sides of the layer (25) of 2D material.

5. Device according to claim 4, in which said layer of 2D material (25) is in contact by a first face with the encapsulation layer (27, 43) and by a second face, opposite the first face, with the first electrode (77).

6. Device according to claim 4 or 5, wherein the second electrode (27) is in contact with only a part of the layer of 2D material (25).

7. A device according to any one of claims 1 to 6, wherein the 2D material is semiconductor.

8. A device according to any one of claims 1 to 7, wherein the 2D material is based on a transition metal dichalcogenide.

9. A device according to claim 8, wherein the 2D material is based on molybdenum disulfide.

10. Device according to any one of claims 1 to 9, in which the layer of 2D material (25) corresponds to a stack of several monolayers of molybdenum disulfide and graphene.

11. A device according to any one of claims 1 to 6, wherein the 2D material is based on hexagonal boron nitride.

12. A method of manufacturing an electronic device comprising the formation of a stack comprising the following successive steps: - forming a first electrode (17) on the upper face of a substrate (13); - forming a layer of a 2D material (25) on the upper face of the first electrode (17); and - forming a second electrode (27) on the upper face of the layer of the 2D material (25), such that the upper face and the sides of the layer of the 2D material (25) are entirely covered by an encapsulation layer (27; 27, 43; 27, 45) comprising at least the second electrode (27).

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