Basic structure of quantum devices and fabrication process

The described structure, with its stacked layers of high-purity 28Si and silicon oxide, addresses the challenge of maintaining isotopic purity and preventing impurity diffusion in silicon wafers for electron spin qubit manipulation, enhancing the coherence duration and reliability of quantum devices.

FR3156988A1Pending Publication Date: 2025-06-20SOITEC SA
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Patent Information

Application Number
FR2023014256
Authority / Receiving Office
FR · FR
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-12-15
Publication Date
2025-06-20

AI Technical Summary

Technical Problem

The challenge is to develop silicon wafers that can serve as substrates for manufacturing devices that manipulate electron spin qubits, while maintaining the isotopic purity of 28Si layers and allowing qubit manipulation at chosen locations, compatible with existing semiconductor technologies.

Method used

A structure comprising a silicon carrier substrate, a first 28Si layer, a silicon oxide layer, and a second 28Si layer, stacked in that order, where the second 28Si layer has a purity of at least 99.92%. This structure acts as a barrier to impurities, ensuring the coherence duration of electrons is sufficient for qubit operations.

Benefits of technology

The proposed structure provides a reliable basis for quantum devices by maintaining high isotopic purity and preventing impurity diffusion, thus extending the spin coherence duration of electrons and enabling efficient qubit manipulation.

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Abstract

Structure (Strc) suitable for forming a quantum device, comprising: a carrier substrate (Car) of silicon; a first layer (Si-L1) of silicon isotope 28Si; a layer (Ox) of silicon oxide; a second layer (Si-L2) of silicon isotope 28Si, the structure being formed by the carrier substrate (Car), the first layer (Si-L1) of silicon isotope 28Si, the layer (Ox) of silicon oxide, and the second layer (Si-L1) of silicon isotope 28Si, stacked in this order, wherein the second layer (Si-L2) of silicon isotope 28Si consists of at least 99.92% of silicon isotope 28Si. Figure to be published with the abstract: Fig. 3
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Description

Title of the invention: Basic structure of quantum devices and manufacturing method TECHNICAL FIELD OF THE INVENTION

[0001] The invention relates to materials and structures capable of forming a basis for electronic devices whose operating principle is based on the manipulation of quantum objects, in particular qubits. TECHNOLOGICAL BACKGROUND

[0002] Silicon is recognized as a promising material for electronic devices based on the manipulation of electron spin, which represents their magnetic moment. Information can in particular be stored and manipulated by acting on the spin of electrons, rather than by using their electric charge as in conventional electronics. The spin of electrons can also be used as a qubit support to put quantum information theory into practice, by exploiting superpositions of spin states with a well-defined phase. Reference may be made to documents EP 3 975 072 A1 and US 2023 / 0026518.

[0003] The duration of retention of the phase, and therefore of the information, is defined by the coherence duration. Long coherence durations are necessary so that operations on the qubits can be performed or so that the quantum information can be stored before a read operation, during which the qubit loses its coherence and the information is lost.

[0004] Silicon has three stable isotopes: 28Si, 29Si, and 30Si, which make up approximately 92.2%, 4.7%, and 3.1% of natural silicon, respectively. One mechanism that causes spin-state decoherence is the presence of 29Si isotopes of silicon, which have a non-zero nuclear magnetic moment. Therefore, it is preferable to eliminate as much as possible the proportion of 29Si in silicon used as the basis for qubit manipulation devices. The 30Si isotope should also be eliminated: although the 30Si isotope has no spin, it causes variations in the bond lengths between atoms and thus in the local environment of the qubits. The homogeneity of the local environment should be maximized so that the qubits have characteristics as close as possible to each other.

[0005] One solution is to use silicon enriched in 28Si isotopes. Shneider et al. (E. Schneider and J. England, “Isotopically Enriched Layers for Quantum Computers Formed by 28Si Implantation and Layer Exchange,” ACS Appl. Mater. Interfaces 2023, 15, 21609-21617) propose a layer enrichment technique of silicon isotope 28Si based on ion implantation of 28Si ions into an aluminum layer grown on a native oxide-free silicon substrate followed by layer exchange crystallization: this results in a high-purity 28Si layer in contact on the silicon substrate. Schneider also explains that defects at the interfaces of the device layers require high-quality dielectrics and / or techniques to distance the qubits from the interfaces and the noise they cause, depending on the geometry of qubit placement, close to or far from the interfaces.

[0006] Spin qubit manipulation devices can be made using silicon as a base and the standard CMOS (Complementary Metal Oxide Semiconductor) or FDSOI (Fully Depleted Silicon On Insulator) manufacturing processes of the semiconductor industry. FDSOI technology allows in particular to control the location of the qubits, far from the interfaces between the silicon and the gate dielectric or the buried oxide layer (BOX for Buried Oxide in English terminology).

[0007] However, SOI (Silicon On Insulator) type substrates having a thin layer of the 28Si isotope of quantum quality silicon do not exist commercially. Here, "quantum quality" means layers of 28Si that are sufficiently pure to bring the spin coherence of the electrons to durations sufficient to carry out operations on the qubits, with a purity of 28Si greater than 99.92%.

[0008] There is thus a need for silicon wafers capable of serving as a substrate for the manufacture of devices for manipulating electron spin qubits, capable of maintaining the isotopic purity of 28Si layers and of allowing the manipulation of qubits at chosen locations, compatible with the type of device envisaged.

[0009] There is also a need for SOI type substrates, Silicon On Insulator in English terminology, comprising a thin layer of 28Si on a substrate, an electrically insulating layer being interposed between the 28Si layer and the substrate. It is advantageous for the thin layer and the electrically insulating layer (also called "BOX" for Buried Oxide) to be sufficiently thin to be able to form so-called FD-SOI or Fully Depleted SOI transistors in English terminology.

[0010] Furthermore, considering that quantum applications require working at very low temperatures, for example below 3 K or of the order of 10 mK, while employing control electronics that are physically as close as possible to the supports of the manipulated quantum quantities, the integration on the same substrate of FD-SOI transistors and quantum quantity manipulation devices is advantageous: the FD-SOI transistors can have a low threshold voltage and operate while limiting the energy dissipation in their support, thus limiting the heating problems of these quantum quantity manipulation devices. Statement of the invention

[0011] The applicant's objective is to provide a structure and a method for manufacturing a semiconductor support capable of forming a base for obtaining devices for manipulating quantum objects, and in particular qubits formed from electron spins.

[0012] To achieve this object, one aspect of the invention is a structure suitable for forming a quantum device, comprising: a silicon carrier substrate; a first silicon isotope 28Si layer; a silicon oxide layer; a second silicon isotope 28Si layer, the structure being formed by the carrier substrate, the first silicon isotope 28Si layer, the silicon oxide layer, and the second silicon isotope 28Si layer, stacked in this order, wherein the second silicon isotope 28Si layer consists of at least 99.92% silicon isotope 28Si.

[0013] A first advantage of the structure is to provide an adequate basis for the development of quantum devices by using technologies already well mastered in the field of semiconductors.

[0014] A second advantage of the structure is that it guarantees the reliability of the devices obtained thanks to the presence of a bilayer of 28Si and 28SiO2 acting as a barrier to undesirable elements contained in the support substrate, such as the 29Si and 30Si isotopes of silicon, or carbon, oxygen or nitrogen atoms. It would indeed be extremely difficult and expensive to produce silicon substrates purely formed from the 28Si isotope of silicon. The available substrates are therefore formed from natural silicon, containing at least the three isotopes 28Si, 29Si and 30Si of silicon, as well as impurities such as carbon, oxygen and nitrogen.

[0015] A third advantage of the structure is that it can be obtained by known methods, adapted to the needs of quantum devices, which accelerates the technological maturity of the manufacturing process involved and reduces the necessary investments in time and equipment.

[0016] According to additional non-limiting characteristics of the support according to the invention, considered individually or according to any technically feasible combination:

[0017] - the second layer of silicon isotope 28Si may comprise less than 800 ppm of silicon isotope 29Si;

[0018] - the first layer of silicon isotope 28Si may consist of at least 99.92% silicon isotope 28Si;

[0019] - the first layer of silicon isotope 28Si may comprise less than 800 ppm of silicon isotope 29Si;

[0020] - the second layer of silicon isotope 28Si may have a thickness of between between 10 and 60 nm, the silicon oxide layer may have a thickness of between 10 and 50 nm, preferably between 15 and 30 nm, and the first layer of silicon isotope 28Si may have a thickness greater than 30 nm, preferably between 30 nm and 250 nm; and

[0021] - the second layer of silicon isotope 28Si may have a thickness of between between 120 and 200 Å, preferably between 140 and 180 Å, the silicon oxide layer may have a thickness of between 120 and 280 Å, preferably between 160 and 240 Å, and the first layer of silicon isotope 28Si may have a thickness greater than 200 nm, preferably between 200 nm and 420 nm.

[0022] The invention extends to a method of manufacturing a structure according to the invention, comprising the steps of: forming a first layer of silicon isotope 28Si on a first substrate; forming a second layer of silicon isotope 28Si on a second substrate; oxidizing the second layer of silicon over a portion of its thickness to form an oxide layer; assembling the first substrate and the second substrate by bringing the first layer of silicon into contact with the oxide layer, the first substrate, the first layer of silicon, the oxide layer and the second layer of silicon being stacked in this order, wherein the second layer of silicon isotope 28Si is made up of at least 99.92% of silicon isotope 28Si.

[0023] According to additional non-limiting characteristics of the structure according to the invention, considered individually or according to any technically feasible combination:

[0024] - the method according to the invention may further comprise a step of forming a embrittlement plane of the second layer by implantation of ions of a light species in a non-oxidized part of the second layer after the oxidation step over a part of its thickness; and a step of a fracture of the second layer at the embrittlement plane and removal of the donor substrate after the assembly step; and

[0025] - the second layer of silicon isotope 28Si may have a thickness of between between 300 nm and 600 nm before the oxidation step. BRIEF DESCRIPTION OF THE FIGURES

[0026] Other characteristics and advantages of the invention will emerge from the detailed description of the invention which follows with reference to the appended figures in which:

[0027] [Fig.l] [Fig.l] illustrates a manufacturing method according to the invention;

[0028] [Fig.2] [Fig.2] illustrates a structure obtained by means of the method of [Fig.l]; And

[0029] [Fig.3] [Fig.3] is a diagram summarizing the manufacturing process of Figures 1 and 2. DETAILED DESCRIPTION OF THE INVENTION

[0030] Embodiment

[0031] A particular embodiment of the present invention is described by means of Figures 1 to 3 and the associated description below.

[0032] [Fig.2] illustrates a Strc structure formed from a carrier substrate Car, a Si-Ll barrier layer, a dielectric Ox layer, and a Si-L2 device layer, stacked in this order, each of these elements preferably being in direct contact with the immediately adjacent element or elements.

[0033] The Si-Ll barrier layer, the Ox oxide layer and the Si-L2 device layer are layers formed from the 28Si isotope of silicon. The Si-Ll and Si-L2 layers in particular have a 28Si purity of at least 99.92%, for example between 99.92% and 99.995%. Thus, the Si-Ll and Si-L2 silicon layers comprise less than 800 ppm of 29Si isotope of silicon.

[0034] Such a structure can be used to form quantum devices on its surface, thanks to the characteristics of the Si-L2 layer of the device: thanks to its 28Si purity, the spin coherence duration of the electrons in this layer is sufficient to perform operations on qubits associated with these electrons. Integrated into a quantum device, the Si-L2 layer therefore represents a good support for qubits.

[0035] In addition, the Si-L1 barrier layer and the Ox oxide layer prevent, or at least limit, the migration of impurities, and in particular of atoms of the silicon isotope 29Si from the support substrate Car to the Si-L2 layer of the device. Without a barrier layer, the impurity diffusion phenomenon would increase the concentrations of 29Si, 30Si or other dopants, to levels incompatible with the quantum quality necessary for the proper functioning of quantum devices. Thus leading to a reduction in coherence times and causing these devices to operate in a similar manner to devices formed within conventional substrates for FD-SOI transistors.

[0036] [Fig. 1] illustrates in (A) the formation of the Si-Ll layer on the carrier substrate Car, during a step 310Car- In the context of this example, the carrier substrate Car is made of a monocrystalline silicon wafer, but any other support conventionally used in the semiconductor industry could be used. The Si-Ll barrier layer is grown, for example by epitaxy, on one face of the carrier substrate Car.

[0037] [Fig.l] illustrates in (B) the formation of the Si-L2 layer on the donor substrate Don, during a step 310Don. In the context of this example, the donor substrate Don consists of a monocrystalline silicon wafer, but any other support conventionally used in the semiconductor industry could be used. The Si-L2 device layer is grown, for example by epitaxy, on one side of the donor substrate Don.

[0038] The Si-L1 and Si-L2 layers are grown so that they have purities of silicon isotope 28 of between 99.920% and 99.995%. Thus, the maximum concentrations of silicon isotope 29 in these layers are, at least initially, between 800 and 50 ppm, concentrations low enough to allow the fabrication of quantum devices based on the spin of electrons on the Si-L2 layer of the device. Such compositions of the Si-L1 and Si-L2 layers can be achieved by using, in a conventional epitaxial growth process, silane gas of a purity corresponding to that of the 28Si layers, as a precursor gas for the silicon of the layers.

[0039] [Fig.l] illustrates in (C) a partial oxidation, over a certain depth, of the Si-L2 layer to form an Ox layer of silicon oxide SiO2, during an oxidation step 320Don. This operation can be carried out conventionally by applying a heat treatment under an oxygen atmosphere, during an oxidation step 320Don. The Ox layer is preferably formed by thermal oxidation so as to ensure a good quality interface between the oxide layer formed and the Si-L2 layer on the one hand and the Si-Ll layer on the other hand, after bonding. Naturally, it is a silicon oxide formed from oxygen and the 28Si isotope of the silicon of the Si-L2 layer. The Si-L2 layer is only oxidized over a certain thickness, strictly less than its thickness and depending on the thickness targeted for the Ox layer.Furthermore, the Ox layer can also be formed by HDP-CVD type deposition (HDP-CVD for High Density Plasma CVD), which is carried out at a relatively low temperature compared to thermal oxidation, which advantageously makes it possible to limit the thermal budget imposed on the Si-L2 layer, and thereby limit the diffusion of other Si isotopes in the layer intended to contain the quantum object manipulation devices.

[0040] [Fig.l] also illustrates in (C) an implantation of light species such as hydrogen, helium, or a combination of such species in the non-oxidized part of the Si-L2 layer through the oxide Ox layer, so as to form a weakening plane Frg in the thickness of the non-oxidized part of the Si-L2 layer, during a step 330Don.

[0041] Following the formation of the embrittlement plane Frg, the donor substrate Don is turned over and the oxide layer Ox is brought into intimate contact with the Si-Ll layer of the carrier substrate Car and is assembled there, for example by molecular bonding or any other assembly technique by bringing into direct contact surfaces of elements to be assembled, so as to obtain the structure illustrated in (D) of [Fig.l], during of a step 340.

[0042] [Fig. 1] illustrates in (E) the fracture of the Si-L2 device layer at the weakening plane Frg obtained by ion implantation, so that the donor substrate Don and a Si-L2H portion is removed from the structure illustrated in (C) while a portion of the Si-L2 device layer remains attached thereto, during a removal fracture step 350. This fracture can be obtained by heat treatment, possibly assisted by mechanical stress to initiate the fracture, according to conventional layer transfer techniques well known in the field of microelectronics, such as the so-called "Smart Cut" process. Following the assembly and fracture of the donor substrate, a heat treatment can be applied so as to consolidate the assembly and repair the assembled layers.

[0043] An alternative to the formation of a weakening plane and the fracture of the Si-L2 layer at this plane may consist of thinning the donor substrate Don after its assembly, for example by etching, grinding and / or chemical mechanical polishing (CMP). This thinning may be used to completely remove the second substrate Don, and possibly a portion of the Si-L2 layer to achieve the desired thickness for this layer.

[0044] A step 360 of finishing the surface of the Si-L2 layer follows step 350, by one or more mechanical and / or chemical attacks of thinning the Si-L2 layer to a desired thickness and polishing its accessible face. At the end of this step, the Strct structure illustrated by [Fig.2] is obtained.

[0045] The thicknesses of the Ox and Si-L1 layers can be chosen so as to guarantee an adequate level of barrier effect to avoid contamination of the Si-L2 layer of the device by, in particular, 29Si, while limiting the thickness of the Ox oxide layer, for example for an application based on FD-SOI technology which requires a thin Ox layer. Thus, the inventors were able to determine by computer simulation sets of thicknesses for the Si-L1, Ox and Si-L2 layers, making it possible to guarantee a certain level of purity of the Si-L2 layer while advantageously minimizing the thickness of the Si-L1 layer for a given thickness of the Ox layer, chosen for its compatibility with conventional processes of FD-SOI technology.

[0046] Table Tabl indicates such thickness sets for two purity levels, at 99.9% and 99.99% of 28Si for the Si-L2 layer. The numerical simulations were calculated considering that the Si-L1 layer has a purity level of 99.99% of 28Si. These calculations take into account, in particular, a thermal budget corresponding to that of the production of Strc substrates and the conventional manufacture of an FD-SOI transistor, which is the highest thermal budget undergone by the layers, which includes the fabrication steps of CMOS transistors and qubit devices formed in the Si-L2 layer. Si-L2 thickness (after transfer) Ox thickness Si-Ll thickness for a 99.9% Si-L2 layer Si-Ll thickness for a 99.99% Si-L2 layer 16 nm 50 nm 30 nm 250 nm 16nm 20 nm 200 nm 420 nm

[0047] Tab. 1

[0048] It should be noted that before steps 320, 350 and 360 of oxidation, fracturing and finishing of the Si-L2 layer, the latter may have a thickness of the order of 400 nm, preferably between 300 nm and 600 nm, so as to guarantee that after these steps it is possible to obtain a Si-L2 layer of approximately 16 nm with the desired purity in 28Si.

[0049] The thicknesses typically used in FD-SOI type technologies are between 10 and 60 nm for the active layer, which here corresponds to the Si-L2 layer of the device, and between 10 and 50 nm for the Ox oxide layer, often around 20 nm thick.

[0050] The invention is not limited to the embodiment described above and variations may be made thereto without departing from the scope of the invention as defined by the claims.

Claims

Claims

1. Structure (Strc) suitable for forming a quantum device, comprising: - a carrier substrate (Car) of silicon; - a first layer (Si-Ll) of silicon isotope 28Si; - a layer (Ox) of silicon oxide; - a second layer (Si-L2) of silicon isotope 28Si, the structure being formed by the carrier substrate (Car), the first layer (Si-Ll) of silicon isotope 28Si, the layer (Ox) of silicon oxide, and the second layer (Si-Ll) of silicon isotope 28Si, stacked in this order, wherein the second layer (Si-L2) of silicon isotope 28Si consists of at least 99.92% of silicon isotope 28Si.

2. A structure (Strc) for forming a quantum device according to claim 1, wherein the second layer (Si-L2) of silicon isotope 28Si comprises less than 800 ppm of silicon isotope 29Si.

3. A structure (Strc) for forming a quantum device according to claim 1 or 2, wherein the first layer (Si-Ll) of silicon isotope 28Si is made of at least 99.92% of silicon isotope 28Si.

4. A structure (Strc) for forming a quantum device according to any one of claims 1 to 3, wherein the first layer (Si-Ll) of silicon isotope 28Si comprises less than 800 ppm of silicon isotope 29Si.

5. Structure (Strc) for forming a quantum device according to any one of claims 1 to 4, in which the second layer (Si-L2) of silicon isotope 28Si has a thickness of between 10 and 60 nm, the layer (Ox) of silicon oxide has a thickness of between 10 and 50 nm, preferably between 15 and 30 nm, and the first layer (Si-Ll) of silicon isotope 28Si has a thickness greater than 30 nm, preferably between 30 nm and 250 nm.

6. Structure (Strc) for forming a quantum device according to any one of claims 1 to 4, in which the second layer (Si-L2) of silicon isotope 28Si has a thickness of between 120 and 200 Å, preferably between 140 and 180 Å, the layer (Ox) of silicon oxide has a thickness of between 120 and 280 Å, preferably between 160 and 240 Å, and the first layer (Si-Ll) of silicon isotope 28Si has a thickness greater than 200 nm, preferably between 200 nm and 420 nm.

7. A method (300) of manufacturing a structure according to any one of claims 1 to 6, comprising the steps of: - forming (310Car) a first layer of silicon isotope 28Si on a first substrate (Car); - forming (310Don) a second layer of silicon isotope 28Si on a second substrate (Don); - oxidizing (320Don) the second layer of silicon over a portion of its thickness to form an oxide layer (Ox); - assembling (340) the first substrate (Car) and the second substrate (Don) by bringing the first silicon layer (Si-Ll) into contact with the oxide layer (Ox), the first substrate (Car), the first silicon layer (Si-Ll), the oxide layer (Ox) and the second silicon layer (Si-L2) being stacked in this order, wherein the second layer (Si-L2) of silicon isotope 28Si is made up of at least 99.92% of silicon isotope 28Si.

8. The method according to claim 7, further comprising: - a step (330Don) of forming a weakening plane of the second layer (Si-L2) by implanting ions of a light species in a non-oxidized part of the second layer (Si-L2) after the step (320Don) of oxidation over a part of its thickness; and - a step (350) of fracturing the second layer (Si-L2) at the weakening plane and removing the donor substrate (Don) after the assembly step (340).

9. The method according to claim 7 or 8, wherein the second layer of silicon isotope 28Si has a thickness of between 300 nm and 600 nm before the oxidation step (320Don).

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