Electronic device for capturing infrared radiation and displaying images

Abstract

Electronic device for capturing infrared radiation and displaying images The present description relates to an electronic device (100) for capturing and displaying images comprising a plurality of pixels (PIX) formed in and on a semiconductor substrate (101), each pixel comprising: – a detection element (103) for infrared radiation (105), located on the side of a first face (101F) of the semiconductor substrate (101); – an emission element (107) for visible light (109), located on the side of a second face (101R) of the semiconductor substrate opposite the first face; and – a circuit located in and on the semiconductor substrate and connecting the detection element to the emission element. Figure for abstract: Fig. 1

Description

Title of the invention: Electronic device for capturing infrared radiation and displaying images Technical field

[0001] The present description relates generally to electronic devices, and in particular to electronic devices for capturing and displaying images. Prior art

[0002] Electronic devices capable of implementing image capture and display functions have been proposed. Such devices typically comprise an image sensor, comprising an array of image capture pixels, and an image display, comprising an array of image display pixels distinct from the image capture pixels.Depending on the application, the image capture and display pixel matrices of the device may be located on the same side of a semiconductor substrate, for example in the case of a mobile phone, a connected watch or an electronic tablet comprising a display screen integrating an image sensor intended to acquire fingerprints of a user, or be located respectively on either side of the semiconductor substrate, for example in the case of a head-mounted display, a head-up display or smart glasses comprising one or more display screens intended to be placed each facing an eye of a user and one or more image sensors facing outwards.

[0003] Existing electronic image capture and display devices, however, suffer from various drawbacks. In particular, in these devices, the pixels of the image sensor are typically connected to a control circuit and a reading circuit, and the pixels of the image display are connected to a control circuit different from the control and reading circuits of the pixels of the image sensor. These circuits, which are for example located at the periphery of the pixel matrices of the sensor and of the image display, implement addressing functions of the pixel matrices to which they are respectively connected, and the images acquired by the sensor are for example stored in a memory circuit before being displayed, possibly after processing. This introduces an undesirable latency time between the acquisition of an image by the sensor and the display of the corresponding image by the display.Furthermore, existing electronic image capture and display devices exhibit high complexity, size, weight, power consumption, and manufacturing cost. Summary of the invention

[0004] It would be desirable to overcome all or part of the disadvantages of existing electronic image capture and display devices. In particular, there is a need to reduce the weight, size, complexity, energy consumption, manufacturing costs and / or latency time of these devices.

[0005] For this, one embodiment provides an electronic device for capturing and displaying images comprising a plurality of pixels formed in and on a semiconductor substrate, each pixel comprising: - an element for detecting infrared radiation, located on the side of a first face of the semiconductor substrate; - a visible light emitting element, located on the side of a second face of the semiconductor substrate opposite the first face; and - a circuit located in and on the semiconductor substrate and connecting the detection element to the emission element.

[0006] According to one embodiment, the circuit comprises: - an acquisition circuit located in and on the semiconductor substrate and adapted to provide an acquisition signal representative of an intensity of the infrared radiation received by the detection element of the pixel; and - a control circuit located in and on the semiconductor substrate and adapted to apply a control signal to the emitting element of the pixel.

[0007] According to one embodiment, the acquisition circuit and the control circuit are analog circuits.

[0008] According to one embodiment: - each detection element comprises an inorganic photodetector; - each acquisition circuit comprises a comparator having an inverting input connected to a conduction electrode of the photodetector; and - each control circuit comprises an inverter having an input connected to an output of the comparator and an output connected to a gate of a MOS transistor, the MOS transistor comprising a conduction electrode connected to the emission element.

[0009] According to one embodiment: - each detection element comprises a single-photon avalanche diode; - each acquisition circuit comprises a Schmitt trigger having an input connected to a conduction electrode of the single-photon avalanche diode; and - each control circuit comprises an inverter having an input connected to an output of the Schmitt trigger and an output connected to a gate of a MOS transistor, the MOS transistor comprising a conduction electrode connected to the emission element.

[0010] According to one embodiment, the detection elements are located opposite the emission elements.

[0011] According to one embodiment, the detection elements and the emission elements are arranged respectively in first and second matrices, the first and second matrices having substantially identical pitches.

[0012] According to one embodiment, each emission element comprises at least one light-emitting diode.

[0013] According to one embodiment, the light-emitting diode is controlled by a control signal having an average value substantially proportional to an intensity of the infrared radiation detected by the detection element.

[0014] According to one embodiment, the light-emitting diode is controlled by a control signal having pulses repeating at a frequency substantially proportional to an intensity of the infrared radiation detected by the detection element.

[0015] According to one embodiment, the device comprises as many detection elements as emission elements.

[0016] One embodiment provides an electronic apparatus comprising: - a power supply circuit; and - at least one device as described above.

[0017] One embodiment provides a method of manufacturing a device as described above, the method comprising a step of transferring, by molecular bonding, a structure comprising the detection elements and the circuits onto another structure comprising the emission elements. Brief description of the drawings

[0018] These characteristics and advantages, as well as others, will be explained in detail in the following description of particular embodiments given without limitation in relation to the attached figures among which:

[0019] [Fig.l] is an isometric, schematic and partial view of an image capture and display device according to one embodiment;

[0020] [Fig.2] is an equivalent electrical diagram of a pixel of the device of [Fig.l] according to one embodiment;

[0021] [Fig.3] is an equivalent electrical diagram of a pixel of the device of [Fig.l] according to another embodiment;

[0022] [Fig.4] is a timing diagram illustrating, schematically and partially, an example of operation of the pixel of [Fig.3];

[0023] [Fig.5] is an equivalent electrical diagram of a pixel of the device of [Fig.l] according to yet another embodiment;

[0024] [Fig.6] is a timing diagram illustrating, schematically and partially, a example of operation of the pixel in [Fig.5];

[0025] [Fig.7A], [Fig.7B], [Fig.7C], [Fig.7D], [Fig.7E], [Fig.7F], [Fig.7G], [Fig.7H], [Fig.7I] and [Fig.7J] illustrate, by means of schematic and partial sectional views, structures obtained at the end of steps of a method of manufacturing the device of [Fig.1] according to one embodiment;

[0026] [Fig.8] is a schematic and partial side view of an example implementing the device of [Fig.l] in an electronic device; and

[0027] [Fig.9] is a schematic and partial side view of another example of implementation of the device of [Fig.l] in an electronic device. Description of the embodiments

[0028] The same elements have been designated by the same references in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same references and may have identical structural, dimensional and material properties.

[0029] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been shown and are detailed. In particular, the various applications of the electronic image capture and display devices of the present description will not be detailed, the described embodiments being compatible with all or most of the applications likely to benefit from an electronic image capture and display device, possibly subject to adaptations within the scope of the person skilled in the art upon reading the present description.

[0030] Unless otherwise specified, when referring to two elements connected to each other, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") to each other, this means that these two elements can be connected or be connected by means of one or more other elements.

[0031] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "upper", "lower", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.

[0032] Unless otherwise specified, the expressions “about”, “approximately”, “substantially”, and “of the order of” mean to within 10%, preferably to within 5%.

[0033] In the following description, the qualifiers “insulator” and “conductor” mean respectively, unless otherwise specified, electrically insulating and electrically conductive.

[0034] The expression "transmittance of a layer" designates a ratio between an intensity of radiation leaving the layer and an intensity of radiation entering the layer. In the remainder of the description, a layer is said to be opaque to radiation when its transmittance is, for this radiation, strictly less than 40%, preferably less than or equal to 25%, more preferably less than or equal to 10%. Furthermore, a layer is said to be transparent to radiation when its transmittance is, for this radiation, greater than or equal to 40%, preferably greater than or equal to 75%, more preferably greater than or equal to 90%. The definition of the qualifiers opaque and transparent above is not limited to the case of a layer, but applies more generally to any element likely to be exposed to radiation, for example a substrate, a region, a stack of several layers, etc.

[0035] In the present description, the expression "visible light" designates electromagnetic radiation whose wavelength is between 400 nm and 700 nm. Furthermore, the expression "infrared radiation" designates electromagnetic radiation whose wavelength is between 700 nm and 1 mm. In the infrared range, near infrared radiation has a wavelength between 700 nm and 1.7 pm.

[0036] [Fig.l] is an isometric, schematic and partial view of an image capture and display device 100 according to one embodiment.

[0037] According to this embodiment, the image capture and display device 100 comprises a plurality of pixels PIX formed in and on a semiconductor substrate 101.

[0038] Each pixel PIX of the device 100 comprises a detection element 103 of a radiation 105 and, associated with the detection element 103, an emission element 107 of a radiation 109. The detection elements 103 and emission elements 107 are respectively located on either side of the semiconductor substrate 101. More precisely, in the illustrated example, the detection elements 103 are located on the side of a face 101F of the substrate 101 and the emission elements 107 are located on the side of a face 101R of the substrate 101, opposite the face 101F. For the purpose of simplifying the drawing, each detection element 103 and each emission element 107 has been symbolized, in [Fig.l], by a parallelepiped having, in top view, a periphery of substantially square shape. This example is however not limiting, each detection element 103 or emission element 107 being able, as a variant, to have any shape, for example cylindrical.For example, the detection element 103 is of the inorganic type, that is to say that the detection element 103 is devoid of or- materials. organic.

[0039] The expression "active region" of an optoelectronic component, in particular an electroluminescent component of a display sub-pixel or a photodetector, designates a region from which the majority of the electromagnetic radiation provided by the optoelectronic component is emitted or the region from which the majority of the electromagnetic radiation received by the optoelectronic component is captured. An optoelectronic component is said to be inorganic when the active region of the optoelectronic component is predominantly, preferably entirely, made of at least one inorganic material or a mixture of inorganic materials.

[0040] In the illustrated example, the pixels PIX of the device 100 are arranged in a matrix according to rows and columns. More precisely, in this example, the detection elements 103 are arranged in a matrix according to rows and columns. Similarly, the emission elements 107 are, in this example, arranged in a matrix according to rows and columns. In each of these matrices, the rows are for example substantially orthogonal to the columns. This example is however not limiting, the rows being able, as a variant, not to be orthogonal to the columns.

[0041] By way of example, the device 100 comprises as many detection elements 103 as emission elements 107.

[0042] In the example shown, the matrix of emission elements 107 has a pitch, that is to say a center-to-center distance between two adjacent emission elements 107, substantially equal to the pitch of the matrix of detection elements 103, that is to say substantially equal to a center-to-center distance between two adjacent detection elements 103. Furthermore, in this example, the emission elements 107 are located opposite the detection elements 103. In the example illustrated, the center of each emission element 107 is located substantially directly above the center of the detection element 103 located opposite. The emission elements 107 have, for example, in top view, lateral dimensions substantially equal, apart from manufacturing dispersions, to those of the detection elements 103.This example is however not limiting, the emission elements 107 being able, as a variant, to have different lateral dimensions, for example greater or lesser, than those of the detection elements 103. The respective dimensions, for example the respective surfaces, of the detection elements 103 and emission elements 107 are for example chosen as a function of a desired sensitivity on the side of the detection elements 103 and / or an intensity to be achieved on the side of the emission elements 107.

[0043] By way of example, the radiation 105 captured by the detection elements 103 is infrared radiation, for example near infrared radiation. Furthermore, the radiation 109 emitted by the emission elements 107 is for example visible light.

[0044] [Fig.2] is an equivalent electrical diagram of a pixel PIX of the device 100 of [Fig.l] according to one embodiment.

[0045] In the example shown, the detection element 103 of the pixel PIX comprises a photodetector 201 adapted to capture the radiation 105. The photodetector 201 is for example adapted to produce, under the effect of the incident radiation 105, a current Iph, also called photocurrent. The photocurrent Iph is for example substantially proportional to an intensity, or to a flux, of the radiation 105 captured by the photodetector 201. In the example illustrated, the photodetector 201 comprises a first conduction terminal, for example an anode electrode, connected to a node 203 for applying a reference potential, for example ground. The photodetector 201 further comprises, in this example, a second conduction terminal, for example a cathode electrode, connected to a circuit 205. By way of example, the photodetector 201 is a photosensitive diode, or photodiode.

[0046] In the illustrated example, the circuit 205 comprises an acquisition circuit 207, also called a conditioner or conditioning circuit. The acquisition circuit 207 is for example adapted to provide an acquisition signal representative of the intensity of the radiation 105 captured by the photodetector 201. The acquisition signal produced by the acquisition circuit 207 is for example a function of the photocurrent Iph, for example substantially proportional to the photocurrent Iph. As a variant, the acquisition signal is a function of a voltage across the terminals of the photodetector 201, for example substantially proportional to this voltage.

[0047] The acquisition circuit 207 makes it possible, for example, to amplify the photocurrent Iph and to provide a voltage for driving the emission element 107. For these purposes, the acquisition circuit 207 comprises, for example, an amplifier symbolized, in [Fig. 2], by a transistor. For example, the amplifier is of the CTIA type (from the English “Capacitive Trans-Impedance Amplifier” - capacitive transimpedance amplifier).

[0048] In the example shown, the circuit 205 of the pixel PIX further comprises a control circuit 209, or driving circuit. The control circuit 209 is for example adapted to apply a control signal to the emission element 107. The control signal provided by the control circuit 209 is for example a function of the acquisition signal, for example substantially proportional to the acquisition signal.

[0049] In the example shown, the acquisition circuit 207 and the control circuit 209 each receive a calibration signal cal. The calibration signal cal makes it possible, for example, to compensate for manufacturing dispersions between the pixels PIX of the image capture and display device 100, for example manufacturing dispersions affecting the detection element 103 and / or the emission element 107 of the pixels PIX. In practice, the acquisition circuit 207 receives, for example, a calibration signal different from that received by the control circuit 209. The calibration signal cal has, for example, a determined value, for each pixel PIX, at the end of a calibration step subsequent to manufacturing steps of the image capture and display device 100. As a variant, the calibration signal cal can be omitted.

[0050] In the example illustrated, the emission element 107 of the pixel PIX comprises a light-emitting diode 211 adapted to emit the radiation 109. The light-emitting diode 211 is for example more precisely adapted to emit the radiation 109 when it is traversed by a lied current, corresponding for example to the control signal applied by the control circuit 209. The lied current has for example an intensity substantially proportional to that of the photocurrent Iph, for example substantially proportional to the intensity of the radiation 105 captured by the photodetector 201. In the example illustrated in [Fig.2], the light-emitting diode 211 comprises a first conduction terminal, for example an anode electrode, connected to the circuit 205, for example to an output of the control circuit 209.The light-emitting diode 211 further comprises, in this example, a second conduction terminal, for example a cathode electrode, connected to a node 213 for applying a potential -Vk, for example a low potential. The light-emitting diode 211 is for example an inorganic light-emitting diode. The diode 211 is for example of the micro-LED type, that is to say that it has micrometric dimensions.

[0051] In the case where the lied current has an intensity substantially proportional to that of the photocurrent Iph, the acquisition circuits 207 and control 209 are for example analog circuits. In this case, the circuit 205 is in particular devoid of an analog-digital converter.

[0052] [Fig. 3] is an equivalent electrical diagram of a pixel PIX of the device 100 of [Fig. 1] according to another embodiment. The equivalent electrical diagram illustrated in [Fig. 3] corresponds more precisely to a case in which the circuit 205 of the pixel PIX is adapted to control the emission element 107 by a pulse signal.

[0053] The diagram of [Fig. 3] includes elements in common with the diagram of [Fig. 2]. These common elements will not be detailed again below. In particular, the detection 103 and emission 107 elements of the diagram of [Fig. 3] are for example identical to those of the diagram of [Fig. 2].

[0054] In the example shown, the acquisition circuit 207 of the pixel PIX comprises a comparator 301 comprising an inverting input (-) connected to a node 303 of the acquisition circuit 207, a non-inverting input (+) connected to a node 305 for applying a reference potential Vref, and an output connected to a node 307 of the acquisition circuit 207. In the example shown, the cathode of the photodetector 201 is connected to node 303. Nodes 303 and 307 of acquisition circuit 207 constitute, for example, respectively input and output terminals of acquisition circuit 207. In the example illustrated, nodes 303 and 307 respectively have potentials Vsn and Vo.

[0055] In the example shown, the acquisition circuit 207 further comprises a capacitive element 309, for example a capacitor, connecting the node 303 to another node 311 for applying a reference potential, for example ground. The capacitor may be substituted or supplemented by a parasitic capacitance of the node 303. In the example shown, the acquisition circuit 207 further comprises a transistor 313, for example a MOS (Metal-Oxide-Semiconductor) transistor. In this example, the transistor 313 is more precisely an N-type MOS transistor (NMOS transistor). In the example shown, the transistor 313 comprises a conduction terminal, for example a source electrode, connected to the node 303, another conduction terminal, for example a drain electrode, connected to a node 315 for applying a supply potential Vdd, and a control terminal, for example a gate electrode, connected to the node 307.The potential Vdd is for example strictly greater than the potential Vref.

[0056] In the example illustrated, the control circuit 209 comprises an inverter 317 and a transistor 319. The inverter 317 comprises for example an input connected to the node 307 of the acquisition circuit 207 and an output connected to a control terminal, for example a gate electrode, of the transistor 319. The transistor 319 is for example more precisely a P-type MOS transistor (PMOS transistor). In the example shown, the PMOS transistor 319 comprises a conduction terminal, for example a drain electrode, connected to the anode of the light-emitting diode 211 and another conduction terminal, for example a source electrode, connected to a node 321 for applying a supply potential Va.

[0057] By way of example, the light-emitting diode 211 is controlled by a control signal having an average value substantially proportional to the intensity of the radiation 105.

[0058] [Fig.4] is a timing diagram illustrating, schematically and partially, an example of operation of the pixel PIX of [Fig.3]. The timing diagram of [Fig.4] comprises curves 401 and 403 illustrating an example of evolution, as a function of time (t), of the potentials Vsn and Vo, respectively.

[0059] Between an instant t0 and an instant t1, subsequent to the instant t0, the photodetector 201 is exposed to the radiation 105 and produces the photocurrent Iph. During this period, the photocurrent Iph is integrated by the capacitive element 309. The charges photogenerated by the photodetector 201 accumulate at the node 303, thus causing a drop in the potential Vsn. In the example illustrated, the potential Vsn of node 303 has, between times t0 and t1, a value between that of potential Vdd and that of potential Vref. Between times t0 and t1, the potential Vo of node 307 connected to the output of comparator 301 is for example at a low level.

[0060] At time t1, the potential Vsn reaches a value substantially equal to that of the reference potential Vref. This causes a switching of the output of the comparator 301, therefore a transition of the potential Vo from the low level to a high level. The transistor 313 is then controlled to the on state, which has the effect of connecting the node 303 to the node 315. The photogenerated charges accumulated at the node 303 between times t0 and t1 are thus evacuated to the node 315. This tends to bring the potential Vsn back to a value substantially equal to that of the supply potential Vdd.

[0061] At a time t2, after time tl, the potential Vsn becomes higher than the potential Vref. This causes the output of comparator 301 to switch, causing a transition of the potential Vo from the high level to the low level. Curve 403 thus illustrates a pulse of the potential Vo between times tl and t2.

[0062] Between the instant t2 and an instant t3, subsequent to the instant t2, the curve 403 illustrates several other pulses of the potential Vo similar to that present between the instants t1 and t2. These pulses result, as explained above, from successive charges and discharges of the capacitive element 309 when the photodetector 201 is subjected to the radiation 105 and produces the photocurrent Iph. The pulses that the curve 403 comprises between the instants t0 and t3 are repeated for example periodically, for example at a frequency fh.

[0063] Between an instant t4, subsequent to the instant t3, and an instant t5, subsequent to the instant t4, the curve 403 illustrates still other pulses of the potential Vo, for example analogous to the pulses present between the instants t0 and t3.

[0064] The pulses of the potential Vo between the times t4 and t5 differ for example from the pulses of the potential Vo between the times t0 and t3 in that they are repeated periodically at a frequency fl strictly lower than the frequency fh. This comes for example from the fact that the photodetector 201 produces, during an LF phase between the times t4 and t5, a weaker photocurrent Iph, for example resulting from a drop in intensity of the radiation 105, than during another HF phase between the times t0 and t3.

[0065] In the example shown, the frequencies fh and fl are representative of the photocurrent Iph, for example substantially proportional to the photocurrent Iph. The frequencies fh and fl are for example substantially proportional to the intensity, or to the flux, of the radiation 105 captured by the photodetector 201. The light-emitting diode 211 is for example thus controlled by a periodic signal of frequency substantially proportional to the intensity of the radiation 105 captured by the photodetector 201.

[0066] As an example, the sensitivity of the pixel PIX is adjusted by modifying the value of the reference potential Vref, which limits the extent of the variation range of the potential Vsn. In the example shown, for the same intensity value of the radiation 105, the closer the value of the potential Vref is to that of the potential Vdd, the higher the variation frequency of the potential Vo. Conversely, the further the value of the potential Vref is from that of the potential Vdd, the lower the variation frequency of the potential Vo.

[0067] The embodiments of the circuit 205 of the pixel PIX are not limited to the examples of the detection 207 and control 209 circuits shown, and the person skilled in the art is capable, based on the indications of the present description, of providing detection and control circuits different from those set out in relation to FIGS. 3 and 4. By way of example, a counter or a frequency divider may be provided in the control circuit 209 in order to allow an adjustment of the variation frequency of the potential Vo for each pixel PIX independently of the other pixels PIX. The adjustment is then for example carried out in the factory, for example at the end of manufacturing steps of the device 100, and for example implements a step of storing calibration values ​​in memory circuits of the device 100, for example memory circuits of the ROM (Read-Only Memory) or flash type.This avoids the presence of addressing circuits in the device 100. Other types of circuits, for example logarithmic response circuits, could also be provided.

[0068] [Fig. 5] is an equivalent electrical diagram of a pixel PIX of the device 100 of [Fig. 1] according to yet another embodiment. The equivalent electrical diagram illustrated in [Fig. 5] corresponds more precisely to a case in which the detection element 103 of the pixel PIX comprises a single-photon avalanche diode 501, also called SPAD (from the English “Single-Photon Avalanche Diode”). The diode 501 is adapted to detect photons of the radiation 105. The diagram of [Fig. 5] corresponds for example to a case where the radiation 105 has a very low intensity.

[0069] In the example shown, the diode 501 comprises a first conduction terminal, for example an anode electrode, connected to a node 503 of the detection element 103, and a second conduction terminal, for example a cathode electrode, connected to a node 505 for applying a potential Vsp.

[0070] In the illustrated example, the detection element 103 further comprises a resistive element 507, for example a resistor, connecting the node 503 to another node 509 for applying a reference potential, for example ground. The resistive element 507 allows quenching of the avalanche phenomenon each time the diode 501 is triggered. In this example, the detection element 103 further comprises a capacitive element 511, for example a capacitor, connecting the node 503 to a node 513 for applying a reference potential, for example ground.

[0071] In the example shown, the detection circuit 207 comprises a Schmitt flip-flop 515 with an inverted hysteresis curve. In this example, the Schmitt flip-flop 515 has an input connected to the node 503 and an output connected to the input of the control circuit 209. In the example shown, the control circuit 209 of the pixel PIX of [Fig. 5] is identical or analogous to the control circuit 209 of the pixel PIX of [Fig. 3], the output of the Schmitt flip-flop 515 being connected to the input of the inverter 317.

[0072] In the example illustrated in [Fig.5], potentials Vsn' and Vo' are respectively present at node 503 and at the output of the Schmitt trigger 515.

[0073] As a variant, the Schmitt trigger 515 can be replaced by a comparator having an adjustable threshold and / or counters making it possible to adjust the intensity range of the light-emitting diode 211 of the emission element 107. This makes it possible, for example, to reduce or avoid the presence of parasitic pulses due to a dark current.

[0074] Furthermore, although this has not been detailed in the drawing, the circuit 205 of the diagram of [Fig.5] may further comprise sensitivity and / or saturation adjustment elements.

[0075] [Fig.6] is a timing diagram illustrating, schematically and partially, an example of operation of the pixel PIX of [Fig.5]. The timing diagram of [Fig.6] comprises curves 601 and 603 illustrating an example of evolution, as a function of time (t), of the potential Vsn' present at node 503 and of the lied current flowing through the light-emitting diode 211, respectively.

[0076] Between an instant t0' and an instant tl', subsequent to the instant t0', the potential Vsn' present at the node 503 is equal to a minimum value Vmin. The lied current is for example at a low level, for example substantially zero, between the instants t0' and tl'. This corresponds for example to a period during which no photon is detected by the diode 501.

[0077] In the example shown, at time tl', at least one photon is detected by the diode 501. The charges produced by the avalanche generated in the diode 501 then accumulate at the terminals of the capacitive element 511, thus causing an increase in the potential Vsn' up to a maximum value Vmax, strictly greater than the value Vmin. This causes a switching of the output potential Vo' of the Schmitt trigger 515. The lied current passing through the light-emitting diode 211 switches so from low level to high level.

[0078] Between the instant tl' and an instant t2', subsequent to the instant tl', the avalanche phenomenon is extinguished by the action of the resistor 507 and the capacitive element 511 discharges through the resistive element 507. This causes, between the instants tl' and t2', a switching of the output potential Vo' of the Schmitt trigger 515 to a low level. The current lied passing through the light-emitting diode 211 then switches from the high level to the low level by the action of the inverter 317 and the transistor 319.

[0079] In a similar manner to curve 403 between times t2 and t3, curve 603 illustrates, between time t2' and a time t3', subsequent to time t2', several other pulses of the lied current similar to that present between times t1' and t2'. These pulses result, as explained above, from successive charges and discharges of the capacitive element 511 when the diode 501 captures at least one photon of the radiation 105. The pulses that curve 603 comprises between times t0' and t3' are repeated for example periodically, for example at a frequency fh'.

[0080] Between an instant t4', subsequent to the instant t3', and an instant t5', subsequent to the instant t4', the curve 603 still illustrates other pulses of the lied current, for example analogous to the pulses present between the instants t0' and t3'.

[0081] The pulses of the lied current between the times t4' and t5' differ for example from the pulses of the lied current between the times t0' and t3' in that they are repeated periodically at a frequency fl' strictly lower than the frequency fh'. This comes for example from the fact that the diode 501 captures, during a phase LF' between the times t4' and t5', a smaller number of photons, for example resulting from a drop in the intensity of the radiation 105, than during another phase HF' between the times t0' and t3'.

[0082] In the example shown, the frequencies fh' and fl' are representative of the number of photons captured by the diode 501, for example substantially proportional to the number of photons captured by the diode 501. The frequencies fh' and fl' are for example substantially proportional to the intensity, or to the flux, of the radiation 105 captured by the diode 501. The light-emitting diode 211 is for example thus controlled by a periodic signal of frequency substantially proportional to the intensity of the radiation 105 captured by the diode 501.

[0083] In the examples set out above, the image capture and display device 100 is devoid of circuits for addressing the matrices of detection elements 103 and emission elements 107. The device 100 is further devoid of circuits and components for storing, or memorizing, images acquired by the detection elements 103 or images to be displayed by the emission elements 107.

[0084] An advantage of the device 100 is that it has a weight, a size, lower complexity, power consumption, manufacturing costs and / or latency than existing image capture and display devices.

[0085] [Fig.7A], [Fig.7B], [Fig.7C], [Fig.7D], [Fig.7E], [Fig.7F], [Fig.7G], [Fig.7H], [Fig.7I] and [Fig.7J] illustrate, by means of schematic and partial sectional views, structures obtained at the end of steps of a method of manufacturing the device 100 of [Fig.1] according to one embodiment.

[0086] [Fig.7A] illustrates more precisely a structure obtained at the end of a step of forming, on a support substrate 701, a stack of infrared photodetectors 703.

[0087] For example, the support substrate 701 is a wafer or piece of wafer made of a semiconductor material.

[0088] The support substrate 701 is for example coated, on one of its faces, with a semiconductor layer 705. In the example shown, the semiconductor layer 705 is located on and in contact with a face 701T of the support substrate 701 (the upper face of the substrate 701, in the orientation of [Fig.7A]). By way of example, the layer 705 is made of the same semiconductor material as the support substrate 701.

[0089] The semiconductor layer 705 is for example coated with another semiconductor layer 707, for example a layer made of the same material as the layer 705. In the example shown, the semiconductor layer 707 is located on and in contact with a face of the semiconductor layer 705 opposite the support substrate 701. By way of example, the semiconductor layer 707 is doped with a first conductivity type, for example the N type (N+ doping). The semiconductor layer 705 plays for example the role of a buffer layer between the support substrate 701 and the semiconductor layer 707.

[0090] The semiconductor layer 707 is for example coated with another semiconductor layer 709, for example a layer made of a semiconductor material different from the material of the semiconductor layer 707. In the example shown, the semiconductor layer 709 is located on and in contact with a face of the semiconductor layer 707 opposite the support substrate 701. By way of example, the semiconductor layer 709 is doped with the first conductivity type (the N type, in this example) and has a doping level lower than that of the semiconductor layer 707 (N- doping). The semiconductor layer 709 constitutes for example an active layer, also called an absorption or photoconversion layer, of the infrared photodetector stack 703. The semiconductor layer 707 is for example intended to form an upper electrode common to the infrared photodetectors 201 of the device 100.

[0091] The semiconductor layer 709 is for example coated with another semiconductor layer- conductive layer 711, for example a layer made of the same material as the semiconductor layer 707. In the example shown, the semiconductor layer 711 is located on and in contact with a face of the semiconductor layer 709 opposite the support substrate 701. By way of example, the semiconductor layer 711 is undoped.

[0092] In the illustrated example, the semiconductor layers 705, 707, 709 and 711 form the infrared photodetector stack 703.

[0093] The support substrate 701 and each layer 705, 707, 709, 711 of the stack 703 are for example made of inorganic semiconductor materials other than silicon, for example III-V compounds comprising at least a first element of group III, a second element of group V and, optionally, a third element, for example a group III element other than the first element. By way of example, the support substrate 701 and the semiconductor layers 705, 707 and 711 are made of indium phosphide (InP). The semiconductor layer 709 is for example made of indium-gallium arsenide (InGaAs).

[0094] For example, layers 705, 707, 709 and 711 of the infrared photodetector stack 703 are formed, by successive epitaxial growth operations, from the face 701T of the support substrate 701.

[0095] [Fig.7B] illustrates more precisely a structure obtained at the end of a subsequent step of depositing an insulating layer 713 on the side of the upper face of the structure of [Fig.7A].

[0096] The insulating layer 713 covers the semiconductor layer 711. In the example shown, the insulating layer 713 is more precisely located on and in contact with a face of the semiconductor layer 711 opposite the support substrate 701. By way of example, the insulating layer 713 is made of an oxide, for example a silicon oxide (SiO2), or of a nitride, for example a silicon nitride (SiN).

[0097] Furthermore, during this step, through openings are formed in the insulating layer 713. These openings are for example located directly above locations where lower electrodes 715 of the infrared photodetectors 201 will subsequently be formed. By way of example, the openings are formed by photolithography then etching of the insulating layer 713.

[0098] Furthermore, during this step, the lower electrodes 715 of the infrared photodetectors 201 are formed in the semiconductor layer 711. In this example, the lower electrodes 715 are formed in the thickness of the semiconductor layer 711, for example by doping with a second type of conductivity (the P type, in this example) regions of the semiconductor layer 711 located substantially directly above the openings previously formed in the insulating layer 713. By way of example, the doping is obtained by diffusion of an acceptor doping species, for example zinc atoms.

[0099] Furthermore, during this step, contact recovery elements 717 are formed on and in contact with the lower electrodes 715. In the example illustrated, the contact recovery elements 717 fill, i.e. completely fill, the openings previously formed in the insulating layer 713. In this example, the contact recovery elements 717 further extend laterally on and in contact with the face of the insulating layer 713 opposite the support substrate 701 (the upper face of the insulating layer 713, in the orientation of [Fig.7B]). By way of example, a conductive layer, for example a metal layer, is first deposited on the side of the upper face of the structure. The conductive layer is for example then structured, for example by photolithography then etching, so as to obtain the contact recovery elements 717.

[0100] [Fig.7C] illustrates more precisely a structure obtained at the end of a subsequent step of forming isolation trenches 719 in the infrared photodetector stack 703.

[0101] During this step, trenches are for example formed in the insulating layer 713 and in the infrared photodetector stack 703. In the example shown, the trenches extend vertically from a face of the insulating layer 713 opposite the support substrate 701 (the upper face of the insulating layer 713, in the orientation of [Fig.7C]) to the semiconductor layer 707, through the semiconductor layers 711 and 709. In this example, the bottom of each trench is formed by a part of the upper face of the semiconductor layer 707.

[0102] For example, through openings are first formed in the insulating layer 713, for example by photolithography then etching. The semiconductor layers 711 and 709 of the infrared photodetector stack 703 are for example then etched directly above the openings previously formed in the insulating layer 713, so as to obtain the trenches.

[0103] Furthermore, during this step, the sides of the trenches are passivated by the deposition of an insulating layer 721, for example an oxide layer, coating the sides and the bottom of the trenches. An anisotropic etching operation is for example then implemented so as to eliminate parts of the insulating layer 721 coating the bottom of the trenches.

[0104] Furthermore, during this step, contact recovery elements 723 are formed in the trenches. In the illustrated example, the contact recovery elements 723 fill, i.e. completely fill, the trenches previously formed in the insulating layer 713 and in the semiconductor layers 711 and 709. In this example, the contact recovery elements 723 further extend laterally on and in contact with the face of the insulating layer 713 opposite the support substrate 701 (the upper face of the insulating layer 713, in the orientation of [Fig.7C]). As for example, a conductive layer, for example a metal layer, is first deposited on the side of the upper face of the structure. The conductive layer is for example then structured, for example by photolithography then etching, so as to obtain the contact recovery elements 723.

[0105] During this step, the contact recovery elements 723 are for example thinned, for example by CMP (from the English “Chemical and Mechanical Polishing”) on the side of the upper face of the structure.

[0106] The contact recovery elements 717 and 723 constitute for example respectively anode and cathode electrodes of the infrared photodetectors 201 of the device 100.

[0107] [Fig.7D] illustrates more precisely a structure obtained at the end of a step of forming an active stack of light-emitting diodes 751, or active stack of LEDs, on the side of a face 753T of a substrate 753 (the upper face of the substrate 753, in the orientation of [Fig.7D]). The step described in relation to [Fig.7D] can be carried out indifferently before, during or after the steps previously described in relation to FIGS. 7A to 7C. The substrate 753 is transparent to the radiation 109 emitted by the light-emitting diodes 211, for example transparent to visible light. For example, the substrate 753 is made of corundum (“sapphire” in English). In a case where the substrate 753 is removed during a later step of the manufacturing process of the device 100, the substrate 753 may be made of a material opaque to visible light, for example silicon.

[0108] In the example shown, a semiconductor layer 755 doped with the first conductivity type (the N type, in this example), covers the face 753T of the substrate 753. The semiconductor layer 755 is for example more precisely located on and in contact with the face 753T.

[0109] In the example shown, the semiconductor layer 755 is coated with an active layer 757. The active layer 757 is, in this example, located on and in contact with a face of the semiconductor layer 755 opposite the substrate 753 (the upper face of the layer 755, in the orientation of [Fig.7D]). By way of example, the layer 757 comprises quantum dots or wells.

[0110] In the illustrated example, the active layer 757 is coated with another semiconductor layer 759. The semiconductor layer 759 is, in this example, located on and in contact with a face of the active layer 757 opposite the substrate 753 (the upper face of the layer 757, in the orientation of [Fig.7D]). The semiconductor layer 759 is for example doped with a second type of conductivity opposite to the first type of conductivity. In this example, the semiconductor layer 759 is of type P.

[0111] In the illustrated example, the semiconductor layer 755, the active layer 757 and the semiconductor layer 759 form the light-emitting diode stack 751.

[0112] As an example, the semiconductor layer 755, the active layer 757 and the semiconductor layer 759 are successively formed by epitaxial growth from the face 753T of the substrate 753.

[0113] [Fig.7E] illustrates more precisely a structure obtained at the end of a step of forming the light-emitting diodes 211 from the structure described above in relation to [Fig.7D].

[0114] In the illustrated example, conduction electrodes 761 of the light-emitting diodes 211 are formed on the side of the face 753T of the substrate 753. The conduction electrodes 761 are, for example, more precisely anode electrodes of the light-emitting diodes 211. In the example shown, the conduction electrodes 761 cover a face of the active stack of light-emitting diodes 751 opposite the substrate 753 (the upper face of the stack 751, in the orientation of [Fig. 7E]). The conduction electrodes 761 are, for example, located on and in contact with a face of the semiconductor layer 759 opposite the substrate 753 (the upper face of the layer 759, in the orientation of [Fig. 7E]). The conduction electrodes 761 have, for example, in top view, any shape, for example rectangular, oval, square, circular, etc.For example, the conduction electrodes 761 are made of a conductive material, for example a metal or a metal alloy.

[0115] Furthermore, during this step, peripheral isolation trenches 763 are formed in the thickness of the active stack of light-emitting diodes 751. In the example shown, each peripheral isolation trench 763 extends vertically in the thickness of the active stack of light-emitting diodes 751, from the face of the semiconductor layer 759 opposite the substrate 753 and passes through the semiconductor layer 759 and the active layer 757. In this example, each peripheral isolation trench 763 is interrupted in the thickness of the semiconductor layer 755, that is to say that the peripheral isolation trenches 763 do not open onto the face 753T of the substrate 753.

[0116] In the illustrated example, each peripheral isolation trench 763 has an annular shape surrounding, or bordering, a portion of the active layer 757 corresponding to an active region of the light-emitting diode 211. Each peripheral isolation trench 763 further surrounds the conduction electrode 761 of the light-emitting diode 211.

[0117] The peripheral insulation trenches 763 form, for example, in top view, a grid, each box of which laterally delimits a light-emitting diode 211.

[0118] For example, each peripheral insulation trench 763 comprises a conductive region 765 whose side walls, or flanks, are coated with a layer insulating layer 767, the insulating layer 767 being for example located on and in contact with the sides of the conductive region 765.

[0119] Furthermore, at least one connection element 769 (a single connection element 769, in the example shown) of a common conduction electrode, for example a cathode electrode, of the light-emitting diodes 211 is formed during this step. For example, each connection element 769 comprises a conductive region 771 whose side walls, or flanks, are coated with an insulating layer 773, the insulating layer 773 being for example located on and in contact with the flanks of the conductive region 771.

[0120] [Fig.7F] illustrates more precisely a structure obtained at the end of a step ul interior of formation, on the side of the face 753T of the substrate 753, of contact recovery elements 775.

[0121] In the example shown, each contact recovery element 775 is located on and in contact with one of the conduction electrodes 761, or on and in contact with the conductive region 771 of the contact recovery element 769. In this example, insulating regions 777 extend laterally between the contact recovery elements 775. In the example shown, the contact recovery elements 775 are flush with the upper face of the insulating regions 777.

[0122] For example, the contact recovery elements 775 and the insulating regions 777 are produced by implementing a damascene technique.

[0123] [Fig.7G] illustrates more precisely a structure obtained at the end of a step of forming the circuits 205 of the pixels PIX of the device 100. The step described in relation to [Fig.7G] can be carried out indifferently before, during or after the steps previously described in relation to FIGS. 7A to 7F.

[0124] In the example shown, the structure comprises a support substrate 781. By way of example, the support substrate 781 is a wafer or a piece of wafer made of a semiconductor material, for example silicon.

[0125] The support substrate 781 is for example coated, on one of its faces, with an insulating layer 783. In the example shown, the insulating layer 783 is located on and in contact with a face 781T of the support substrate 781 (the upper face of the substrate 781, in the orientation of [Fig.7G]). By way of example, the insulating layer 783 is made of an oxide, for example silicon oxide.

[0126] The insulating layer 783 is for example coated with a semiconductor layer 785, for example a silicon layer. In the example shown, the semiconductor layer 785 is located on and in contact with a face of the insulating layer 783 opposite the support substrate 781.

[0127] For example, the support substrate 781, the insulating layer 783 and the semiconductor layer 785 are part of a SOI (Silicon On-Iron) type substrate. Insulator" - silicon on insulator). In this case, the insulating layer 783 corresponds to the buried oxide layer (BOX, in English) of the SOI substrate.

[0128] In this example, the circuits 205 are located on the side of the face 781T of the semiconductor substrate 781. For example, the circuits 205 are formed in and on the semiconductor layer 785.

[0129] Although this has not been detailed in [Fig.7G] in order not to overload the drawing, the structure further comprises, for example, an interconnection stack or network located on the semiconductor layer 785. The interconnection stack then comprises, for example, a stack of conductive layers, for example metal layers or metallization levels, and alternating insulating layers. The interconnection stack comprises, for example, conductive tracks formed in the conductive layers and conductive vias, for example metal vias, interconnecting conductive tracks located in different conductive layers.

[0130] In the example shown, only a conductive layer 789 of the interconnect stack furthest from the support substrate 781, called the last metallization level, has been symbolized by hatched rectangles in [Fig.7G]. In this example, the last metallization level is formed in an insulating layer 787 of the interconnect stack.

[0131] The semiconductor layer 785 of the structure illustrated in [Fig.7G] corresponds for example to the semiconductor substrate 101 of the device 100 of [Fig.1].

[0132] Although [Fig.7G] illustrates an example in which the circuits 205 are formed in and on an SOI type substrate, this example is not limiting. Alternatively, the circuits 205 may be formed in and on a bulk semiconductor substrate, for example identical or analogous to the support substrate 781 of [Fig.7G].

[0133] [Fig.7H] illustrates more precisely a structure obtained at the end of a subsequent step of transferring the structure previously described in relation to [Fig.7G] onto the structure previously described in relation to [Fig.7F].

[0134] As an example, the structure previously described in relation to [Fig.7G] is turned over with respect to the orientation of [Fig.7G] and then brought into contact, by the faces of the insulating layer 787 and the conductive layer 789 opposite the support substrate 781 (the lower faces of the layers 787 and 789, in the orientation of [Fig.7H]), with the faces of the contact recovery elements 775 and the insulating regions 777 opposite the substrate 753 (the upper faces of the contact recovery elements 775 and the insulating regions 777, in the orientation of [Fig.7H]). During this step, the structure comprising the substrate 753 and the active stack of light-emitting diodes 751 is fixed to the interconnection stack of which the insulating layer 787 and the conductive layer 789 are part.

[0135] For example, the fixation is obtained by molecular bonding between the two surfaces brought into contact. Molecular bonding is, for example, more precisely of the hybrid type, each surface comprising conductive elements, for example metallic, and insulating elements, for example oxide.

[0136] The support substrate 781 is for example then removed. The support substrate 781 is for example completely removed, for example by grinding on the side of the face 753T of the substrate 753. Using an SOI type substrate has the advantage of facilitating the removal of the support substrate 781 during this step, for example by allowing a stop on the insulating layer 783.

[0137] [Fig.71] illustrates more precisely a structure obtained at the end of a subsequent step of producing conductive vias 791 and contact recovery elements 793.

[0138] In the example shown, the conductive vias 791 extend vertically, from a face of the insulating layer 783 opposite the substrate 753 (the upper face of the layer 783, in the orientation of [Fig.71]), through the insulating layer 783 and penetrate into the thickness of the semiconductor layer 785. Although this has not been detailed in [Fig.71] so as not to overload the drawing, the conductive vias 791 are for example connected to the circuits 205.

[0139] In the example shown, each contact recovery element 793 is located on and in contact with one of the conductive vias 791. In this example, insulating regions 795 extend laterally between the contact recovery elements 793. In the example shown, the contact recovery elements 793 are flush with the upper face of the insulating regions 795.

[0140] As an example, the contact recovery elements 793 and the insulating regions 795 are produced by implementing a damascene technique.

[0141] [Fig.7J] illustrates more precisely a structure obtained at the end of a subsequent step of transferring the structure previously described in relation to [Fig.7C] onto the structure previously described in relation to [Fig.7I].

[0142] As an example, the structure previously described in relation to [Fig.7C] is turned over with respect to the orientation of [Fig.7C] and then brought into contact, by the faces of the contact recovery elements 717 and 723 opposite the support substrate 701 (the lower faces of the contact recovery elements 717 and 723, in the orientation of [Fig.7J]), with the faces of the contact recovery elements 793 opposite the support substrate 753 (the upper faces of the contact recovery elements 793, in the orientation of [Fig.7J]). During this step, the structure comprising the support substrate 701 and the inorganic photodetector stack 703 is fixed to the active light-emitting diode stack 751.

[0143] For example, the fixing is obtained by molecular bonding between the two surfaces brought into contact. The molecular bonding is, for example, more precisely of the metal / metal type.

[0144] Furthermore, during this step, the support substrate 701 is removed. The support substrate 701 is for example completely removed, for example by grinding the side of the face 753T of the support substrate 753.

[0145] Furthermore, during this step, lenses 797 are formed directly above each photodetector 201. In the example shown, the lenses 797 are located on and in contact with the face of the semiconductor layer 705 opposite the transparent substrate 753 (the upper face of the semiconductor layer 705, in the orientation of [Fig.7J]).

[0146] The method described above in relation to FIGS. 7A to 7J can be used to produce a monolithic device 100, for example a micro-screen, combining an infrared optical capture function and a monochrome visible image display function. As a variant, the method can be used to produce larger devices. Such a device can comprise a plurality of elementary chips (“smart pixels”) arranged, for example in a matrix arrangement, on the same transfer substrate. For example, the transfer substrate is a flexible substrate (“flex”, in English), that is to say a substrate capable of conforming to the shape of a rounded object. The elementary chips are mounted integrally with the transfer substrate and connected to electrical connection elements of the transfer substrate for their power supply.In this case, each chip comprises for example a photodetector 201, a light-emitting diode 211, and at least one of the circuits 205. Each chip corresponds for example to a macro-pixel of the device. The implementation of such a method is within the reach of the person skilled in the art from the indications of the present description, and comprises for example a step of cutting, or individualization, of the elementary chips fixed on a temporary support substrate followed by steps of transferring the elementary chips to the transfer substrate, the pitch of the elementary chips on the transfer substrate corresponding to an integer multiple strictly greater than 1 of the pitch of the elementary chips on the temporary support substrate.

[0147] [Fig.8] is a schematic and partial side view of an example of implementation of the device 100 of [Fig.1] in an electronic device 900. By way of example, the device 900 is a pair of connected glasses or a video headset intended to be placed in front of a user's eyes, for example an augmented reality or mixed reality headset or glasses.

[0148] Although a single device 100 placed opposite a single eye 901 has been symbolized in [Fig.8], the electronic device 900 may of course comprise another device 100 placed opposite the other eye of the user. In the illustrated example, the majority of the radiation, for example visible light, reaching the eye 901 comes from the device 100.

[0149] In the example shown, the electronic device 900 comprises, in addition to the image capture and display device 100, a power supply circuit 903 and focusing elements 905, for example two convex lenses, located on either side of the device 100. By way of example, the power supply circuit 903 comprises a battery.

[0150] In the example illustrated, the focusing element 905 interposed between the device 100 and the eye 901 is adapted to focus, on the eye 901, the radiation 109 produced by the emission elements 107. Furthermore, in this example, the focusing element 905 located between the device 100 and the exterior is adapted to focus the incident radiation 105 on the detection elements 103.

[0151] The electronic device 900 is for example devoid of addressing circuits and / or analog-digital converters.

[0152] [Fig. 9] is a schematic and partial side view of another example of implementation of the device 100 of [Fig. 1] in an electronic device 1000. By way of example, the device 1000 is a pair of glasses for assisting visually impaired people, a pair of glasses for assisting a driver of a motor vehicle or a head-up display device, for example integrated into a motor vehicle such as a car, a truck, etc.

[0153] The electronic device 1000 is for example adapted to superimpose, on an image of a scene seen by the eye 901, an image produced by the device 100, for example an image of a contour or an intensified image of an object of the scene. In the case of an intensified image, the device 100 further comprises for example an image processing circuit adapted to implement this function. By way of example, the device 1000 is used in image intensification applications, or brightness amplification, or vision applications in dimly lit environments, for example night vision applications.

[0154] The electronic device 1000 of [Fig.9] comprises elements in common with the electronic device 900 of [Fig.8]. These common elements will not be detailed again below.

[0155] The electronic apparatus 1000 of [Fig. 9] differs from the electronic apparatus 900 of [Fig. 8] in that, in the apparatus 1000, the device 100 is not placed opposite the eye 901. In the illustrated example, the majority of the radiation, for example visible light, reaching the eye 901 comes from the scene and the majority of the incident radiation 105 reaches the eye 901 without being captured by the device 100.

[0156] In the illustrated example, the electronic device 1000 comprises an optical waveguide 1001 comprising an input face arranged opposite the device 100, for example opposite the emission elements 107, and an output face arranged opposite the eye 901. In this example, the optical waveguide 1001 is adapted to transmit, in the direction of the eye 901, the radiation 109 emitted by the device 100.

[0157] An advantage of integrating one or more devices 100 into the apparatus 900 or 1000 is that this allows these apparatuses to have a lower weight, size, complexity, energy consumption, manufacturing costs and / or latency time than similar apparatuses integrating image capture and display devices comprising reading and control circuits implementing addressing functions of the sensor and the display to which they are connected, and in which the images acquired by the sensor are for example stored in a memory circuit before being displayed, possibly after processing.

[0158] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will occur to those skilled in the art. In particular, although the described embodiments take as an example a case in which the arrays of sensing elements 103 and display elements 107 have a substantially identical pitch, those skilled in the art are able to predict, from the indications of the present description, that the array of display elements 107 of the device 100 has a different pitch, for example a larger one, than that of the array of sensing elements 103.

[0159] Finally, the practical implementation of the described embodiments and variants is within the reach of those skilled in the art from the functional indications given above. In particular, the described embodiments are not limited to the particular examples of materials and dimensions mentioned in the present description.

Claims

Claims

1. Electronic device (100) for capturing and displaying images comprising a plurality of pixels (PIX) formed in and on a semiconductor substrate (101; 785), each pixel comprising: - a detection element (103) for infrared radiation (105), located on the side of a first face (101F) of the semiconductor substrate (101); - an emission element (107) for visible light (109), located on the side of a second face (101R) of the semiconductor substrate opposite the first face; and - a circuit (205) located in and on the semiconductor substrate and connecting the detection element to the emission element.

2. Device (100) according to claim 1, wherein the circuit (205) comprises: - an acquisition circuit (207) located in and on the semiconductor substrate (101; 785) and adapted to provide an acquisition signal representative of an intensity of the infrared radiation (105) received by the detection element (103) of the pixel (PIX); and - a control circuit (209) located in and on the semiconductor substrate and adapted to apply a control signal to the emission element (107) of the pixel.

3. Device (100) according to claim 2, wherein the acquisition circuit (207) and the control circuit (209) are analog circuits.

4. Device (100) according to claim 2, wherein: - each detection element (103) comprises an inorganic photodetector (201); - each acquisition circuit (207) comprises a comparator (301) having an inverting input connected to a conduction electrode of the photodetector; and - each control circuit (209) comprises an inverter (317) having an input connected to an output of the comparator and an output connected to a gate of a MOS transistor (319), the MOS transistor comprising a conduction electrode connected to the emission element (107).

5. Device (100) according to claim 2, wherein: - each detection element (103) comprises a diode (501) with single-photon avalanche; - each acquisition circuit (207) comprises a Schmitt trigger (515) having an input connected to a conduction electrode of the single-photon avalanche diode; and - each control circuit (209) comprises an inverter (317) having an input connected to an output of the Schmitt trigger and an output connected to a gate of a MOS transistor (319), the MOS transistor comprising a conduction electrode connected to the emission element (107).

6. Device (100) according to any one of claims 1 to 5, wherein the detection elements (103) are located opposite the emission elements (107).

7. A device (100) according to any one of claims 1 to 6, wherein the detection elements (103) and the emission elements (107) are arranged respectively in first and second matrices, the first and second matrices having substantially identical pitches.

8. Device (100) according to any one of claims 1 to 7, wherein each emitting element (107) comprises at least one light-emitting diode (211).

9. A device (100) according to claim 8, wherein the light-emitting diode (211) is controlled by a control signal having an average value substantially proportional to an intensity of the infrared radiation (105) detected by the detection element (103).

10. A device (100) according to claim 8, wherein the light-emitting diode (211) is driven by a drive signal having pulses repeating at a frequency substantially proportional to an intensity of the infrared radiation (105) detected by the sensing element (103).

11. Device (100) according to any one of claims 1 to 10, comprising as many detection elements (103) as emission elements (107).

12. Electronic apparatus (900; 1000) comprising: - a power supply circuit (903); and - at least one device (100) according to any one of claims 1 to 11.

13. A method of manufacturing a device (100) according to any one of claims 1 to 11, comprising a step of transferring, by mo- lecular, of a structure comprising the detection elements (103) and the circuits (205) on another structure comprising the emission elements (107).

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