Printed circuit board comprising an embedded component and a decoupling layer

Abstract

PRINTED CIRCUIT BOUNDING AN EMBEDDED COMPONENT AND A DECOUPLING LAYER One aspect of the invention relates to a printed circuit board (10) comprising: a stack of layers (11) comprising a plurality of dielectric layers (111a, 111b); a component (12) embedded in the stack of layers (11) and at least partially encapsulated by an encapsulating resin (14); a decoupling layer (15) of the component (12) with respect to the encapsulating resin (14), the decoupling layer (15) being disposed between the component (12) and the encapsulating resin (14). Figure to be published with the abstract: Figure 3

Description

Title of the invention: Printed circuit board comprising an embedded component and a decoupling layer. Technical field of the invention.

[0001] The technical field of the invention is that of printed circuit boards comprising one or more embedded components. The present invention relates more particularly to a printed circuit board comprising a stack of layers and a component embedded in the stack of layers, the component being at least partially encapsulated by an encapsulation resin. TECHNOLOGICAL BACKGROUND OF THE INVENTION

[0002] The development of power electronics to meet the challenges of aircraft hybridization and electrification is leading to a change in the architecture of electronic boards. Embedding components in a printed circuit board (PCB) is a relevant solution for addressing certain issues such as component protection, improved heat dissipation, increased density of electronic functions, enhanced robustness and reliability, and environmental protection.

[0003] Figure 1 schematically represents the main steps of a manufacturing process for a printed circuit board 1 with embedded component 2. These steps are: a. the formation of a first stack of layers 3 in which a cavity 4 is provided, this first stack 3 including in particular dielectric layers; b. the insertion of component 2 into cavity 4; c. closing the cavity 4 by means of a second stack of layers 5 including additional dielectric layers, d. stratification, also called "lamination", which is a temperature pressing step allowing the different layers of stacks 3 and 5 to be bonded together.

[0004] Certain dielectric layers are formed from a material comprising a resin 6 that is not fully polymerized and is therefore capable of flowing during lamination to bond the dielectric layers together. These dielectric layers are arranged such that, during step d) of lamination, the resin 6 fills the remaining space of the cavity 4 and encapsulates the component 2. The encapsulating resin 6 is then in direct contact with the component 2.

[0005] However, component 2 and the encapsulating resin 6 have coefficients of thermal expansion (or CTE, for "Coefficient of Thermal Expansion") and Young's moduli that are more or less different. The difference in CTE between the embedded component and the encapsulating resin causes significant thermomechanical stresses in the printed circuit board 1 during a large and / or repeated temperature variation. These thermomechanical stresses can lead to degradation, through material fatigue, in the printed circuit board 1, in particular: • a tearing off of part of component 2; • cracks in the encapsulation resin 6, particularly at the start of the corners of component 2 where thermomechanical stresses are concentrated; • partial delamination at the interface between component 2 and the encapsulation resin 6; and / or • cracks in component 2. Summary of the invention

[0006] There is therefore a need to reduce the risk of damage to a printed circuit board including a buried component, when this printed circuit board is subjected to a significant temperature variation, for example when used in an aircraft engine.

[0007] According to a first aspect of the invention, this need is met by providing a printed circuit board comprising: • a stack of layers comprising a plurality of dielectric layers; • a component embedded in the stack of layers and coated at least partially by an encapsulation resin; • a decoupling layer of the component from the encapsulation resin, the decoupling layer being disposed between the component and the encapsulation resin.

[0008] The expression "decoupling layer" refers to a layer capable of mechanically and directly decoupling the component from the encapsulation resin, thus allowing the component to move (or "slide") relative to the encapsulation resin, or a layer capable of decoupling the component from the encapsulation resin in terms of thermomechanical forces.

[0009] Preferably, at least one of the dielectric layers of the stack is formed of a material comprising the encapsulating resin. This dielectric layer or these dielectric layers constitute the source of the encapsulating resin coating the component during the manufacture of the printed circuit board. The material is preferably a composite material. comprising, in addition to the encapsulating resin, a reinforcing material. The reinforcing material is, for example, a fiberglass fabric, also called "glass fabric". This fabric is then impregnated with the encapsulating resin.

[0010] In a first embodiment of the printed circuit board, the decoupling layer is formed of a non-adherent coating with respect to the encapsulation resin.

[0011] In a second embodiment, the decoupling layer is a thermomechanical stress damping layer. The decoupling layer is preferably formed of a viscoelastic resin having a yield strength preferably greater than 500 MPa or a dynamic viscosity less than 25 Pa.s (i.e., 25,000 cP) or of a solid resin having a Young's modulus less than 500 MPa.

[0012] In addition to the characteristics mentioned in the preceding paragraphs, the printed circuit board according to the first aspect of the invention may have one or more additional characteristics from among the following, considered individually or in all technically possible combinations: • The layer stack includes an internal cavity containing the component and delimited by: • a dielectric layer called the support layer on which the component is placed; • at least one intermediate dielectric layer disposed on the supporting dielectric layer and surrounding the component; • a dielectric layer called cavity closure layer disposed on said at least one intermediate dielectric layer and on the component; • the encapsulation resin extends between the component and said at least one intermediate dielectric layer and between the component and the cavity closing dielectric layer; • the encapsulation resin also extends between the component and the supporting dielectric layer; • The encapsulation resin completely fills the internal cavity.

[0013] A second aspect of the invention relates to a method for manufacturing a printed circuit board comprising a buried component, comprising the following steps: • apply a decoupling layer to the component; • form a stack of layers in which a cavity is provided, the component covered by the decoupling layer being housed in the cavity, and the stack comprising at least one dielectric layer made of a material comprising an encapsulating resin; and • perform a stratification of the different layers of the stack, so as to cause the encapsulation resin to flow so that it fills the cavity and at least partially coats the component covered by the decoupling layer.

[0014] Preferably, the layer stack comprises an alternation of first dielectric layers and second dielectric layers, the first dielectric layers being formed of a first dielectric material comprising a resin totally polymerized before the lamination step and the second dielectric layers being formed of a second dielectric material comprising the encapsulation resin, the encapsulation resin being partially polymerized before the lamination step and totally polymerized after the lamination step.

[0015] In a first embodiment of the method, the decoupling layer is deposited so as to completely cover the component before it is inserted into the cavity of the layer stack.

[0016] In a second embodiment, the method further includes a step of electrically connecting the component to a first stack of layers and the decoupling layer is deposited through a protective mask disposed on the first stack of layers, around the component. BRIEF DESCRIPTION OF THE FIGURES

[0017] Other features and advantages of the invention will become clear from the description given below, by way of example and not limitation, with reference to the accompanying figures, among which: • Fig. 1 represents steps in a printed circuit board manufacturing process with component embedding according to the prior art; • [Fig.2] schematically represents a first embodiment of a printed circuit according to the invention; • [Fig.3] schematically represents a second embodiment of the printed circuit according to the invention; • Figures 4A to 4C schematically represent a first implementation method for manufacturing a printed circuit board according to the invention; and • Figures 5A to 5E represent a second implementation method of the printed circuit board manufacturing process according to the invention.

[0018] For clarity, identical or similar elements are identified by identical reference signs throughout the figures. DETAILED DESCRIPTION

[0019] The [Fig.2] is a schematic cross-sectional view of a printed circuit 10 according to a first embodiment of the invention.

[0020] The printed circuit board 10 includes a stack of layers 11 and a component 12 embedded in the stack of layers 11.

[0021] The stack of layers 11 comprises a plurality of dielectric layers 111. It also comprises one or more electrically conductive layers 112, typically made of a metal such as copper. The electrically conductive layers 112 may be structured to form conductive tracks.

[0022] In the example shown, the stack 11 comprises alternating first dielectric layers 11a and second dielectric layers 111b, as well as two conductive layers 112 arranged on either side of the dielectric layers 111a-111b. The conductive layers 112 are solid here (but will be etched later to create electrically conductive patterns) and form the main faces of the printed circuit board 1 (bottom and top faces). The first dielectric layers 111a are formed of a first dielectric material and the second dielectric layers 111b are formed of a second dielectric material. The second dielectric material may be the same as or different from the first dielectric material.

[0023] The stack 11 may include one or more other conductive layers (other than the conductive layers 112 that form the main faces of the printed circuit 1), solid or structured, located between two dielectric layers 111a and 111b.

[0024] The component 12 is embedded within the stack of layers 11, that is, it is entirely located inside the stack 11 and does not protrude onto its surface. The component 12 is situated inside an internal, closed cavity 13 within the stack 11.

[0025] More specifically, component 12 is arranged on a so-called support dielectric layer (referenced 111a in the example in the figure described above), surrounded by one or more intermediate dielectric layers (referenced 11a and 111b) and covered by a so-called cavity-closing dielectric layer (referenced 111a). The support dielectric layer, the intermediate dielectric layers, and the cavity-closing layer of the stack 11 define the cavity 13.

[0026] The component 12 is further coated, at least partially, by an encapsulation resin 14. In other words, the encapsulation resin 14 covers at least part of the faces of the component 12.

[0027] The encapsulation resin 14 preferably extends between the component 12 and the intermediate dielectric layer(s) (surrounding the component 12) and between the component 12 and the closing dielectric layer (disposed on the component 12). It then covers the lateral faces and the upper face of the component 12.

[0028] The encapsulation resin 14 can also extend between the component 12 and the dielectric support layer (on which the component 12 rests). It then also covers the underside of the component 12. In this case, it completely encases the component 12.

[0029] Preferably, the encapsulating resin 14 that coats the component 12 is derived from at least one dielectric layer 111 of the stack 11. This dielectric layer, referred to as the "bonding" layer, is preferably formed of a composite material comprising a reinforcing material and the encapsulating resin 14. The reinforcing material may be, in particular, a fabric, for example, made of glass fibers, and / or solid particles such as ceramic beads. This composite material is commonly called a prepreg when the resin is not yet fully polymerized. A woven prepreg layer comprises a fabric (for example, made of glass fibers) impregnated with the encapsulating resin. A non-woven prepreg layer is devoid of fabric and comprises the encapsulating resin loaded / reinforced with solid particles such as beads.The encapsulation resin 14 is for example an epoxy type resin, polytetrafluoroethylene (PTFE), hydrogen carbonate, poly(p-phenylene oxide) or poly(p-phenylene ether) (PPO / PPE), polyimide... .

[0030] Thus, one or more dielectric layers 111 of the stack 11 are formed of a material comprising the encapsulation resin 14 (and, preferably, a reinforcing material).

[0031] As will be described later, the encapsulation resin 14 of the bonding dielectric layer(s) is not completely polymerized when the stack 11 of the printed circuit board 10 is formed. Therefore, during the lamination process, it thins (or flows) from the stack 11 to fill the cavity 13 and thus encase the component 12. Preferably, the encapsulation resin 14 completely fills the remaining part of the cavity 13 formed in the stack 11.

[0032] In the example described above, the encapsulation resin 14 can come from the second dielectric layers 111b. The material of the first dielectric layers 111a (first dielectric material) is preferably chosen according to the rigidity and coefficient of expansion properties that are desired to be given to the printed circuit 10.

[0033] Preferably, the material of the first dielectric layers 11a and the material of the second dielectric layers 111b are of the same chemical nature (for example, a glass fabric coated with the same resin), but they exhibit different polymerization rates at the time of stack formation: complete polymerization for the first layers 111a (whose material is then commonly called a "laminate") and partial polymerization for the second layers 111b (whose material is then commonly called a "laminate"). the material is then commonly called "pre-impregnated"). After the lamination of the dielectric layers 111a and 111b, the resin of the second dielectric layers 111b is completely polymerized and the two materials are identical.

[0034] The component 12 may in particular be an electronic component, active (transistor, thyristor, integrated circuit, bare or packaged chip...) or passive (resistor, coil, capacitor, diode...), a magnetic component (such as a magnetic core) or a mechanical component (strain gauge...).

[0035] The printed circuit board 10 further includes a decoupling layer 15 of the component 12 with respect to the encapsulation resin 14, disposed between the component 12 and the encapsulation resin 14. By decoupling layer is meant a layer capable of mechanically and directly decoupling the component 12 from the encapsulation resin 14, thus allowing the component 12 to move (or "slide") relative to the encapsulation resin 14, or a layer capable of decoupling the component 12 from the encapsulation resin 14 in terms of thermomechanical forces, in which case the thermomechanical forces are not directly transmitted from the component to the resin, or vice versa.

[0036] The decoupling layer 15 serves as an interface layer between the component 12 and the encapsulation resin 14 and makes it possible to eliminate, limit or move the areas of concentration of thermomechanical stresses, in order to reduce the risk of degradation of the printed circuit 10, and in particular of the component 12 and the encapsulation resin 14. It can also be described as a protective layer, since it protects the component 12 from degradation (such as cracks, tearing...).

[0037] Preferably, the decoupling layer 15 is arranged so that the component 12 never comes into contact with the encapsulation resin 14. In other words, it separates the component 12 and the encapsulation resin 14 at every point of the interface. In particular, it can completely surround the component, as illustrated in [Fig. 2].

[0038] In this first embodiment, the decoupling layer 15 is formed of a non-adherent coating with respect to the encapsulation resin 14. In other words, it does not adhere to the encapsulation resin 14. On the other hand, it adheres to the component 12. The non-adherent coating is, for example, formed of a fluoropolymer such as polytetrafluoroethylene (PTFE), perfluoroalkoxy (PFA), and fluorinated ethylene propylene (FEP), a ceramic material, or polyetheretherketone (PEEK). The thickness of the non-adherent coating can be between 100 nm and 10 pm.

[0039] The decoupling layer 15 then generates a deliberate and controlled delamination at the interface with the encapsulation resin 14. The external surface of the component 12 covered with the decoupling layer 15 is free and unconstrained, thus preventing any damage to the component and the encapsulation resin.

[0040] Fig. 3 schematically represents a second embodiment of the printed circuit 10. This second embodiment differs from the first only in the composition of the decoupling layer 15.

[0041] The decoupling layer 15 is here a layer for damping thermomechanical stresses. In other words, not only does it decouple the resin 14 and the component 12, but, in addition, it absorbs all or part of the thermal expansion stresses by deforming (stretching, compression...).

[0042] The decoupling layer 15 is preferably formed of a viscoelastic resin having a yield strength preferably greater than 500 MPa or a dynamic viscosity less than 25 Pa·s (i.e., 25,000 cP) or of a solid resin having a Young's modulus less than 500 MPa. Silicone resins are an example. Its thickness can be between 20 µm and 125 µm.

[0043] In the second embodiment of the printed circuit board 10, the material of the decoupling layer 15 advantageously has a coefficient of thermal expansion (CTE) close to that or those of the component 12. By "CTE close", we mean in a ratio between 0.1 and 5. The difference in CTE between the component 12 and the decoupling layer 15 is thus small.

[0044] When the decoupling layer 15 is formed of a viscoelastic resin, the latter has a low glass transition temperature (GT), typically below -20 °C, so that the resin remains in a rubbery state according to the environmental conditions of use of the printed circuit board (typically between -20 °C and +100 °C for electronics embedded in an aircraft engine).

[0045] A manufacturing process for the printed circuit board 10 will now be described with reference to Figures 4A-4C and 5A-5E. In general, this manufacturing process comprises the following steps: • SI: the deposition of the decoupling layer 15 on the component 12; • S2: the formation of a stack of 11 layers in which is arranged a cavity 13, the component 12 covered by the decoupling layer 15 being housed in the cavity 13 (without, however, filling it completely) and the stack 11 comprising at least one dielectric layer of a material comprising an encapsulating resin 14; and • S3: the stratification of the different layers of the stack 11, so as to cause the encapsulation resin 14 to flow so that it fills the cavity 13 (preferably completely) and coats (at least partially) the component 12 covered by the decoupling layer 15.

[0046] The layering is carried out under temperature and pressure conditions adapted to the different materials composing the stack 11. During this S5 layering step, the polymerization of the encapsulation resin 14 is completed and the different layers of the stack 11 are bonded together.

[0047] The dielectric layer(s) comprising the resin 14 are preferably arranged around the component and / or above the component 12.

[0048] As previously stated and shown in Figures 4B and 5D, the stack 11 may comprise an alternation of first and second dielectric layers 111a-111b, all comprising a resin. The encapsulating resin 14 of the second dielectric layers 111b is only partially polymerized during the formation of the stack 11 (step S2), while the resin of the first dielectric layers 11a (the same or a different one) may already be fully polymerized.

[0049] Figures 4A to 4C illustrate a first method of implementing the manufacturing process.

[0050] In this first embodiment, the decoupling layer 15 is deposited on the component 12 so as to completely cover it (step SI of [Fig. 4A]), before its insertion into the cavity 13. The decoupling layer 15 can be deposited using a projection technique such as spraying. Alternatively, a dipping technique can also be considered.

[0051] Furthermore, with reference to [Fig.4B], step S2 of the formation of the stack 11 containing component 12 comprises the following sub-steps: • the preparation of a first stack of layers lia in which the cavity 13 is arranged, the first stack lia comprising for example an alternation of first and second dielectric layers 11 la-111b on a conductive layer 112; • the insertion of component 12 into cavity 13; and • the closure of the cavity 13 by means of a dielectric layer 111 or a second stack of layers 11b comprising, for example, a dielectric layer 111 and a conductive layer 112 disposed on the dielectric layer 111, the dielectric layer 111 or the second stack 11b being superimposed on the first stack 1a.

[0052] Finally, the step represented by [Fig.4C] is the S3 step of stratification of the different layers of the final stack obtained at the end of the S2 step, allowing the encapsulation of the component 12 by creep of the resin 14.

[0053] This first method of implementing the manufacturing process is particularly well suited to components that do not need to be electrically connected to the PCB, for example magnetic cores.

[0054] Figures 5A-5E illustrate a second method of implementing the manufacturing process.

[0055] In this second embodiment, the method includes an initial step S0 which consists of electrically connecting the component 12 to a first stack of layers lia, for example by soldering or by creating a plated-through hole. The first stack of layers lia comprises, for example, a conductive layer 112, a dielectric layer 111 disposed on the conductive layer 112, and conductive tracks 113 disposed on the dielectric layer 111 and / or plated-through holes (or "vias") extending to the conductive layer 112 through the dielectric layer 111. The component 12 is then connected to the conductive tracks 113 or to the plated-through holes (or "vias").

[0056] The SI step of deposition of the decoupling layer 15 advantageously comprises two sub-steps S1 / 1 and S1 / 2, represented respectively by figures 5B and 5C: • S1 / 1: projection of the decoupling layer material 15 through a protective mask 16 disposed on the first stack of layers 1la and around the component 12, the protective mask 16 preventing the first stack 1la from being covered by the material of the decoupling layer 15; • S1 / 2: Removal of the protective mask 16.

[0057] Alternatively, the deposition of the decoupling layer 15 is carried out by a selective deposition targeting only component 12.

[0058] The stacking of layers 11 is finalized during step S2 of [Fig.5D] by arranging the pre-cut dielectric layers 11la-111b on the first stack 1la around the component 12, and then closing the cavity 13 thus obtained in the manner described previously in relation to [Fig.4B].

[0059] Finally, the step represented by [Fig.5E] is the S3 step of stratification of the different layers of the final stack obtained at the end of the S2 step, allowing the encapsulation of component 12 by creep of the encapsulation resin 14.

Claims

Demands

1. Printed circuit board (10) comprising: - a stack of layers (11) comprising a plurality of dielectric layers (111a, 111b); - a component (12) embedded in the stack of layers (11) and at least partially encapsulated by an encapsulation resin (14); - a decoupling layer (15) of the component (12) with respect to the encapsulation resin (14), the decoupling layer (15) being disposed between the component (12) and the encapsulation resin (14).

2. Printed circuit board (10) according to claim 1, wherein at least one of the dielectric layers (111b) of the stack is formed of a material comprising the encapsulation resin.

3. Printed circuit board (10) according to any one of claims 1 and 2, wherein the decoupling layer (15) is formed of a non-stick coating with respect to the encapsulation resin (14).

4. Printed circuit board (10) according to any one of claims 1 and 2, wherein the decoupling layer (15) is a thermomechanical stress damping layer.

5. Printed circuit board (10) according to claim 4, wherein the decoupling layer (15) is formed of a viscoelastic resin having a yield strength greater than 500 MPa or a dynamic viscosity less than 25 Pa.s or of a solid resin having a Young's modulus less than 500 MPa.

6. Printed circuit board (10) according to any one of claims 1 to 5, wherein the stack of layers (11) comprises an internal cavity (13) enclosing the component (12) and delimited by: - ​​a dielectric layer called support (111a) on which the component (12) is disposed; - at least one intermediate dielectric layer (111b) disposed on the dielectric support layer (11la) and surrounding the component (12); - a dielectric layer called closure (11la) of the cavity (13) disposed on said at least one intermediate dielectric layer (111b) and on the component (12).

7. A method for manufacturing a printed circuit board (10) comprising a buried component (12), comprising the following steps: - depositing (S1) a decoupling layer (15) on the component (12); - forming (S2) a stack of layers (11) in which a cavity (13) is provided, the component (12) covered with the decoupling layer (15) being housed in the cavity (13) and the stack (11) comprising at least one dielectric layer (111b) of a material comprising an encapsulating resin (14); and - carrying out a lamination of the different layers of the stack (11), so as to cause the encapsulating resin (14) to flow so as to fill the cavity (13) and at least partially coat the component (12) covered with the decoupling layer (15).

8. A method according to claim 7, wherein the stacking of layers (11) comprises an alternation of first dielectric layers (11a) and second dielectric layers (111b), the first dielectric layers (111a) being formed of a first dielectric material comprising a resin fully polymerized before the (S3) lamination step and the second dielectric layers (111b) being formed of a second dielectric material comprising the encapsulation resin (14), the encapsulation resin (14) being partially polymerized before the (S3) lamination step and fully polymerized after the (S3) lamination step.

9. A method according to any one of claims 7 and 8, wherein the decoupling layer (15) is deposited so as to completely cover the component (12) before it is inserted into the cavity (13) of the stack of layers (11).

10. A method according to any one of claims 7 and 8, further comprising a step (S0) of electrically connecting the component (12) to a first stack of layers (1a) and in which the decoupling layer (15) is deposited through a protective mask (16) disposed on the first stack of layers (1a), around the component (12).

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