Electronic device containing a Schottky diode
The integration of a Schottky diode in parallel with a PN junction diode in a gallium nitride-based electronic device addresses performance limitations, offering improved threshold voltage and reduced power dissipation, suitable for diverse electronic applications.
Patent Information
- Authority / Receiving Office
- FR · FR
- Patent Type
- Applications
- Current Assignee / Owner
- STMICROELECTRONICS INT NV
- Filing Date
- 2024-11-26
- Publication Date
- 2026-05-29
AI Technical Summary
Existing electronic devices incorporating diodes in gallium nitride-based semiconductor layers lack improvements in certain aspects, particularly in the integration and performance of Schottky diodes.
An electronic device is designed with a stack comprising a buffer layer, a gallium aluminum nitride barrier layer, and a gallium nitride doped layer, featuring a conductive channel and a metallic contact that forms a Schottky diode in parallel with a PN junction diode, with a common cathode or anode, and a metallic contact that adjusts the reverse voltage withstand.
The device achieves improved threshold voltage, faster switching, and reduced power dissipation, while minimizing the risk of parasitic gate formation, enhancing its suitability for various electronic components.
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Abstract
Description
Title of the invention: Electronic device comprising a Schottky diode technical field
[0001] This description relates generally to electronic devices and more particularly to electronic devices incorporating diodes. Prior art
[0002] Electronic devices have been proposed comprising a diode integrated in and on a gallium nitride (GaN)-based semiconductor layer.
[0003] It would be desirable to improve at least some aspects of such devices. Summary of the invention
[0004] To this end, an embodiment provides an electronic device comprising a stack of a buffer layer, a gallium aluminum nitride barrier layer and a gallium nitride doped layer, the barrier layer being in contact by its lower face with the upper face of the buffer layer and by its upper face with the lower face of the doped layer, a conductive channel being formed at the interface between the buffer layer and the barrier layer, in which the doped layer has a first portion doped with a first type of conductivity, and a second portion doped with a second type of conductivity, the first and second portions of the doped layer being in lateral contact with each other and defining a PN junction diode, the device further comprising a metallic contact, in contact with the conductive channel, defining a Schottky diode, connected in parallel with the PN junction diode,in which the metallic contact is also in contact with the first portion of the doped layer.
[0005] According to one embodiment, the buffer layer comprises aluminum nitride or gallium nitride.
[0006] According to one embodiment, the buffer layer is made of aluminum nitride, gallium nitride, aluminum-gallium nitride, or comprises one or more layers of aluminum-gallium nitride alternating with one or more layers of gallium nitride or aluminum nitride.
[0007] According to one embodiment, the PN junction diode and the Schottky diode have a common cathode.
[0008] According to one embodiment, the cathode is formed on the side of the second portion of the doped layer.
[0009] According to one embodiment, the PN junction diode and the Schottky diode have a common anode.
[0010] According to one embodiment, the anode is formed on the side of the first portion of the doped layer.
[0011] According to one embodiment, the metallic contact is in contact with the conducting channel via a metallic layer comprising titanium, nickel, gold, platinum, aluminum, tungsten, cobalt, palladium or one or more of these components.
[0012] According to one embodiment, the metallic contact is in lateral contact with the barrier layer and the doped layer and has, in these layers, stepped flanks.
[0013] Another embodiment provides a method for manufacturing an electronic device comprising a stack of a buffer layer, a gallium aluminum nitride barrier layer, and a gallium nitride-doped layer, the barrier layer being in contact via its lower face with the upper face of the buffer layer and via its upper face with the lower face of the doped layer, a conductive channel being formed at the interface between the buffer layer and the barrier layer, the method comprising a step of doping the doped layer so that it comprises a first portion doped with a first type of conductivity, and a second portion doped with a second type of conductivity, the first and second portions of the doped layer being in later contact with each other and defining a PN junction diode, the method further comprising a step of forming a metallic contact in contact with the conductive channel,defining a Schottky diode, connected in parallel with the PN junction diode, the metal contact also being in contact with the first portion of the doped layer.
[0014] According to one embodiment, the doping step of the doped layer corresponds to the doping of the second portion of the doped layer, the first portion of the doped layer being masked by a resin layer and the doped layer being initially doped with the first type of conductivity. Brief description of the drawings
[0015] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:
[0016] [Fig.1] is a partial and schematic cross-sectional view of an example of an electronic device according to one embodiment;
[0017] [Fig.2], [Fig.3], [Fig.4] and [Fig.5] are each a cross-sectional view of a structure obtained at the end of a step in a manufacturing process of the electronic device illustrated in [Fig.1]. Description of the implementation methods
[0018] The same elements have been designated by the same reference numerals in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.
[0019] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been represented and are detailed.
[0020] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements coupled together, this means that these two elements can be connected or linked through one or more other elements.
[0021] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.
[0022] Unless otherwise specified, the expressions "approximately", "roughly", and "on the order of" mean to within 10% or 10°, preferably to within 5% or 5°.
[0023] Fig. 1 is a partial, schematic cross-sectional view of an example of an electronic device 100 according to one embodiment.
[0024] The electronic device 100 comprises, for example, a substrate 102. The substrate 102 is, for example, made of a semiconductor material, for example silicon. Alternatively, the substrate 102 is made of sapphire, or silicon carbide.
[0025] By way of example, the substrate 102 has a thickness between 200 pm and 1.4 mm, for example on the order of 750 pm.
[0026] The device 100 further comprises a gallium nitride 103-based stack. The gallium nitride 103-based stack is, for example, in contact, by its lower face, with the upper face of the substrate 102.
[0027] The gallium nitride 103-based stack comprises, for example, a succession of layers of different natures, each extending, for example, over the entire upper surface of the substrate 102. The gallium nitride 103-based stack comprises a buffer layer 104, a barrier layer of gallium aluminum nitride 106 and a layer of gallium nitride 108.
[0028] By way of example, the buffer layer 104 is made of aluminum nitride, gallium nitride, or aluminum-gallium nitride. Alternatively, the buffer layer 104 comprises one or more layers of aluminum-gallium nitride alternating with one or more layers of gallium nitride or aluminum nitride, or any other arrangement of the aforementioned layers. The buffer layer 104 is, for example, in contact, by its lower face, with the upper face of the substrate 102. By way of example, the buffer layer 104 has a thickness in the range of 1 µm to 20 µm, for example, a thickness of approximately 15 µm.
[0029] The barrier layer 106 is, for example, in contact, by its lower face, with the upper face of the gallium nitride layer 104 and by its upper face, with the lower face of the gallium nitride layer 108. By way of example, the barrier layer 106 has a thickness in the range of 10 to 100 nm, for example a thickness of the order of 20 nm.
[0030] By way of example, the buffer layer 104 is unintentionally doped. The barrier layer 106, for example, is undoped. A conducting channel 110 is thus formed, for example, at the interface between the buffer layer 104 and the barrier layer 106, in which a two-dimensional (2DEG) electron gas is confined.
[0031] The layer 108 is, for example, in contact, by its lower face, with the upper face of the barrier layer 106 and by its upper face, with the lower face of the gallium nitride layer 108. By way of example, the layer 108 has a thickness in the range of 50 nm to 200 nm, for example a thickness of the order of 100 nm. The 108 layer has a first portion 108n, formed for example in a left part of the 108 layer, doped with a first type of conductivity, for example of type N. The 108 layer has a second portion 108p, formed for example in a right part of the 108 layer, doped with a second type of conductivity, for example opposite to the first type of conductivity, for example of type P. The first portion 108n and the second portion 108p of the 108 layer are in lateral contact.
[0032] By way of example, layer 108 is surmounted by a passivation stack 112. The passivation stack 112 makes it possible, for example, to protect the gallium nitride-based stack 103 from moisture. By way of example, the passivation stack 112 consists of several passivation layers. The passivation layers of the stack 112 are, for example, made of oxide and / or nitride. By way of example, the passivation layers are made of tetraethyl orthosilicate (TEOS). The passivation stack 112 covers, for example, the entire upper surface of layer 108. By way of example, the layer The layer 108 is separated from the passivation stack 112 by an optional plug layer 114, which protects the layer 108 from heat during the manufacturing process of the device 100. Thus, the plug layer 114 is in contact, on its lower surface, with the gallium nitride layer 108 and, on its upper surface, with the passivation stack 112. The plug layer 114 is, for example, made of nitride, such as aluminum nitride. Alternatively, the plug layer 114 is made of alumina. The plug layer 114 has, for example, a thickness in the range of 50 to 500 nm, for example, a thickness on the order of 100 nm.
[0033] By way of example, the passivation stack 112 is surmounted by a stack of insulating layers 116, for example, a stack of two insulating layers 116, in which metallic vias and tracks 118 are formed. By way of example, the device 100 thus comprises a lower insulating layer 116a, for example, in contact, by its lower face, with the upper face of the passivation stack 112. The insulating layer 116a is, for example, traversed by a track 118ap and by a via 118av surmounting, and in contact with, the track 118ap. By way of example, the electronic device further comprises an upper insulating layer 116b formed on the insulating layer 116a, and, for example, in contact with the insulating layer 116a. As an example, a track 118bp is formed in the insulating layer 116b. As an example, the insulating layer 116b is opened directly above the track 118bp so as to reveal and expose the upper face of the track 118bp.
[0034] By way of example, vias 120 extend, in addition, under the tracks 118ap, in the passivation stack 112, so as to connect the tracks 118ap to metallic contacts 122 formed in the GaN stack 103.
[0035] The insulating layers 116a and 116b are, for example, dielectric layers. By way of example, the insulating layers 116a and 116b are made of oxide. By way of example, the vias and traces 118 and 120 are made of a metallic material, for example copper, aluminum, or copper and aluminum.
[0036] By way of example, the device 100 has two metallic contacts 122 formed in the GaN stack 103. By way of example, the contacts 122 are in contact with the vias 120. The metallic contacts 122 pass, for example, through the plug layer 114 and the layer 108 so as to open into the barrier layer 106.
[0037] The device 100 includes, for example, a first metallic contact 122c passing through the portion 108n of the N-doped layer 108. The device 100 further includes, for example, a second metallic contact 122a passing through the portion 108p of the P-doped layer 108.
[0038] The 108n portion of the N-doped layer 108 and the 108p portion of the P-doped layer 108 define a PN junction DI diode. In this embodiment, the PN junction DI diode is thus horizontal or lateral (that is to say, the PN junction, defined The interface between the N-doped portion 108n of layer 108 and the P-doped portion 108p of layer 108 lies in a vertical plane. For example, layer 108n corresponds to the cathode of diode DI and layer 108p corresponds to the anode of diode Dl. As an example, the metallic contacts 122 allow for the reconnection of the anode and cathode of diode Dl. Thus, metallic contact 122c corresponds to the reconnection of the cathode of diode Dl and metallic contact 122a corresponds to the reconnection of the anode of diode Dl.
[0039] The metal contacts 122 are, for example, made of a metallic material. For example, the metal contact 122p is made of tungsten. For example, the metal contact 122c is made of copper, aluminum, or copper and aluminum.
[0040] By way of example, the metallic contact 122c is covered, on its lower face and its sides, with a metallic layer 124c. By way of example, the metallic layer 124c is made of titanium, aluminum or a titanium and aluminum alloy.
[0041] By way of example, the metallic contact 122a extends into a lower portion of the passivation stack 122 and into the layers 114, 108, and 106 in a stepped pattern. That is to say, the width of the contact decreases in steps from its upper face to its lower face. By way of example, the metallic contact 122a is wider in its upper portion, that is, the portion formed in the lower part of the passivation stack 122, than in its lower portion, that is, the portion formed in the barrier layer 106. By way of example, the metallic contact 122a has a stepped shape so as to adjust the reverse voltage withstand of diode D2.
[0042] By way of example, the metallic contact 122a is coated on its underside and sides with a metallic layer 124a. The metallic layer 124a comprises, for example, platinum, nickel, gold, titanium, aluminum, tungsten, cobalt, palladium, or a combination of several of these materials. By way of example, the metallic layer 124a is made of titanium nitride, tantalum nitride, or tungsten nitride.
[0043] The metal layer 124a then forms, at the interface with the 2DEG channel, a metal-semiconductor Schottky contact, defining a Schottky diode D2. For example, the layer 124c is an ohmic electrode in contact with the 2DEG channel and forms the cathode of diode D2. For example, the cathode contact of diode D2 is made via the metal contact 122c. For example, diode D2 has the metal contact 122a as its anode, via the metal layer 124a.
[0044] Diodes D1 and D2 are formed in parallel. For example, diodes D1 and D2 have a common anode. For example, diodes D1 and D2 also have a common cathode.
[0045] Fig. 2, Fig. 3, Fig. 4, Fig. 5 and Figure 6 are each a cross-sectional view of a structure obtained at the end of a step in a manufacturing process of the electronic device illustrated in Fig. 1.
[0046] Fig. 2 illustrates a starting structure comprising, on the substrate 102, a gallium nitride stack comprising the buffer layer 104, the barrier layer 106 and the layer 108. In the starting structure, the layer 108 is uniformly doped, of the P type.
[0047] The gallium nitride stack 103 formed on the substrate 102 is for example formed by epitaxy from the upper face of the substrate 102.
[0048] Fig. 3 illustrates a structure obtained at the end of a step of formation of the plug layer 114 on the upper face of the structure illustrated in Fig. 2.
[0049] More particularly, during this step, the plug layer 114 is deposited full plate on the upper face of the layer 108. The layer 114 is deposited for example with a constant thickness over the whole of the layer 108. The layer 114 is deposited for example with a thickness in the range from 1 nm to 15 nm.
[0050] Fig. 4 illustrates a structure obtained after a dopant implantation step in a portion of layer 108 of Fig. 3.
[0051] More specifically, in this step, a layer 126 is initially deposited on the upper surface of the structure illustrated in [Fig. 3]. The layer 126 is, for example, a layer made of a resin, for example, a layer made of a photosensitive resin. By way of example, after its deposition, the layer 126 is partially removed so as to be retained only opposite a portion of the layer 108, for example, on the right-hand side in [Fig. 4]. By way of example, the layer 126 is retained only opposite a portion of the layer 108 destined to become portion 108p of the layer 108. Thus, in this step, the layer 126 is removed opposite a portion of the layer 108 destined to become portion 108n of the layer 108.
[0052] In a second step, the structure thus formed with the layer 126 undergoes an implantation of N-type dopant atoms. As an example, the N-type dopant atoms are, here, silicon or germanium atoms.
[0053] At the end of this step, layer 126 is removed, for example.
[0054] Figure 5 illustrates a structure obtained after an annealing step of the structure illustrated in [Fig.4].
[0055] More specifically, during this step, the structure illustrated in [Fig. 4] is heated so as to activate and / or diffuse the N-type dopant atoms into the structure, and more precisely into layer 108, and even more precisely, into the portion of layer 108 not covered by layer 126. By way of example, during this step, the temperature is within a range of 500 °C to 1300 °C. During In this step, the plug layer 114 allows the barrier layer 106 to be protected from the heat of annealing.
[0056] During this step, the portion of layer 108 which is not protected by layer 126 is thus converted from a P-type doping to an N-type doping.
[0057] At the end of this step, layer 114 is also, for example, removed. Alternatively, layer 114 is not removed and is retained throughout the successive stages of the manufacturing process of device 100, but not shown below.
[0058] Following this step, the passivation stack 112 is, for example, deposited on the upper surface of the structure. Similarly, following this step, etching steps can be carried out to form the metallic contacts 122 and the metallic layers 124.
[0059] Finally, the insulating layers 116 and the vias and tracks 118 are formed on the passivation stack 112.
[0060] An advantage of the device in [Fig.1], comprising a Schottky diode in parallel with a PN junction diode, is that the threshold voltage of the PN junction diode is greater than the threshold voltage of the Schottky diode.
[0061] The Schottky diode D2 has the advantage, compared to the PN junction diode D1, of being fast and having a lower forward voltage drop. The PN junction diode D1, on the other hand, can withstand higher overvoltages than the Schottky diode D2.
[0062] One advantage of forming a Schottky diode in parallel with a PN junction diode is that the PN junction diode only becomes forward-biased when there is a strong current inrush.
[0063] One advantage of forming a Schottky diode in parallel with a PN junction diode is that it allows the Schottky diode to be preserved, which is capable of dissipating less power than a PN junction diode.
[0064] An advantage of forming the Schottky diode in the conducting channel, under the PN junction diode is that, compared to an embodiment where the Schottky diode is formed under the passivation layer on the surface of the GaN 103 stack, the risk of formation of a parasitic gate, reducing the 2DEG channel circulation, between the cathode and the anode under the passivation layer is reduced.
[0065] Many applications are likely to benefit from the advantages provided by the electronic device 11, this device 11 being able to be integrated into various types of components.
[0066] By way of example, the device 11 can be integrated into a component intended for the automotive industry. The electrification of motor vehicles is causing a sharp increase in the number of electronic components present in vehicles. The component includes, for example, thyristors, rectifiers, diodes of Transient voltage suppression, modules, etc., are intended to be incorporated into these vehicles. Furthermore, driver assistance and automated driving systems are leading to an increase in the number of electronic components in vehicles. These components include, for example, transient voltage suppression diodes, electrostatic discharge protection, and common-mode filters to protect the component against electrical hazards.
[0067] By way of example, the device 11 can be integrated into a component intended for industrial use. In particular, the component is used, for example, for the development of green energy or for the electrification of infrastructure, for example, for charging stations or for solar energy collection. The component can also be used in the field of the Internet of Things or in the field of smart homes. The component is intended, for example, to be implemented in electrical power supply circuits for equipment, including, for example, 800 V or 1200 V thyristors, ultrafast 1200 V and silicon carbide diodes, transient voltage suppression diodes, and electrostatic discharge protection. The component can also be used for the implementation of cloud computing systems, 5G radio frequency communication networks, data centers, and servers.The component includes, for example, materials with a wide band gap.
[0068] By way of example, the device 11 can be integrated into a component intended for use in personal electronics, for example, to increase the volume of information exchanged via radio frequency communication, in 5G communication systems, or more generally in any connected component. The component is, for example, a mobile phone, or smartphone, or is part of an Internet of Things network. The component is, for example, connected via 5G, Wi-Fi, or broadband communication. The component includes, for example, high-speed interfaces, for example, with advanced filtering and protection against electrostatic discharge.
[0069] By way of example, the device 11 can be integrated into a component intended for use in communication equipment, or in computers and peripherals. The component is used, for example, in 5G infrastructures and dedicated data centers. The component includes, for example, silicon carbide diodes, Schottky power transistors, electrostatic discharge protection devices, and transient voltage suppression diodes. The component can also be used in satellites, including, for example, integrated passive components for radio frequency applications.
[0070] Various embodiments and variations have been described. A person skilled in the art will understand that certain features of these various embodiments and variants could be combined, and other variants will appear to the person of the trade.
[0071] Finally, the practical implementation of the embodiments and variants described is within the reach of a person skilled in the art, based on the functional indications given above.
Claims
Demands
1. Electronic device (100) comprising a stack of a buffer layer (104), a barrier layer (106) of gallium aluminum nitride and a doped layer (108) of gallium nitride, the barrier layer (106) being in contact by its lower face with the upper face of the buffer layer (104) and by its upper face, with the lower face of the doped layer (108), a conductive channel (110) being formed at the interface between the buffer layer (104) and the barrier layer (106), in which the doped layer (108) has a first portion (108p) doped with a first type of conductivity (P), and a second portion (108n) doped with a second type of conductivity (N), the first portion and the second portion of the doped layer (108) being in lateral contact with each other and defining a PN junction diode (Dl), the device further comprising a metallic contact (122a), in contact with the conductive channel (110),defining a Schottky diode (D2), connected in parallel with the PN junction diode (D1), in which the metal contact (122a) is further in contact with the first portion (108p) of the doped layer (108).
2. Device (100) according to claim 1, wherein the buffer layer (104) comprises aluminum nitride or gallium nitride.
3. Device (100) according to claim 2, wherein the buffer layer (104) is of aluminium nitride, gallium nitride, aluminium-gallium nitride, or comprises one or more layers of aluminium-gallium nitride alternating with one or more layers of gallium nitride or aluminium nitride.
4. Device (100) according to any one of claims 1 to 3, wherein the PN junction diode (D1) and the Schottky diode (D2) have a common cathode.
5. Device (100) according to claim 4, wherein the cathode is formed on the side of the second portion (108n) of the doped layer (108).
6. Device (100) according to any one of claims 1 to 5, wherein the PN junction diode (D1) and the Schottky diode (D2) have a common anode.
7. Device (100) according to claim 6, wherein the anode is formed on the side of the first portion (108p) of the doped layer (108).
8. Device (100) according to any one of claims 1 to 7, wherein the metallic contact (122a) is in contact with the conducting channel (110) via a metallic layer (124a) comprising titanium, nickel, gold, platinum, aluminum, tungsten, cobalt, palladium or one or more of these components.
9. Device (100) according to any one of claims 1 to 8, wherein the metallic contact (122a) is in lateral contact with the barrier layer (106) and the doped layer (108) and has, in these layers, stepped flanks.
10. A method for manufacturing an electronic device (100) comprising a stack of a buffer layer (104), a gallium aluminum nitride barrier layer (106), and a gallium nitride doped layer (108), the barrier layer (106) being in contact via its lower face with the upper face of the buffer layer (104) and via its upper face with the lower face of the doped layer (108), a conductive channel (110) being formed at the interface between the buffer layer (104) and the barrier layer (106), the method comprising a step of doping the doped layer (108) so that it comprises a first portion (108p) doped with a first type of conductivity, and a second portion (108n) doped with a second type of conductivity, the first and second portions of the doped layer (108) being in laterally contact with each other on the other hand, and defining a PN junction diode (Dl),the process further comprising a step of forming a metallic contact (122a), in contact with the conducting channel (110), defining a Schottky diode (D2), connected in parallel with the PN junction diode (D1), the metallic contact (122a) also being in contact with the first portion (108p) of the doped layer (108).
11. A method according to claim 10, wherein the doping step of the doped layer (108) corresponds to the doping of the second portion (108n) of the doped layer, the first portion (108p) of the doped layer (108) being masked by a resin layer and the doped layer being initially doped with the first type of conductivity.