Electronic device

The use of an AC power source to monitor impedance and detect voltage amplitude differences in analog-to-digital converters addresses reliability and safety challenges, enhancing error detection without increasing complexity or resource usage.

JP2024170377APending Publication Date: 2024-12-10INFINEON TECHNOLOGIES AG
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Patent Information

Application Number
JP2024076331
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-05-10
Filing Date
2024-05-09
Publication Date
2024-12-10

AI Technical Summary

Technical Problem

Electronic devices with analog-to-digital converters face challenges in achieving high reliability and safety standards, such as ASIL-D, while minimizing complexity, chip area, and power consumption, particularly in detecting errors in the connection of signal sources like sensors.

Method used

An electronic device with a detection circuit that uses an alternating current (AC) power source to monitor the impedance at the analog-to-digital converter input, determining voltage amplitude differences to detect errors by comparing against a predetermined threshold, and filtering the output to generate an error signal.

Benefits of technology

This approach enhances reliability and safety by effectively detecting connection errors in analog signal sources, reducing the need for redundant components and minimizing chip area and power consumption.

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Abstract

SOLUTION: To provide an electronic device 800 that includes a device input 801 for connecting an analog signal source, an analog-to-digital converter (ADC) having an ADC input connected to the input, an AC power source 805 supplying AC to the ADC input, and a detection circuit, and in which the detection circuit stores a reference for the amplitude of a voltage signal at the ADC input caused by the AC, receives an output of the ADC, determines the amplitude of the voltage signal at the ADC input caused by the AC by filtering the output of the ADC, and outputs an error signal when the reference for the amplitude differs from the determined amplitude by more than a predetermined threshold.EFFECT: Errors in the operation of an electronic device, particularly in the connection from a signal source such as a sensor to an analog-to-digital converter, can be efficiently detected.SELECTED DRAWING: Figure 8
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Description

[Technical field]

[0001] The present disclosure relates to electronic devices, and in particular to analog-to-digital converter devices. [Background technology]

[0002] Electronic devices such as analog-to-digital converter devices, i.e. devices providing analog-to-digital conversion functionality for processing analog sensor signals, for example, may have high requirements regarding their reliability, depending on where they are used. For example, electronic control units in cars with analog-to-digital converters typically require high safety standards to be met (such as ASIL (Automotive Safety Level) D). This includes, in particular, robustness against errors in the connections of various components, such as the connection of sensors to the analog-to-digital converter. High reliability can be achieved by various approaches, but these approaches increase the complexity, and thus, for example, the required chip area, power consumption and cost, by providing redundant elements, such as two analog-to-digital converters whose outputs are compared being connected separately. Therefore, an efficient approach for detecting errors in the operation of electronic devices, in particular the connections from signal sources (such as sensors) to the analog-to-digital converters, is desired. Summary of the Invention [Means for solving the problem]

[0003] According to various embodiments, an electronic device is described, the electronic device comprising: an analog-to-digital converter having a device input for connecting an analog signal source; an analog-to-digital converter input connected to the device input; an AC power source configured to supply AC to the analog-to-digital converter input; and a detection circuit configured to store a reference for an amplitude of a voltage signal at the analog-to-digital converter input caused by the AC; receive an output of the analog-to-digital converter; determine an amplitude of the voltage signal at the analog-to-digital converter input caused by the AC by filtering the output of the analog-to-digital converter; and output an error signal if the reference for the amplitude differs from the determined amplitude by more than a predetermined threshold.

[0004] In the drawings, like reference characters generally refer to the same parts throughout the several views. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention. Various aspects are now described with reference to the following drawings: [Brief description of the drawings]

[0005] [Figure 1] 1 illustrates an electronic device. [Diagram 2] 1 illustrates an electronic device with a diagnostic mechanism according to one embodiment. [Diagram 3] 3 shows a graph illustrating an example of a signal in the electronic device of FIG. 2; [Figure 4] 1 illustrates an electronic device with a diagnostic mechanism for detecting errors for multiple analog signal sources. [Diagram 5] 1 shows high frequency time division multiplexing for error detection. [Figure 6] 1 illustrates an exemplary implementation of an IDAC (Current Digital to Analog Converter) according to one embodiment. [Figure 7] 1 shows a graph illustrating an example of an IDAC output current. [Figure 8] 1 illustrates an electronic device according to one embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0006] The following detailed description refers to the accompanying drawings, which show by way of example specific details and aspects of this disclosure in which the invention may be practiced. Other aspects may be utilized and structural, logical and electrical changes may be made within the scope of the present invention. The various aspects of this disclosure are not necessarily mutually exclusive, as some aspects of this disclosure may be combined with one or more other aspects of this disclosure to form new aspects.

[0007] FIG. 1 shows an electronic device 100 .

[0008] For example, the electronic device 100 is in particular an electronic control unit (ECU) for a vehicle, but may also be a control unit or data processing device for other devices such as machines, generators, etc.

[0009] The electronic device 100 has a first input 101, for example implemented by a first (e.g. package) input terminal (e.g. pin or pad), via which the electronic device 100 may be connected to a first analog signal source 102, for example a sensor or a power supply to be monitored (for example an analog-to-digital converter is used to monitor (e.g. measure) an external supply rail and an alarm is triggered if the external supply rail leaves a predefined (voltage) range). The electronic device 100 comprises an analog-to-digital converter (ADC) 103 for converting the analog signal provided by the first analog signal source 102 into a digital signal. The ADC 103 thus has an ADC input 104 connected to the input 101.

[0010] A first analog signal source 102 is connected to a first input 101 via a connection having a specific resistance 105 and a specific capacitance 106. When the ADC 103 is considered as a load, this causes the output impedance of the first analog signal source 102 (together with the characteristics of the first analog signal source 102).

[0011] From the perspective of the ADC input 104, the ADC input 104 is connected to the resistance 105, capacitance 106 and impedance Z of the first analog signal source 102. S (typically 0 to 50 kΩ), i.e., the ADC input 104 “sees” a particular input impedance Z in See.

[0012] When the ADC input 104 is connected to the first analog signal source 102, (Z in Although errors (changing the control logic) may occur, the errors must be detectable, for example, to achieve ASIL-D. The connection between the first analog signal source 102 and the ADC input 104 may have a line resistance (represented by the second resistor 107) increase from its nominal value (which may be close to zero). For example, Z in The increase in Z S 10% of (or Z S = 100 Ω when 0 is detectable). There may be an electrical connection (i.e. lack of isolation, e.g. short circuit) with a second input 109 (e.g. second input pin), represented by a third resistor 108, through which, for example, a second analog signal source 110 is connected or connectable. This kind of connection, for example, of 500 kΩ or less, or even 1 MΩ or less, must be detectable.

[0013] Considering this kind of error in connecting the analog signal source to the ADC (or the error resulting from this kind of connection error), it should be noted that functional safety can be achieved by providing redundancy, for example by providing separate connections to the two ADCs. However, this increases the number of required inputs (e.g., input pins) and the required circuitry (and thus, for example, chip area). Furthermore, although diagnostic mechanisms 111 such as CSD (core self-diagnosis) and BWD (break wire detection) may be used for the ADC, this (without redundancy) may not be sufficient to achieve high functional safety requirements such as ASIL-D (e.g., only ASIL-B may be achieved).

[0014] Therefore, the embodiments provide a highly secure diagnostic mechanism 112 to achieve the required level of functional safety.

[0015] FIG. 2 illustrates an electronic device 200 with a diagnostic mechanism according to one embodiment.

[0016] Similar to the electronic device 100 of FIG. 1, the electronic device 200 may be, for example, an electronic control unit (ECU) particularly for a vehicle, but may also be a control unit or data processing device for other devices such as machines, generators, etc.

[0017] As described with respect to FIG. 1, the electronic device 200 similarly has two inputs 201, 209, and must connect analog signal sources 202, 210 to an ADC 203 having an (ADC) input 204 and detect errors represented by resistors 207, 208.

[0018] For this detection, an alternating current (AC) source is provided, in this example an AC IDAC (current digital to analog converter) 211, whose output is connected to the ADC input 204. As mentioned above, the AC IDAC 211 is a power source that is connected to a load impedance Z L ) input impedance Zin The input impedance Z in changes if one or both of the errors represented by resistors 207, 208 occur.

[0019] According to various embodiments, this fact is used to detect one or both of the errors represented by resistors 207, 208. Specifically, the voltage at ADC input 204 caused by the alternating current provided by AC IDAC 211 is monitored. This performs an analog-to-digital conversion of the voltage at ADC input 204 and the current I provided by AC IDAC 211. IDAC Frequency f IDAC This is done by determining the amplitude of a component of this voltage, VRES_FILTERED, which corresponds to VRES_FILTERED. Determining this component may be done with a digital (e.g., bandpass) filter applied to the output of ADC 203, or by Fourier analysis (e.g., performing an FFT) on the output of ADC 203. The act of extracting the digital voltage component of the ADC input voltage is represented in FIG. 2 by filter or FFT block 212. The error represented by resistors 207, 208 may be detected based on VRES_FILTERED, for example by detector 213, VRES_FILTERED=I IDAC xZ in holds true.

[0020] Specifically, the error represented by resistors 207, 208 may be detected as follows. A criterion for VRES_FILTERED is determined (and / or defined) and stored, for example, in the detector 213. This criterion may be determined, for example, by a formula, by a look-up table and / or by an initial measurement (i.e. a measurement when it is certain that both errors represented by the resistors 207, 208 have not occurred). For example, the criterion is determined by an initial measurement and the measurement is checked for validity by comparing it with a value given by the formula and / or the look-up table (e.g. Z from the look-up table). in (determined from no error), VRES_FILTERED=I IDAC xZ in Determining the criteria from is optional. VRES_FILTERED is then repeatedly determined (e.g. periodically, continuously or in response to a test command) and the detector 213 checks whether the determined VRES_FILTERED is within a predetermined tolerance of the criteria for VRES_FILTERED (e.g. 10% or some other (low) percentage or absolute value). If it is not within the predetermined tolerance, the detector 213 considers this as an occurrence of one or both of the errors represented by the resistors 207, 208 and outputs an error (or alarm) signal, which for example triggers a security mechanism (such as entering a safe mode).

[0021] A low-pass filter (not shown in FIG. 2) may be provided at the ADC output, which is IDAC Note that the effect of the analog signal is removed and a "clean" digital signal is generated by analog signal source 202 for further processing.

[0022] FIG. 3 illustrates a voltage signal V provided by a first analog signal source 202. IN (first curve 302) and the amplitude VRES_FILTERED and frequency f IDAC V modulated by a signal having IN3, the voltage signal at the ADC input 204 (second curve 303) with amplitude VRES_FILTERED and frequency f IDAC 3 shows a first graph 301 with an example of a signal having (third curve 304) and

[0023] A second graph 305 shows the change in amplitude of the signal of the third curve 304, i.e., the change in VRES_FILTERED from its reference, for 1 MΩ (i.e., when the second resistor 108 has a value of 1 MΩ). In this example, the value is Z S = 0, and a leakage of 1 MΩ is Z in This means a 1% change in VRES_FILTERED. In the illustrated example, the difference between VRES_FILTERED and the reference is 10.26mV. This means that the detection mechanism is sensitive enough for a 12-bit SAR (successive approximation register) ADC in this exemplary use case.

[0024] The example of FIG. 3 may mean "the supply (e.g., sensor) is shorted to the (adjacent) supply (e.g., sensor) through 1 MΩ." Similarly, an increase in line impedance (i.e., the value of the first resistor 107 above 0) may be detected. For example, a difference of more than 12 mV between VRES_FILTERED and its reference may indicate an increase in Z S = 0Ω and the value of the first resistor 107 is 100Ω and Z S = 50kΩ and Z in An impedance increase of 10% is observable.

[0025] FIG. 4 illustrates an electronic device 400 with a diagnostic mechanism for detecting errors for multiple analog signal sources.

[0026] In contrast to the example of FIG. 2, here multiple analog signal sources 402 may be connected to node 401 via respective connection lines or networks having respective switches 407 and respective resistors 405 and capacitors 406 .

[0027] For example, each switch 407 has one side connected to a respective input terminal of an electronic device and the other side connected to node 401. Node 401 is connected to (or is) input node 404 of ADC 403, and AC IDAC 411 is connected to input node 404 of ADC 403, as in FIG.

[0028] In order to detect errors for each analog signal source 402 (i.e. for each of the analog signal sources 402, a short circuit relative to each other or an increase in the impedance of its connection to the ADC), the ADC results are separated by a demultiplexer 408 according to multiple channels, in this example a filter (or FFT) 412 is provided to provide the voltage at the ADC input 404 caused by the alternating current provided by the AC IDAC 411, and a low pass filter 413 is provided for each channel to filter the I IDAC The effects of the analog signals are removed and a "clean" digital signal is generated by each analog signal source 402. Each channel is associated with a respective one of the analog signal sources 402.

[0029] For example, errors are detected for the analog signal sources 402 one after the other. The switch 407 for one of the analog signal sources 402 is closed and the rest are open, and the demultiplexer 408 provides the ADC result to the low pass filter 413 and filter (or FFT) 412 associated with the analog signal sources 402. Then, as described with respect to FIG. 2, error detection can be performed, i.e., the switch 407 for one of the analog signal sources 402 is closed and the rest are open for a few cycles of the ADC sampling clock, error detection is performed for the analog signal source whose switch is closed during that ADC clock cycle, and then the switch configuration is changed, i.e., the switch for another one of the analog signal sources 402 is open and the rest are closed, and the demultiplexer 408 provides the ADC result to the other low pass filter 413 and filter (or FFT) 412 (in this example, a single filter (or FFT) 412 may be sufficient).

[0030] If the frequencies of the signals provided by the analog signal sources 402 are sufficiently different, the ADC output signals may be provided to all low pass filters 413 (which in this case may be band pass filters for each frequency). In that case, joint error detection (i.e. detection of whether an error occurs in any of the analog signal source connections) may be performed (i.e. all analog signal sources 402 are connected (all switches 407 are closed) and detection is performed based on the output of a single filter (or FFT) 412 receiving the ADC output signals). In this way, frequency division multiplexing does not sacrifice the ADC data rate (because all channels benefit from the full ADC data rate).

[0031] Alternatively, the IDAC current I IDAC is capable of time division multiplexing at high frequencies (I IDAC Multiple times per one, for example, a certain number of times in stages IDAC Assuming that, one level of I IDAC The sampling time for analog signal source 402 (i.e., each channel) is different, and when ADC 403 samples the analog signal source, switch 407 closes for analog signal source 402. This is described in more detail with respect to FIG.

[0032] FIG. 5 shows high frequency time division multiplexing for error detection.

[0033] The first graph 501 shows a stepwise constant IDAC current I IDAC That is, the IDAC current I IDAC is constant during each of a plurality of time intervals. Each time interval is separated into a first portion 502 that is assigned to a first channel CH_1 and a second portion 503 that is assigned to an nth channel CH_N (thus, a time interval may be separated into more than n portions, where n can be greater than 2).

[0034] During a first portion of each time interval, the switch 407 for the analog signal source 402 associated with CH_1 is closed, the ADC samples the input voltage, and the demultiplexer provides the ADC output to CH_1.

[0035] During the second portion of each time interval, the switch 407 for the analog signal source 402 associated with CH_N is closed, the ADC samples the input voltage, and the demultiplexer provides the ADC output to CH_N.

[0036] A second graph 504 shows the signal of the analog signal source 402 associated with CH_1 modulated by the IDAC and sampled by the ADC during a first portion of the time interval (first curve 505) and the signal of the analog signal source 402 associated with CH_N modulated by the IDAC and sampled by the ADC during a second portion of the time interval (second curve 506). Additionally, the filtered ADC output for CH_1 is shown (third curve 507).

[0037] Therefore, all channels can share a single IDAC current through time division multiplexing. The modulation amplitude depends on the duty cycle of the time interval portion (because, depending on the duty cycle, the current is supplied for a longer or shorter time, leading to a higher or lower voltage at the ADC input). All channels can be modulated simultaneously.

[0038] FIG. 6 shows an exemplary implementation of an (open loop) IDAC 600.

[0039] The IDAC may be implemented as multiple pairs of pull-up legs 601 and pull-down legs 602 connected in parallel, i.e., the output of each pair (which is the node of the connection of the pull-up and pull-down legs) is connected to the output 603 of the IDAC.

[0040] Both the pull-up leg and the pull-down leg include, for example, a current source (eg, implemented by one or more pull-up transistors or one or more pull-down transistors, respectively).

[0041] For each pair, the pull-up leg, when activated, increases the output current of the IDAC 300, while the pull-down leg, when activated, decreases the output current of the IDAC 300.

[0042] The controller 604 receives a digital input value and activates pairs of pull-up and pull-down legs such that the output current corresponds to the digital input value. For example, each pair corresponds to one bit position of the digital input value and is sized accordingly. The output current is thus an analog representation of the digital input value.

[0043] By providing a suitable sequence of digital input values ​​(and thus, in effect, pulse widths modulating the pull-up and pull-down legs), an approximation of a sinusoidal output current can be generated. This sequence may be coupled to the ADC operation (i.e., one or more ADC operating signals or parameters may define the sequence).

[0044] FIG. 7 shows a graph 700 illustrating an example of an IDAC output current.

[0045] In this example, the IDAC output current is generated by four legs (e.g., each with a p-MOS leg and an n-MOS leg). For the highest level, all four pull-up legs are activated, and for the lowest level, all four pull-down legs are activated.

[0046] The number of legs (and therefore the bits of the digital input value) may be chosen according to a trade-off between complexity and noise injection.

[0047] In summary, according to various embodiments, there is provided an electronic device as shown in FIG.

[0048] FIG. 8 illustrates an electronic device 800 according to one embodiment.

[0049] The electronic device 800 comprises a device input 801 for connecting an analog signal source 802 and an analog to digital converter 803 having an analog to digital converter input 804 connected to the device input 801 .

[0050] The electronic device 800 further comprises an AC power supply 805 configured to supply AC to the analog-to-digital converter input 804 .

[0051] Furthermore, the electronic device 800 comprises a detection circuit 806 (for example corresponding to a detector and a filter or an FFT block in the above examples, and possibly further components such as a memory, such as one or more registers), which detects storing a reference for the amplitude of the voltage signal at the analog-to-digital converter input 804 caused by the alternating current; Receive the output of the analog-to-digital converter 803; determining the amplitude of the voltage signal at the analog-to-digital converter input 804, caused by the alternating current, by filtering the output of the analog-to-digital converter 803 (it should be understood here that filtering includes performing a spectral (e.g., Fourier) analysis and taking only the frequency components of interest); If the criterion for the amplitude differs from the determined amplitude by more than a predefined threshold (e.g. 10%), output an error signal 807. The error signal may be processed internally within the electronic device or externally, for example by other components of an electronic system (e.g. an apparatus or component), the electronic device being a component of an electronic system.

[0052] According to various embodiments, when the ADC is operational and connected to an external (analog) signal source, e.g., an external sensor or a power supply, an IDAC (current digital-to-analog converter), for example, uses the ADC to provide an AC stimulus for (input) impedance measurements and to detect connection errors, such as package pin failures.

[0053] The criteria for the input impedance may be determined from a formula, a look-up table, and / or an initial measurement (e.g., during manufacturing test). The characteristics related to the input impedance thus determined may be used for a validity check of the criteria.

[0054] The AC current (e.g., IDAC) has a different frequency (e.g., 1-10 kHz) compared with the analog input signal of the analog signal source. Therefore, the analog input signal is modulated by the IDAC current. After data conversion, the information about the error detection and the information about the analog input signal (e.g., sensor information) can be separated by a digital filter or FFT so that there is no loss of sampling rate during detection.

[0055] In the case of multiple analog signal sources, a single AC power source (e.g., an IDAC) may be used by using time division multiplexing, which reduces chip area (and therefore cost) compared to implementations using multiple IDACs.

[0056] Note that the AC source (e.g., IDAC) may also be connected to the ADC inputs via a switch (see, e.g., FIG. 4). This switch is controlled, for example, as follows: when one of the inputs is connected, the switch closes and supplies current to the input to which the AC source is connected. When all inputs (or, in general, terminals, which may include output terminals) are disconnected, the voltages at the ADC inputs should not change in order to convert the respective analog voltages to digital (e.g., for measurement).

[0057] Various examples are given below.

[0058] Example 1 is the electronic device described with reference to FIG.

[0059] Example 2 is the electronic device of example 1, wherein the AC power source is configured to generate an AC current having a predetermined frequency.

[0060] Example 3 is the electronic device of Example 2, wherein the alternating current has a predetermined frequency, and the detection circuit is configured to determine an amplitude of a voltage signal at the analog-to-digital converter input caused by the alternating current by filtering the output of the analog-to-digital converter to determine a frequency component of the output of the analog-to-digital converter having the predetermined frequency.

[0061] Example 4 is the electronic device of any of Examples 1 to 3, wherein an AC power source is connected to the analog-to-digital converter input and a load impedance of the AC power source depends on the impedance of a connection of the analog-to-digital converter input to the device input.

[0062] Example 5 is the electronic device of any of Examples 1 to 4, wherein the error signal indicates an error in a connection of the analog-to-digital converter input to the device input.

[0063] Example 6 is the electronic device of any of Examples 1 to 5, wherein the device input is implemented by an input terminal of the electronic device.

[0064] Example 7 is the electronic device of any of Examples 1 to 6, wherein the electronic device comprises one or more additional terminals.

[0065] Example 8 is the electronic device of example 7, wherein the error signal indicates an error in isolation between the input terminal and the one or more additional terminals.

[0066] Example 9 illustrates an electronic device comprising a plurality of device inputs including a device input, the electronic device comprising, for each respective device input of the plurality of device inputs, a respective switch for connecting and disconnecting the respective device input from the analog-to-digital converter input, and the detection circuitry comprising, for each respective device input of the plurality of device inputs: storing a reference for the amplitude of a voltage signal at the analog-to-digital converter input caused by an alternating current when each device input is connected to the analog-to-digital converter input and other device inputs of the plurality of device inputs are disconnected from the analog-to-digital converter input; ● receiving an output of the analog-to-digital converter when each of the device inputs is connected to an analog-to-digital converter input and other device inputs of the plurality of device inputs are disconnected from the analog-to-digital converter input; determining an amplitude of a voltage signal at the analog-to-digital converter input caused by an alternating current by filtering the output of each of the analog-to-digital converters received from the analog-to-digital converter; configured to output an error signal if the criteria for the amplitude differ from the determined amplitude by more than a respective predetermined threshold; An electronic device according to any one of Examples 1 to 8.

[0067] Example 10 is the electronic device of example 9, wherein each device input of the plurality of device inputs is used to connect a respective analog signal source.

[0068] Example 11 is the electronic device of Example 9 or 10, wherein the electronic device comprises a controller, and the controller is configured, for association of each device input of the plurality of device inputs to a respective time interval of the sequence of time intervals, and for each time interval of the sequence of time intervals, to connect the device input associated with the time interval to the analog-to-digital converter and to disconnect other device inputs of the plurality of device inputs from the analog-to-digital converter during the time interval.

[0069] Example 12 is the electronic device of Example 11, wherein the electronic device includes a demultiplexer configured to separate the output of the analog-to-digital converter into a plurality of channels, including one channel for each device input of the plurality of device inputs, the demultiplexer configured, for each time interval of the sequence of time intervals, to provide the output of the analog-to-digital converter to a channel for a device input associated with the time interval during the time interval, and the detection circuit configured, for each device input, to determine an amplitude of a voltage signal at the analog-to-digital converter input caused by the alternating current by filtering the output of the analog-to-digital converter provided to the channel associated with the device input.

[0070] Example 13 is the electronic device of any of Examples 1 to 12, wherein filtering the output of the analog-to-digital converter includes applying a digital filter to the output configured to block frequency components that do not correspond to alternating current or performing a spectral analysis of the output and discarding frequency components that do not correspond to alternating current.

[0071] Example 14 is the electronic device of any of Examples 1 to 13, wherein the AC power source is a current digital-to-analog converter.

[0072] Example 15 is the electronic device of Example 14, wherein the current digital-to-analog converter is implemented with a plurality of parallel leg pairs, each leg pair including a pull-up leg and a pull-down leg that are activated and deactivated according to a digital input value to the current digital-to-analog converter in a sequence of digital input values ​​that define a frequency and amplitude of the alternating current.

[0073] Example 16 is an electronic system comprising the electronic device of any of Examples 1 to 15 and an analog signal source connected to an input of the device.

[0074] Example 17 is the electronic system of example 16, wherein filtering the output of the analog-to-digital converter includes filtering the output of the analog-to-digital converter with a filter that passes frequency components at the frequency of the alternating current and blocks frequency components provided to the device input by the analog signal source.

[0075] Example 18 is the electronic system of example 16 or 17, wherein the analog signal source is a sensor.

[0076] Example 19 is the electronic system of example 16, wherein the electronic system comprises a plurality of analog signal sources.

[0077] Example 20 is an electronic system comprising the electronic device of any of Examples 10 to 12 and respective analog signal sources for each of the device inputs, wherein the analog signal sources are configured to provide signals of different frequencies to the electronic device.

[0078] Although specific embodiments have been illustrated and described herein, it will be recognized by those skilled in the art that various alternative and / or equivalent implementations may be substituted for the specific embodiments illustrated and described without departing from the scope of the invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. It is therefore intended that the present invention be limited only by the claims and the equivalents thereof. [Explanation of symbols]

[0079] 100 Electronic Devices 101 Input 102 Analog Signal Source 103 Analog-to-Digital Converter (ADC) 104 ADC inputs 105 Connection impedance 106 Connection Capacity 107 Resistance that expresses impedance increase error 108 Resistor representing an isolation (short) error 109 Input 110 Analog Signal Source 111, 112 Diagnostic mechanism 200 Electronic Devices 201 Input 202 Analog Signal Source 203 Analog-to-Digital Converter (ADC) 204 ADC inputs 207 Resistance to express impedance increase error 208 Resistor representing short circuit error 209 Input 210 Analog Signal Source 211 AC IDAC 212 Digital Filter or FFT 213 Detector 301 Graph 302~304 curve 305 Graph 400 Electronic Devices 401 Node 402 Analog Signal Source 403 Analog-to-Digital Converter (ADC) 404 ADC inputs 405 Connection Impedance 406 Connection Capacity 407 Switch 408 Demultiplexer 411 AC IDAC 412 Filter or FFT 413 Low-pass filter 501 Graph 502, 503 Time interval part 504 Graph 600 IDAC 601 Leg Pull-up 602 Pulldown Leg 603 IDAC Output 604 Controller 700 graphs 800 Electronic Devices 801 Input 802 Analog Signal Source 803 Analog to Digital Converter (ADC) 804 ADC inputs 805 AC power supply 806 Detection Circuit 807 Error Signal

Claims

1. a device input for connecting an analog signal source; an analog-to-digital converter having an analog-to-digital converter input connected to the device input; an AC power source configured to provide AC to the analog to digital converter input; A detection circuit; An electronic device comprising: The detection circuit includes: storing a reference for the amplitude of a voltage signal at the analog to digital converter input caused by the alternating current; receiving an output of the analog-to-digital converter; determining the amplitude of the voltage signal at the analog to digital converter input caused by the alternating current by filtering the output of the analog to digital converter; outputting an error signal if the criterion for the amplitude differs from the determined amplitude by more than a predetermined threshold.

2. An electronic device configured to:

2. the AC power source is configured to generate the AC power having a predetermined frequency; The electronic device of claim 1 .

3. the alternating current has a predetermined frequency, and the detection circuit is configured to determine the amplitude of the voltage signal at the analog-to-digital converter input caused by the alternating current by filtering the output of the analog-to-digital converter to determine a frequency content of the output of the analog-to-digital converter having the predetermined frequency. The electronic device of claim 2 .

4. the AC power source is connected to the analog to digital converter input, and a load impedance of the AC power source depends on the impedance of a connection of the analog to digital converter input to the device input; 4. An electronic device according to claim 1.

5. the error signal indicates an error in a connection of the analog-to-digital converter input to the device input.

5. An electronic device according to claim 1.

6. The device input is implemented by an input terminal of the electronic device.

6. An electronic device according to claim 1.

7. the electronic device comprises one or more further terminals; 7. An electronic device according to claim 1.

8. the error signal is indicative of an error in isolation between the input terminal and the one or more further terminals.

8. The electronic device of claim 7.

9. the electronic device comprises a plurality of device inputs including the device input, the electronic device comprising, for each device input of the plurality of device inputs, a respective switch for connecting and disconnecting the respective device input to the analog-to-digital converter input and from the analog-to-digital converter input; The detection circuit, for each of the plurality of device inputs, storing a reference for an amplitude of a voltage signal at the analog-to-digital converter input caused by the alternating current when the respective device input is connected to the analog-to-digital converter input and other device inputs of the plurality of device inputs are disconnected from the analog-to-digital converter input; receiving an output of the analog-to-digital converter when the respective device input is connected to the analog-to-digital converter input and the other device inputs of the plurality of device inputs are disconnected from the analog-to-digital converter input; determining the amplitude of the voltage signal at the analog-to-digital converter input caused by the alternating current by filtering the output of each of the analog-to-digital converters received from the analog-to-digital converter; outputting an error signal if the criteria for the amplitude differ from the determined amplitude by more than a respective predetermined threshold. It is configured as follows:

9. An electronic device according to any one of claims 1 to 8.

10. each device input of the plurality of device inputs is used to connect a respective analog signal source; 10. The electronic device of claim 9.

11. the electronic device comprises a controller configured for an association of each device input of the plurality of device inputs with a respective time interval of a sequence of time intervals, and for each time interval of the sequence of time intervals, to connect the device input associated with the time interval to the analog-to-digital converter and to disconnect the other device inputs of the plurality of device inputs from the analog-to-digital converter during the time interval; 11. An electronic device according to claim 9 or 10.

12. the electronic device comprises a demultiplexer configured to separate the output of the analog-to-digital converter into a plurality of channels, one channel for each device input of the plurality of device inputs, the demultiplexer configured, for each time interval of the sequence of time intervals, to provide the output of the analog-to-digital converter to the channel for the device input associated with the time interval during the time interval, and the detection circuitry configured, for each device input, to determine the amplitude of the voltage signal at the analog-to-digital converter input caused by the alternating current by filtering the output of the analog-to-digital converter provided to the channel associated with the device input.

12. The electronic device of claim 11.

13. filtering the output of the analog to digital converter includes applying a digital filter to the output configured to block frequency components that do not correspond to the alternating current, or performing a spectral analysis of the output and discarding frequency components that do not correspond to the alternating current.

13. An electronic device according to any one of claims 1 to 12.

14. The AC power source is a current digital-to-analog converter.

14. An electronic device according to any one of claims 1 to 13.

15. the current digital to analog converter is implemented with a plurality of parallel leg pairs, each leg pair comprising a pull-up leg and a pull-down leg that are activated and deactivated according to a digital input value to the current digital to analog converter of a sequence of digital input values ​​that define a frequency and amplitude of the alternating current; 15. The electronic device of claim 14.

16. 16. An electronic system comprising an electronic device according to any one of claims 1 to 15 and said analog signal source connected to said device input.

17. filtering the output of the analog to digital converter includes filtering the output of the analog to digital converter with a filter that passes frequency components at the frequency of the alternating current and blocks frequency components provided to the device input by the analog signal source.

17. The electronic system of claim 16.

18. the analog signal source is a sensor; 18. An electronic system according to claim 16 or 17.

19. the electronic system comprises a plurality of analog signal sources; 17. The electronic system of claim 16.

20. 13. An electronic system comprising an electronic device according to any one of claims 10 to 12 and a respective analog signal source for each of the device inputs, the analog signal source is configured to provide signals of different frequencies to the electronic device; Electronic system.